Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.65 -> 1.66
---
Log message:
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-spec
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.60 -> 1.61
IA64InstrInfo.td updated: 1.48 -> 1.49
---
Log message:
fix storing bools to mem and unordered FP ops
---
Diffs of the changes: (+5 -5)
IA64ISelDAGToDAG.cpp |2 +-
IA64InstrInfo.td |8 ---
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.59 -> 1.60
---
Log message:
For PR786: http://llvm.org/PR786 :
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused f
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.58 -> 1.59
---
Log message:
Fix CodeGen/IA64/ret-0.ll, which has apparently been broken since some of the
isel changes happened months ago.
---
Diffs of the changes: (+6 -2)
IA64ISelDAGToDAG.cpp |8 ++--
1 f
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.57 -> 1.58
IA64ISelLowering.cpp updated: 1.46 -> 1.47
---
Log message:
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
---
Diffs of the changes: (+12 -12)
IA64ISelDAGToDAG.cpp | 14 +++---
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.56 -> 1.57
---
Log message:
Naming consistency.
---
Diffs of the changes: (+1 -1)
IA64ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.55 -> 1.56
IA64ISelLowering.cpp updated: 1.45 -> 1.46
---
Log message:
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
---
Diffs of the changes: (+10 -10)
IA64ISelDAGToDAG.cpp | 11 +--
IA64ISelLower
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.54 -> 1.55
IA64ISelLowering.cpp updated: 1.43 -> 1.44
---
Log message:
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.
---
Di
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.53 -> 1.54
IA64ISelLowering.cpp updated: 1.42 -> 1.43
---
Log message:
Reflects MachineConstantPoolEntry changes.
---
Diffs of the changes: (+2 -2)
IA64ISelDAGToDAG.cpp |2 +-
IA64ISelLowering.cpp |2 +-
2 fi
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.52 -> 1.53
---
Log message:
Do not use getTargetNode() and SelectNodeTo() which takes more than 3
SDOperand arguments. Use the variants which take an array and number instead.
---
Diffs of the changes: (+27 -15)
IA6
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.51 -> 1.52
---
Log message:
SelectNodeTo now returns a SDNode*.
---
Diffs of the changes: (+10 -10)
IA64ISelDAGToDAG.cpp | 20 ++--
1 files changed, 10 insertions(+), 10 deletions(-)
Index: llvm/l
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.50 -> 1.51
---
Log message:
Select() no longer require Result operand by reference.
---
Diffs of the changes: (+13 -20)
IA64ISelDAGToDAG.cpp | 33 +
1 files changed, 13 insertions(+)
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.49 -> 1.50
---
Log message:
Match tblgen changes.
---
Diffs of the changes: (+38 -30)
IA64ISelDAGToDAG.cpp | 68 ---
1 files changed, 38 insertions(+), 30 deletions(-
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.48 -> 1.49
---
Log message:
SelectNodeTo() may return a SDOperand that is different from the input.
---
Diffs of the changes: (+20 -31)
IA64ISelDAGToDAG.cpp | 51 ---
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.47 -> 1.48
---
Log message:
Match tablegen changes.
---
Diffs of the changes: (+21 -25)
IA64ISelDAGToDAG.cpp | 46 +-
1 files changed, 21 insertions(+), 25 deletions(-)
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.46 -> 1.47
---
Log message:
Match tablegen isel changes.
---
Diffs of the changes: (+28 -70)
IA64ISelDAGToDAG.cpp | 98 ++-
1 files changed, 28 insertions(+), 70 dele
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.45 -> 1.46
---
Log message:
Remove InFlightSet hack. No longer needed.
---
Diffs of the changes: (+0 -1)
IA64ISelDAGToDAG.cpp |1 -
1 files changed, 1 deletion(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cp
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.44 -> 1.45
---
Log message:
Remove NodeDepth
---
Diffs of the changes: (+1 -6)
IA64ISelDAGToDAG.cpp |7 +--
1 files changed, 1 insertion(+), 6 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
d
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.43 -> 1.44
---
Log message:
It was pointed out that DEBUG() is only available with -debug.
---
Diffs of the changes: (+5 -1)
IA64ISelDAGToDAG.cpp |6 +-
1 files changed, 5 insertions(+), 1 deletion(-)
Inde
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.42 -> 1.43
---
Log message:
Ensure that dump calls that are associated with asserts are removed from
non-debug build.
---
Diffs of the changes: (+1 -1)
IA64ISelDAGToDAG.cpp |2 +-
1 files changed, 1 insertion(+)
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.41 -> 1.42
---
Log message:
Assert if InflightSet is not cleared after instruction selecting a BB.
---
Diffs of the changes: (+1 -0)
IA64ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/T
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.40 -> 1.41
---
Log message:
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.
---
Diffs of the changes: (+2 -0)
IA64ISelDAGToDAG.cpp |2 ++
1 files changed,
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.39 -> 1.40
---
Log message:
Move this code to a common place
---
Diffs of the changes: (+0 -3)
IA64ISelDAGToDAG.cpp |3 ---
1 files changed, 3 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.38 -> 1.39
---
Log message:
#include Intrinsics.h into all dag isels
---
Diffs of the changes: (+1 -0)
IA64ISelDAGToDAG.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cp
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.36 -> 1.37
---
Log message:
fix storing booleans (grawp missed this one)
---
Diffs of the changes: (+3 -3)
IA64ISelDAGToDAG.cpp |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
Index: llvm/lib/Tar
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.35 -> 1.36
---
Log message:
Match getTargetNode() changes (now return SDNode* instead of SDOperand).
---
Diffs of the changes: (+78 -64)
IA64ISelDAGToDAG.cpp | 142 --
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.34 -> 1.35
---
Log message:
Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);
---
Diffs of the changes: (+82 -48)
IA64ISelDAGToDAG.cpp | 130 ++
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.33 -> 1.34
---
Log message:
Use SelectRoot() as entry of any tblgen based isel.
---
Diffs of the changes: (+2 -1)
IA64ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Ta
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.32 -> 1.33
---
Log message:
Allow the specification of explicit alignments for constant pool entries.
---
Diffs of the changes: (+4 -2)
IA64ISelDAGToDAG.cpp |6 --
1 files changed, 4 insertions(+), 2 deletio
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.31 -> 1.32
IA64ISelLowering.cpp updated: 1.31 -> 1.32
---
Log message:
Targets all now request ConstantFP to be legalized into TargetConstantFP.
'fpimm' in .td files is now TargetConstantFP.
---
Diffs of the changes:
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.30 -> 1.31
IA64ISelLowering.cpp updated: 1.29 -> 1.30
---
Log message:
Remove some dead code
---
Diffs of the changes: (+0 -35)
IA64ISelDAGToDAG.cpp | 30 --
IA64ISelLowering.cpp |5
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.28 -> 1.29
---
Log message:
insignificant, but next up is proper stack frame layout!
---
Diffs of the changes: (+2 -1)
IA64ISelDAGToDAG.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.27 -> 1.28
IA64ISelLowering.cpp updated: 1.24 -> 1.25
IA64ISelLowering.h updated: 1.4 -> 1.5
IA64InstrInfo.td updated: 1.41 -> 1.42
---
Log message:
remove RET hack, add proper support for rets (watching out for ret voi
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.26 -> 1.27
IA64ISelLowering.cpp updated: 1.23 -> 1.24
---
Log message:
fix sext breakage: now we correctly deal with functions that return
int vs uint
---
Diffs of the changes: (+5 -1)
IA64ISelDAGToDAG.cpp |2
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.25 -> 1.26
IA64InstrInfo.td updated: 1.40 -> 1.41
---
Log message:
fix storing bools! eek!
---
Diffs of the changes: (+5 -8)
IA64ISelDAGToDAG.cpp |4 ++--
IA64InstrInfo.td |9 +++--
2 files changed
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.24 -> 1.25
---
Log message:
oops, this shouldn't have gotten in
---
Diffs of the changes: (+0 -2)
IA64ISelDAGToDAG.cpp |2 --
1 files changed, 2 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
d
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.23 -> 1.24
---
Log message:
fixing divides
---
Diffs of the changes: (+9 -12)
IA64ISelDAGToDAG.cpp | 21 +
1 files changed, 9 insertions(+), 12 deletions(-)
Index: llvm/lib/Target/IA64/IA64
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.22 -> 1.23
---
Log message:
fixing divides: FP should now be 100%, and integers are fine too
unless you try to div/mod 0 by anything, in which case you will
get some cute number, and not 0, which is bad.
---
Diffs of
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.21 -> 1.22
IA64InstrInfo.td updated: 1.37 -> 1.38
---
Log message:
fix division! again!! pattern isel, prepare to die.
---
Diffs of the changes: (+118 -101)
IA64ISelDAGToDAG.cpp | 198 ---
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.20 -> 1.21
IA64ISelLowering.cpp updated: 1.21 -> 1.22
---
Log message:
explain that r12 is the stack pointer reg
---
Diffs of the changes: (+5 -33)
IA64ISelDAGToDAG.cpp | 34 ++
I
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.19 -> 1.20
---
Log message:
don't be a doofus - this fixes storing bools
---
Diffs of the changes: (+5 -2)
IA64ISelDAGToDAG.cpp |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
Index: llvm/lib/Tar
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.18 -> 1.19
---
Log message:
tblgen does this now
---
Diffs of the changes: (+0 -2)
IA64ISelDAGToDAG.cpp |2 --
1 files changed, 2 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.17 -> 1.18
---
Log message:
cleanup GETFD
---
Diffs of the changes: (+3 -4)
IA64ISelDAGToDAG.cpp |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
d
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.16 -> 1.17
---
Log message:
unbreak calls, a few more tests should run. Tomorrow: bugpoint!
---
Diffs of the changes: (+1 -2)
IA64ISelDAGToDAG.cpp |3 +--
1 files changed, 1 insertion(+), 2 deletions(-)
Index
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.14 -> 1.15
---
Log message:
we can't do this directly in lowering, so we need this case
---
Diffs of the changes: (+8 -0)
IA64ISelDAGToDAG.cpp |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Tar
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.13 -> 1.14
---
Log message:
kill SelectCALL() in the DAG isel, we handle this in lowering now, like
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)
---
Diffs of the changes:
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.12 -> 1.13
---
Log message:
Pay attn to the node returned by SelectNodeTo
---
Diffs of the changes: (+28 -37)
IA64ISelDAGToDAG.cpp | 65 +--
1 files changed, 28 inse
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.11 -> 1.12
---
Log message:
add support for dynamic_stackalloc to the dag isel (thanks andrew ;)
next up: support argument passing in memory, not just registers
---
Diffs of the changes: (+31 -3)
IA64ISelDAGToDAG.
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.10 -> 1.11
---
Log message:
add support for div/rem to the dag->dag isel. yay.
---
Diffs of the changes: (+180 -0)
IA64ISelDAGToDAG.cpp | 180 +++
1 files changed, 1
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.9 -> 1.10
---
Log message:
add support for storing and returning bools
---
Diffs of the changes: (+26 -5)
IA64ISelDAGToDAG.cpp | 31 ++-
1 files changed, 26 insertions(+), 5 deletions(
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.8 -> 1.9
---
Log message:
just some random hacking - calls (particularly indirect) need a lot of
love (especially with -sched=simple)
---
Diffs of the changes: (+25 -14)
IA64ISelDAGToDAG.cpp | 39
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.7 -> 1.8
---
Log message:
oops, forgot to load GP for indirect calls, though the old code now commented
out failed (e.g. methcall) - now the code compiles, though it's not quite
right just yet (tm) ;)
would fix this but
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.6 -> 1.7
---
Log message:
add support for loading bools
---
Diffs of the changes: (+7 -1)
IA64ISelDAGToDAG.cpp |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/IA64/IA64ISel
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.5 -> 1.6
---
Log message:
"fix" support for FP constants (this code asserts in the scheduler,
though)
---
Diffs of the changes: (+4 -2)
IA64ISelDAGToDAG.cpp |6 --
1 files changed, 4 insertions(+), 2 deleti
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.4 -> 1.5
IA64ISelLowering.cpp updated: 1.1 -> 1.2
---
Log message:
add support for loading FP constants +0.0 and +1.0 to the dag isel,
stop pretending -0.0 and -1.0 are machine constants
---
Diffs of the changes: (+8
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.3 -> 1.4
---
Log message:
FORTRAN!!! :( and other similarly unfortunate things mean that on ia64
one sometimes needs to pass FP args in both FP *and* integer registers.
---
Diffs of the changes: (+20 -0)
IA64ISelDA
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.2 -> 1.3
IA64InstrInfo.td updated: 1.17 -> 1.18
---
Log message:
add some FP stuff, some mix.* stuff, and constant pool support to the
DAG instruction selector, which should be destroyed one day (in the pattern
isel also
Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.1 -> 1.2
---
Log message:
These are autogenerated
---
Diffs of the changes: (+0 -33)
IA64ISelDAGToDAG.cpp | 33 -
1 files changed, 33 deletions(-)
Index: llvm/lib/Target/IA64/IA64
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