Mesa (master): radeon/vce: add firmware support for ver 53 and up

upport for ver 53 and up All vce firmwares with major version greater than or equal to 53 are supported Signed-off-by: Boyuan Zhang <boyuan.zh...@amd.com> Reviewed-by: Leo Liu <leo@amd.com> --- src/gallium/drivers/radeon/radeon_vce.c | 4 ++-- 1 file changed, 2 insertions(+), 2

Mesa (master): st/omx/enc: fix blit setup for YUV LoadImage

Module: Mesa Branch: master Commit: 1c5f4f4e17f74d823d9e38c678e40e9f49e2c053 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1c5f4f4e17f74d823d9e38c678e40e9f49e2c053 Author: Leo Liu <leo@amd.com> Date: Fri Apr 27 08:32:41 2018 -0400 st/omx/enc: fix blit setup for YUV Loa

Mesa (master): radeon/vcn: fix mpeg4 msg buffer settings

buffer settings Previous bit-fields assignments are incorrect and will result certain mpeg4 decode failed due to wrong flag values. This patch fixes these assignments. Signed-off-by: Boyuan Zhang <boyuan.zh...@amd.com> Reviewed-by: Leo Liu <leo@amd.com> --- src/gallium/drivers/radeo

Mesa (master): st/va: Fix typos

tibute/attribute/ s/suface/surface/ v2: rebased(Leo) Reviewed-by: Leo Liu <leo@amd.com> --- src/gallium/state_trackers/va/surface.c | 48 - 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/src/gallium/state_trackers/va/surface.c b

Mesa (master): st/va: Fix potential buffer overread

buffer overread VASurfaceAttribExternalBuffers.pitches is indexed by plane. Current implementation only supports single plane layout. Reviewed-by: Kristian H. Kristensen <hoegsb...@chromium.org> Reviewed-by: Leo Liu <leo@amd.com> --- src/gallium/state_trackers/va/surface.c | 2 +-

Mesa (master): 22 new commits

URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa328456e8f29bd4522deee5d6a8fa4a5ba74f05 Author: Leo Liu <leo@amd.com> Date: Wed Mar 14 17:13:46 2018 -0400 st/va: add VP9 config to enable profile2 Signed-off-by: Leo Liu <leo@amd.com> Acked-by: Chr

Mesa (master): radeon/vce: move feedback command inside of destroy function

Module: Mesa Branch: master Commit: c4de2f0880cfa49bd6fd3138564ee64ef4e637a1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4de2f0880cfa49bd6fd3138564ee64ef4e637a1 Author: Leo Liu <leo@amd.com> Date: Mon Mar 19 11:16:46 2018 -0400 radeon/vce: move feedback command

Mesa (master): st/omx_bellagio: add picture profile and entry point

rofile and entry point Profile and entry point were missing in the picture structure. Therefore, add them back. Signed-off-by: Boyuan Zhang <boyuan.zh...@amd.com> Reviewed-by: Leo Liu <leo@amd.com> Reviewed-by: Christian König <christian.koe...@amd.com> --- src/gallium/sta

Mesa (master): radeonsi: fix radeon create encoder return

Module: Mesa Branch: master Commit: 6a62e455f2a703125127161f4c39b98947e8a0f3 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6a62e455f2a703125127161f4c39b98947e8a0f3 Author: Boyuan Zhang Date: Tue Feb 27 17:29:44 2018 -0500 radeonsi: fix radeon create encoder

Mesa (master): radeon/uvd:add uvd hevc enc hw ib implementation

Module: Mesa Branch: master Commit: 2b86f5fa0b25dd66a65057362bab1ebf8615c94b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b86f5fa0b25dd66a65057362bab1ebf8615c94b Author: James Zhu Date: Tue Feb 6 13:26:28 2018 -0500 radeon/uvd:add uvd hevc enc hw ib

Mesa (master): radeonsi: enable uvd encode for HEVC main

Module: Mesa Branch: master Commit: 81dd4a76373c7392aaff9fc3fa3a660fc01ed864 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=81dd4a76373c7392aaff9fc3fa3a660fc01ed864 Author: James Zhu Date: Mon Feb 5 12:02:50 2018 -0500 radeonsi: enable uvd encode for HEVC main

Mesa (master): amd/common:add uvd hevc enc support check in hw query

Module: Mesa Branch: master Commit: f0ad908e79c76c380102960a0d7727f55d1abce4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0ad908e79c76c380102960a0d7727f55d1abce4 Author: James Zhu Date: Mon Feb 5 16:28:13 2018 -0500 amd/common:add uvd hevc enc support check

Mesa (master): winsys/amdgpu:add uvd hevc enc support in amdgpu cs

Module: Mesa Branch: master Commit: c6acae22c898687627e6871c337f1d48f90f1568 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6acae22c898687627e6871c337f1d48f90f1568 Author: James Zhu Date: Tue Feb 6 12:39:03 2018 -0500 winsys/amdgpu:add uvd hevc enc support in

Mesa (master): radeon/uvd:add uvd hevc enc functions

Module: Mesa Branch: master Commit: e7d51e27ed4d1fdfbeb5f7cf71304f243021a721 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7d51e27ed4d1fdfbeb5f7cf71304f243021a721 Author: James Zhu Date: Tue Feb 6 13:29:11 2018 -0500 radeon/uvd:add uvd hevc enc functions

Mesa (master): radeon/uvd:add uvd hevc enc hw interface header

Module: Mesa Branch: master Commit: 461508c15cfa84fd7a167828a828857ab90aa57c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=461508c15cfa84fd7a167828a828857ab90aa57c Author: James Zhu Date: Tue Feb 6 13:18:21 2018 -0500 radeon/uvd:add uvd hevc enc hw interface

Mesa (master): radeonsi:create uvd hevc enc entry

Module: Mesa Branch: master Commit: b38b208ff8886e799d6a27522853c9afc8be8772 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b38b208ff8886e799d6a27522853c9afc8be8772 Author: James Zhu Date: Mon Feb 5 17:08:22 2018 -0500 radeonsi:create uvd hevc enc entry Add UVD

Mesa (master): radeon/vcn: add header implementations for HEVC

Module: Mesa Branch: master Commit: b391d34916a51508410caf7bf7c80adcb5ab1387 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b391d34916a51508410caf7bf7c80adcb5ab1387 Author: Boyuan Zhang Date: Thu Feb 1 15:29:30 2018 -0500 radeon/vcn: add header

Mesa (master): st/va: add HEVC picture desc

Module: Mesa Branch: master Commit: ecc39443440dd1512b68d427b6b2ecd939a42173 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ecc39443440dd1512b68d427b6b2ecd939a42173 Author: Boyuan Zhang Date: Thu Jan 25 14:18:09 2018 -0500 st/va: add HEVC picture desc Add

Mesa (master): radeon/vcn: support picture parameters for HEVC

Module: Mesa Branch: master Commit: 5ab73edddb39d65f901f4e6dd37b68ec6338372b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ab73edddb39d65f901f4e6dd37b68ec6338372b Author: Boyuan Zhang Date: Thu Feb 1 15:23:49 2018 -0500 radeon/vcn: support picture

Mesa (master): st/va: add entrypoint check for HEVC

Module: Mesa Branch: master Commit: a9c0861c6c4e26207b8e2fc18f6efd824e92d960 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9c0861c6c4e26207b8e2fc18f6efd824e92d960 Author: Boyuan Zhang Date: Thu Jan 25 14:21:13 2018 -0500 st/va: add entrypoint check for HEVC

Mesa (master): st/va: move H264 enc functions into separate file

Module: Mesa Branch: master Commit: 9393b53c2937a810bec1b150880a22f4b84cb0e3 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9393b53c2937a810bec1b150880a22f4b84cb0e3 Author: Boyuan Zhang Date: Thu Feb 1 15:47:10 2018 -0500 st/va: move H264 enc functions into

Mesa (master): radeon/vcn: add vcn encode interface for HEVC

Module: Mesa Branch: master Commit: db67d04df3d99c3ff979d66bd7b9b6aa2339068d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db67d04df3d99c3ff979d66bd7b9b6aa2339068d Author: Boyuan Zhang Date: Thu Feb 1 15:05:17 2018 -0500 radeon/vcn: add vcn encode interface

Mesa (master): vl: add parameters for HEVC encode

Module: Mesa Branch: master Commit: f4109364390689758ad89272c4cee4269b178aaf URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f4109364390689758ad89272c4cee4269b178aaf Author: Boyuan Zhang Date: Thu Feb 1 14:57:37 2018 -0500 vl: add parameters for HEVC encode

Mesa (master): radeonsi: enable vcn encode for HEVC main

Module: Mesa Branch: master Commit: d645b0850a4a34b1e6ba169d0715117160d9d972 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d645b0850a4a34b1e6ba169d0715117160d9d972 Author: Boyuan Zhang Date: Thu Jan 25 15:06:35 2018 -0500 radeonsi: enable vcn encode for HEVC

Mesa (master): st/va: implement HEVC encode functions

Module: Mesa Branch: master Commit: 5534a2791f9775c2c0a80fc24157d8e279d5eefb URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5534a2791f9775c2c0a80fc24157d8e279d5eefb Author: Boyuan Zhang Date: Thu Feb 1 16:25:44 2018 -0500 st/va: implement HEVC encode

Mesa (master): st/va: enable dual instances encode only for H264

Module: Mesa Branch: master Commit: 66087d8a2d20fc46dfac68229563602050a95217 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=66087d8a2d20fc46dfac68229563602050a95217 Author: Boyuan Zhang Date: Thu Jan 25 14:32:04 2018 -0500 st/va: enable dual instances encode

Mesa (master): radeon/vcn: add ib implementations for HEVC

Module: Mesa Branch: master Commit: fdc952b320ccead25b035b565d5eb2484dfc1e60 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fdc952b320ccead25b035b565d5eb2484dfc1e60 Author: Boyuan Zhang Date: Thu Jan 25 11:25:20 2018 -0500 radeon/vcn: add ib implementations

Mesa (master): st/va: add HEVC encode functions

Module: Mesa Branch: master Commit: 9ac50a2e0c6c1a3d4e04d0ac9d584f8e8996d832 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ac50a2e0c6c1a3d4e04d0ac9d584f8e8996d832 Author: Boyuan Zhang Date: Thu Feb 1 16:20:16 2018 -0500 st/va: add HEVC encode functions Add

Mesa (master): st/va: remove TODO line for JPEG data buffer handling

Module: Mesa Branch: master Commit: 3d0b561f345b07bfd96b46f169aac02b592bfe32 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d0b561f345b07bfd96b46f169aac02b592bfe32 Author: Leo Liu <leo@amd.com> Date: Fri Jan 12 10:20:06 2018 -0500 st/va: remove TODO line for JPEG data

Mesa (master): st/va: add break for MPEG4 data buffer handling case

Module: Mesa Branch: master Commit: d1833b8cd894a7682c53a7bd6ca2dcfb97c7776e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d1833b8cd894a7682c53a7bd6ca2dcfb97c7776e Author: Leo Liu <leo@amd.com> Date: Fri Jan 12 10:23:35 2018 -0500 st/va: add break for MPEG4 data buffer ha

Mesa (master): st/omx_bellagio: Update default intra matrix per MPEG2 spec

Module: Mesa Branch: master Commit: e05d5b0cf31f3212ba1666a6baaae77bc30433a0 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e05d5b0cf31f3212ba1666a6baaae77bc30433a0 Author: Indrajit Das Date: Fri Jan 5 04:36:18 2018 -0500 st/omx_bellagio: Update default

Mesa (master): radeon/vcn: add and manage render picture list

Module: Mesa Branch: master Commit: f2bfd1cbb7e72945ca192845a1ad28426c7aea89 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2bfd1cbb7e72945ca192845a1ad28426c7aea89 Author: Boyuan Zhang Date: Fri Dec 15 11:17:32 2017 -0500 radeon/vcn: add and manage render

Mesa (master): vl: remove is idr flag

Module: Mesa Branch: master Commit: d9727f31a82e0d064bd0588b8a1d2323379eac0b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d9727f31a82e0d064bd0588b8a1d2323379eac0b Author: Boyuan Zhang Date: Thu Dec 7 16:13:51 2017 -0500 vl: remove is idr flag Remove is_idr

Mesa (master): st/va: directly use idr pic flag

Module: Mesa Branch: master Commit: 3181065b7fe76a429a46974fa9ee7a8220b6f5bf URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3181065b7fe76a429a46974fa9ee7a8220b6f5bf Author: Boyuan Zhang Date: Fri Dec 8 18:22:25 2017 -0500 st/va: directly use idr pic flag

Mesa (master): radeon/uvd: add and manage render picture list

Module: Mesa Branch: master Commit: 2ec48039b8aa1f6a5e16f3f12483b88981d0f5d3 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ec48039b8aa1f6a5e16f3f12483b88981d0f5d3 Author: Boyuan Zhang Date: Fri Dec 15 11:23:25 2017 -0500 radeon/uvd: add and manage render

Mesa (master): radeon/vce: determine idr by pic type

c type Vaapi encode interface provides idr frame flags, where omx interface doesn't. Therefore, change to use picture type to determine idr frame, which will work for both interfaces. Signed-off-by: Boyuan Zhang <boyuan.zh...@amd.com> Reviewed-by: Leo Liu <leo@amd.com> --- s

Mesa (master): radeon/vcn: determine idr by pic type

c type Vaapi encode interface provides idr frame flags, where omx interface doesn't. Therefore, change to use picture type to determine idr frame, which will work for both interfaces. Signed-off-by: Boyuan Zhang <boyuan.zh...@amd.com> Reviewed-by: Leo Liu <leo@amd.com> Reviewed-b

Mesa (master): radeon/vce: move destroy command before feedback command

Module: Mesa Branch: master Commit: 6d74cb2570eb919c72e519e590d2464757465902 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d74cb2570eb919c72e519e590d2464757465902 Author: Leo Liu <leo@amd.com> Date: Thu Dec 7 12:04:59 2017 -0500 radeon/vce: move destroy command

Mesa (master): radeonsi: enable vcn encode

Module: Mesa Branch: master Commit: 549a41ed9d6e5e97668186b950d3a9659d03c8dd URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=549a41ed9d6e5e97668186b950d3a9659d03c8dd Author: Boyuan Zhang Date: Tue Nov 7 16:24:10 2017 -0500 radeonsi: enable vcn encode Enable

Mesa (master): radeon/winsys: add vcn enc ring type

Module: Mesa Branch: master Commit: f2021d92eb77ad6fa421e836aa4699526a7c13da URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2021d92eb77ad6fa421e836aa4699526a7c13da Author: Boyuan Zhang Date: Tue Nov 7 15:39:41 2017 -0500 radeon/winsys: add vcn enc ring type

Mesa (master): radeon/video: enable encode support for raven

Module: Mesa Branch: master Commit: 3b7fd35d013f429bc84c02b555995145e6615e3d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b7fd35d013f429bc84c02b555995145e6615e3d Author: Boyuan Zhang Date: Tue Nov 7 16:25:09 2017 -0500 radeon/video: enable encode support

Mesa (master): radeon/vcn: add encode end frame

Module: Mesa Branch: master Commit: 3f83c24366a83083fa2db4d957a168fdc6df7c92 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f83c24366a83083fa2db4d957a168fdc6df7c92 Author: Boyuan Zhang Date: Tue Nov 7 16:20:25 2017 -0500 radeon/vcn: add encode end frame Add

Mesa (master): radeon/common: add vcn enc ip info query

Module: Mesa Branch: master Commit: 436a3f8d6d52921d91a2dab53fcfca192037125e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=436a3f8d6d52921d91a2dab53fcfca192037125e Author: Boyuan Zhang Date: Tue Nov 7 15:41:40 2017 -0500 radeon/common: add vcn enc ip info

Mesa (master): radeon/vcn: add encode get feedback

Module: Mesa Branch: master Commit: 3c53fbbc87e716f16212b7c64b963bd8a329cea2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c53fbbc87e716f16212b7c64b963bd8a329cea2 Author: Boyuan Zhang Date: Tue Nov 7 16:21:21 2017 -0500 radeon/vcn: add encode get feedback

Mesa (master): radeon/vcn: add vcn encode interface

Module: Mesa Branch: master Commit: d3d89142757bafd2842d5b3ec82c81bc709bf7aa URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3d89142757bafd2842d5b3ec82c81bc709bf7aa Author: Boyuan Zhang Date: Wed Nov 8 11:01:07 2017 -0500 radeon/vcn: add vcn encode interface

Mesa (master): radeon/vcn: add common encode part

Module: Mesa Branch: master Commit: 7f7ae47385da726c0f56787d8675be21efe49c98 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f7ae47385da726c0f56787d8675be21efe49c98 Author: Boyuan Zhang Date: Wed Nov 8 11:17:15 2017 -0500 radeon/vcn: add common encode part

Mesa (master): radeon/vcn: add encode header algorithms

Module: Mesa Branch: master Commit: d940fdf765b18974b54e21f66d31c45455ad79bc URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d940fdf765b18974b54e21f66d31c45455ad79bc Author: Boyuan Zhang Date: Tue Nov 7 16:17:25 2017 -0500 radeon/vcn: add encode header

Mesa (master): radeon/vcn: add ib implementations

Module: Mesa Branch: master Commit: be996f2213148912b1bcce886dbd00e7bc35f248 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=be996f2213148912b1bcce886dbd00e7bc35f248 Author: Boyuan Zhang Date: Tue Nov 7 16:09:52 2017 -0500 radeon/vcn: add ib implementations

Mesa (master): radeon/vcn: add encode bitstream

Module: Mesa Branch: master Commit: 47443bc9f054a31b1ba92890a25655953116e080 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=47443bc9f054a31b1ba92890a25655953116e080 Author: Boyuan Zhang Date: Tue Nov 7 16:20:05 2017 -0500 radeon/vcn: add encode bitstream Add

Mesa (master): st/va: implement poc type

Module: Mesa Branch: master Commit: 58aa4dffb4347aeb24bf7312c63579a0cb5e7327 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=58aa4dffb4347aeb24bf7312c63579a0cb5e7327 Author: Boyuan Zhang Date: Tue Nov 7 15:53:35 2017 -0500 st/va: implement poc type

Mesa (master): radeon/vcn: add encode header implementations

Module: Mesa Branch: master Commit: c2448f20a32d1f9b24a093dd48d33c54cfc51e6a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2448f20a32d1f9b24a093dd48d33c54cfc51e6a Author: Boyuan Zhang Date: Fri Nov 10 18:33:32 2017 -0500 radeon/vcn: add encode header

Mesa (master): radeon/vcn: add create encoder

Module: Mesa Branch: master Commit: fe50797d93aea003b4ade2470b788b8eff0c3cea URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe50797d93aea003b4ade2470b788b8eff0c3cea Author: Boyuan Zhang Date: Wed Nov 8 11:24:09 2017 -0500 radeon/vcn: add create encoder Add

Mesa (master): winsys/amdgpu: add vcn enc cs support

Module: Mesa Branch: master Commit: c445cdf649da7fb9c6f463e4c24d2dc25bc5d2bf URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c445cdf649da7fb9c6f463e4c24d2dc25bc5d2bf Author: Boyuan Zhang Date: Wed Nov 8 11:05:36 2017 -0500 winsys/amdgpu: add vcn enc cs support

Mesa (master): vl: add poc type

Module: Mesa Branch: master Commit: 76e0dcd5a98801e0bbf84f0c53509d4b2f4bbe9e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76e0dcd5a98801e0bbf84f0c53509d4b2f4bbe9e Author: Boyuan Zhang Date: Tue Nov 7 15:46:43 2017 -0500 vl: add poc type Different from vce

Mesa (master): radeon/vcn: add encode begin frame

Module: Mesa Branch: master Commit: f40fe728a1fb077cf288661af7892056c7fd0169 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f40fe728a1fb077cf288661af7892056c7fd0169 Author: Boyuan Zhang Date: Tue Nov 7 16:19:22 2017 -0500 radeon/vcn: add encode begin frame

Mesa (master): radeon/vcn: add encode destroy

Module: Mesa Branch: master Commit: bc9644460df595788b1784a84dbe4fa33b17668d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc9644460df595788b1784a84dbe4fa33b17668d Author: Boyuan Zhang Date: Tue Nov 7 16:20:53 2017 -0500 radeon/vcn: add encode destroy Add

Mesa (master): radeon/video: add gfx9 offsets when rejoin the video surface

Module: Mesa Branch: master Commit: ea3dc75d72c148dabffa71e8657bfd831ad0afe9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea3dc75d72c148dabffa71e8657bfd831ad0afe9 Author: Leo Liu <leo@amd.com> Date: Wed Oct 25 09:46:17 2017 -0400 radeon/video: add gfx9 offsets when

Mesa (master): st/va: Disable vaExportSurfaceHandle()

Module: Mesa Branch: master Commit: b6f41e393ee650bcfc2c5a78804ef914fc40ff4b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6f41e393ee650bcfc2c5a78804ef914fc40ff4b Author: Mark Thompson Date: Sun Oct 15 20:57:21 2017 +0100 st/va: Disable vaExportSurfaceHandle()

Mesa (master): st/va: Return correct width and height for encode/ decode support

Module: Mesa Branch: master Commit: 31fb7bbe0be83b2ad769568829a006855639bee8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=31fb7bbe0be83b2ad769568829a006855639bee8 Author: Mark Thompson Date: Mon Oct 9 21:45:03 2017 +0100 st/va: Return correct width and height for

Mesa (master): st/va: Fix config entrypoint handling

Module: Mesa Branch: master Commit: ba28c1c9f7800b81f1abfe482e2a03464d585519 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba28c1c9f7800b81f1abfe482e2a03464d585519 Author: Mark Thompson Date: Tue Oct 10 22:21:04 2017 +0100 st/va: Fix config entrypoint handling

Mesa (master): st/dri: Add definitions to allow importing 16-bit surfaces

orting 16-bit surfaces Necessary to support P010/P016 surfaces for video. Signed-off-by: Mark Thompson <s...@jkqxz.net> Acked-by: Leo Liu <leo@amd.com> --- src/gallium/state_trackers/dri/dri2.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/state

Mesa (master): st/va: Implement vaExportSurfaceHandle()

g (Leo). Add guards to allow building with libva1. Signed-off-by: Mark Thompson <s...@jkqxz.net> Acked-by: Christian König <christian.koe...@amd.com> Acked-and-Tested-by: Leo Liu <leo@amd.com> --- src/gallium/state_trackers/va/context.c| 5 +- src/gallium/sta

Mesa (master): st/vdpau: don' t re-allocate interlaced buffer with packed YUV format

Module: Mesa Branch: master Commit: 327480d10f2dab52de28e9a84609fac81c2034c5 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=327480d10f2dab52de28e9a84609fac81c2034c5 Author: Leo Liu <leo@amd.com> Date: Sat Sep 30 22:19:49 2017 -0400 st/vdpau: don't re-allocate interlaced

Mesa (master): st/va: add RGB support to vlVaPutSurface

Module: Mesa Branch: master Commit: 409491e778c979a5fbc59657cc54149c4ee7c2d6 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=409491e778c979a5fbc59657cc54149c4ee7c2d6 Author: Leo Liu <leo@amd.com> Date: Sun Oct 1 21:27:21 2017 -0400 st/va: add RGB support to vlVaPutS

Mesa (master): st/va: don' t re-allocate interlaced buffer with pakced format

Module: Mesa Branch: master Commit: 0fa950ecd38d5025bb2393bbcb96a73152764cf4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0fa950ecd38d5025bb2393bbcb96a73152764cf4 Author: Leo Liu <leo@amd.com> Date: Sun Oct 1 21:27:20 2017 -0400 st/va: don't re-allocate interlaced

Mesa (master): st/va: add dst rect to avoid scale on deint

Module: Mesa Branch: master Commit: 361d8f82c03ae78373483e91ad3ec339ccd05236 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=361d8f82c03ae78373483e91ad3ec339ccd05236 Author: Leo Liu <leo@amd.com> Date: Thu Sep 28 21:41:29 2017 -0400 st/va: add dst rect to avoid scale on

Mesa (master): st/va: use pipe transfer_map to map upload buffer

Module: Mesa Branch: master Commit: 6ed61b8d3fa09f7b08505e62d5b92270aef3fb80 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ed61b8d3fa09f7b08505e62d5b92270aef3fb80 Author: Leo Liu <leo@amd.com> Date: Tue Sep 26 09:11:52 2017 -0400 st/va: use pipe transfer_map to map

Mesa (master): vl/compositor: separate YUV part from shader video buffer function

Module: Mesa Branch: master Commit: 4ef0828946c7d61130a4f71a9bc4685d7f29a1be URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ef0828946c7d61130a4f71a9bc4685d7f29a1be Author: Leo Liu <leo@amd.com> Date: Fri Sep 15 13:45:45 2017 -0400 vl/compositor: separate YUV part from

Mesa (master): st/va/postproc: use progressive target buffer for scaling

Module: Mesa Branch: master Commit: 169c077d1d10db9e4938bae193fbd14b25cc5795 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=169c077d1d10db9e4938bae193fbd14b25cc5795 Author: Leo Liu <leo@amd.com> Date: Tue Sep 19 13:00:15 2017 -0400 st/va/postproc: use progressive target

Mesa (master): vl/compositor: extend YUV deint function to do field deint

Module: Mesa Branch: master Commit: abd05a6cc45142929f1857450c8ae977b0584b17 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=abd05a6cc45142929f1857450c8ae977b0584b17 Author: Leo Liu <leo@amd.com> Date: Fri Sep 15 14:08:23 2017 -0400 vl/compositor: extend YUV deint function

Mesa (master): vl/compositor: add a new function for YUV deint

Module: Mesa Branch: master Commit: 001358a97cce456d948bb57842ca099a73c10b06 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=001358a97cce456d948bb57842ca099a73c10b06 Author: Leo Liu <leo@amd.com> Date: Fri Sep 15 14:19:34 2017 -0400 vl/compositor: add a new function for YUV

Mesa (master): vl/compositor: remove vl_compositor_yuv_deint() function

Module: Mesa Branch: master Commit: 9484852cdb8d73c91830f7361ddcd19b638ba08e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9484852cdb8d73c91830f7361ddcd19b638ba08e Author: Leo Liu <leo@amd.com> Date: Tue Sep 19 11:08:54 2017 -0400 vl/compositor: remove vl_compositor_yuv

Mesa (master): st/va/postproc: implement the DRM prime grabber

Module: Mesa Branch: master Commit: f3ed1d2f6b0fac9af64279eed96afa45e511650b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3ed1d2f6b0fac9af64279eed96afa45e511650b Author: Leo Liu <leo@amd.com> Date: Tue Sep 19 13:06:38 2017 -0400 st/va/postproc: implement the DRM prime g

Mesa (master): st/va: make internal func vlVaHandleSurfaceAllocate() call simpler

Module: Mesa Branch: master Commit: 1d1299f8a41edbf6373222eda5708af5a5390d3c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d1299f8a41edbf6373222eda5708af5a5390d3c Author: Leo Liu <leo@amd.com> Date: Fri Sep 15 22:23:03 2017 -0400 st/va: make interna

Mesa (master): vl/csc: add a RGB to YUV CSC matrix

Module: Mesa Branch: master Commit: 737d13637dbf460d379a66bd2d50ef5b27b8571a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=737d13637dbf460d379a66bd2d50ef5b27b8571a Author: Leo Liu <leo@amd.com> Date: Wed Sep 20 12:36:14 2017 -0400 vl/csc: add a RGB to YUV CSC matrix

Mesa (master): vl/compositor: create RGB to YUV fragment shader

Module: Mesa Branch: master Commit: a2ebe579922d77d2fc5cbefacf46db875615d9dc URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a2ebe579922d77d2fc5cbefacf46db875615d9dc Author: Leo Liu <leo@amd.com> Date: Sun Sep 17 21:15:51 2017 -0400 vl/compositor: create RGB to YUV fr

Mesa (master): st/va/postproc: use video original size for postprocessing

Module: Mesa Branch: master Commit: eb518387710e027a6f38f0e096f014b9db1db8a7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb518387710e027a6f38f0e096f014b9db1db8a7 Author: Leo Liu <leo@amd.com> Date: Tue Sep 19 10:16:36 2017 -0400 st/va/postproc: use video origina

Mesa (master): st/omx: use new vl_compositor_yuv_deint_full() to deint

Module: Mesa Branch: master Commit: db28fdc0adabc7781b4dc8082d99003b63cf49c1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db28fdc0adabc7781b4dc8082d99003b63cf49c1 Author: Leo Liu <leo@amd.com> Date: Sun Sep 17 10:27:59 2017 -0400 st/omx: use new vl_compositor_yuv_dein

Mesa (master): vl/compositor: convert RGB buffer to YUV with color conversion

Module: Mesa Branch: master Commit: b47bdf55dc91278e43e31579b7d2a496facae0e8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b47bdf55dc91278e43e31579b7d2a496facae0e8 Author: Leo Liu <leo@amd.com> Date: Tue Sep 19 12:27:19 2017 -0400 vl/compositor: convert RGB buffer

Mesa (master): st/va: use new vl_compositor_yuv_deint_full() to deint

Module: Mesa Branch: master Commit: 3ad8687295449154a91464b7990963fd88cf3cd1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ad8687295449154a91464b7990963fd88cf3cd1 Author: Leo Liu <leo@amd.com> Date: Mon Sep 11 12:57:22 2017 -0400 st/va: use new vl_compositor_yuv_dein

Mesa (master): vl/compositor: add Bob top and bottom to YUV deint function

Module: Mesa Branch: master Commit: 4f9e7b127912b64e297134957dd1fc43a36f209f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f9e7b127912b64e297134957dd1fc43a36f209f Author: Leo Liu <leo@amd.com> Date: Fri Sep 15 15:26:13 2017 -0400 vl/compositor: add Bob top and bottom

Mesa (master): st/va/postproc: add a full NV12 deint support from buffer I to P

Module: Mesa Branch: master Commit: 96f89f440b9ad5cc2765dfa12265ca756aee83ea URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=96f89f440b9ad5cc2765dfa12265ca756aee83ea Author: Leo Liu <leo@amd.com> Date: Fri Sep 8 12:44:47 2017 -0400 st/va/postproc: add a full NV12 deint s

Mesa (master): vl/compositor: make vl_compositor_set_yuv_layer() static

Module: Mesa Branch: master Commit: 78ec7400c512b5d1d4a56ed32714c9ad555af003 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=78ec7400c512b5d1d4a56ed32714c9ad555af003 Author: Leo Liu <leo@amd.com> Date: Mon Aug 28 21:12:57 2017 -0400 vl/compositor: make vl_compositor_set_yuv

Mesa (master): st/va: reallocate the buffer if the layout isn't supported

Module: Mesa Branch: master Commit: cadeb73f6bb5f33877f3bbd6536594f22e20d580 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cadeb73f6bb5f33877f3bbd6536594f22e20d580 Author: Leo Liu <leo@amd.com> Date: Mon Aug 28 22:59:56 2017 -0400 st/va: reallocate the buffer if the

Mesa (master): vl/compositor: make a helper function for YUV deinterlacing

Module: Mesa Branch: master Commit: a6da7e6c3a405633b8e31b1185c3e7447b06ca89 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6da7e6c3a405633b8e31b1185c3e7447b06ca89 Author: Leo Liu <leo@amd.com> Date: Mon Aug 28 20:58:48 2017 -0400 vl/compositor: make a helper function f

Mesa (master): st/va: move YUV content to deinterlaced buffer when reallocated for encoder

Module: Mesa Branch: master Commit: 15d4d44d9b2467484b95f71d76224b7de2da5e40 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=15d4d44d9b2467484b95f71d76224b7de2da5e40 Author: Leo Liu <leo@amd.com> Date: Mon Aug 28 23:07:33 2017 -0400 st/va: move YUV content to deinterlaced

Mesa (master): st/omx: use vl/ compositor helper function for YUV deinterlacing

Module: Mesa Branch: master Commit: 9f32078c2080bbe49eb071ab0eeec493159b7261 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f32078c2080bbe49eb071ab0eeec493159b7261 Author: Leo Liu <leo@amd.com> Date: Mon Aug 28 21:05:03 2017 -0400 st/omx: use vl/compositor helper fu

Mesa (master): Revert "st/va: add enviromental variable to disable interlace"

Module: Mesa Branch: master Commit: 6e8ef538376b92381ada5dc828e8b1dd42cf936c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e8ef538376b92381ada5dc828e8b1dd42cf936c Author: Leo Liu <leo@amd.com> Date: Wed Aug 23 16:24:59 2017 -0400 Revert "st/va: add enviroment

Mesa (master): radeon/uvd: fix the assertion check for YUYV format

Module: Mesa Branch: master Commit: e1e3c0384bb7243f339e0f7405c432a45cf92ff4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1e3c0384bb7243f339e0f7405c432a45cf92ff4 Author: Leo Liu <leo@amd.com> Date: Tue Sep 5 13:30:57 2017 -0400 radeon/uvd: fix the assertion check fo

Mesa (master): radeon/uvd: fix MJPEG quantization table index

Module: Mesa Branch: master Commit: 3b02a8e9ddf105c2c0cc8a4a57df1a21affeb070 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b02a8e9ddf105c2c0cc8a4a57df1a21affeb070 Author: Leo Liu <leo@amd.com> Date: Fri Aug 25 13:17:40 2017 -0400 radeon/uvd: fix MJPEG quantization table

Mesa (master): radeon/uvd: add Define Restart Interval to MJPEG bitstream reconstruction

Module: Mesa Branch: master Commit: 8514c5d0781e4e25669a2cd3bf8a547016b299a2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8514c5d0781e4e25669a2cd3bf8a547016b299a2 Author: Leo Liu <leo@amd.com> Date: Fri Aug 25 13:17:41 2017 -0400 radeon/uvd: add Define Restart In

Mesa (master): st/va: exclude the buffer reallocation for encode case

Module: Mesa Branch: master Commit: 5ff97f2644d7438a9fdc75a2a9bc850c7ce96783 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ff97f2644d7438a9fdc75a2a9bc850c7ce96783 Author: Leo Liu <leo@amd.com> Date: Wed Aug 23 13:18:21 2017 -0400 st/va: exclude the buffer reallo

Mesa (master): radeon/video: Return false explicitly for HEVC if not the case

Module: Mesa Branch: master Commit: 89f75c948385f6f2a2def685f638b9e227550e3a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=89f75c948385f6f2a2def685f638b9e227550e3a Author: Leo Liu <leo@amd.com> Date: Wed Aug 23 09:53:10 2017 -0400 radeon/video: Return false explicitly fo

Mesa (master): radeon/vcn: enable P016 mode support

Module: Mesa Branch: master Commit: 398a299f7beae8d0e3973929b42ddbd250794453 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=398a299f7beae8d0e3973929b42ddbd250794453 Author: Leo Liu <leo@amd.com> Date: Mon Aug 21 11:51:35 2017 -0400 radeon/vcn: enable P016 mode support

Mesa (master): st/va: enable P016 format i.e. reallocate buffer if format changed

Module: Mesa Branch: master Commit: 2b025a11be1be82b482b7d61a1c0a8cf4de5570f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b025a11be1be82b482b7d61a1c0a8cf4de5570f Author: Leo Liu <leo@amd.com> Date: Mon Aug 21 14:03:40 2017 -0400 st/va: enable P016 format i.e. real

Mesa (master): radeon/vcn: correct target buffer pitch calculation

Module: Mesa Branch: master Commit: df6c087a383f801c32352309e9b858340989955d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=df6c087a383f801c32352309e9b858340989955d Author: Leo Liu <leo@amd.com> Date: Mon Aug 21 11:50:38 2017 -0400 radeon/vcn: correct target buffer

Mesa (master): 21 new commits

URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=03b89547b7c0ad7176f8c9a1d5d78156524ce13e Author: Leo Liu <leo@amd.com> Date: Tue Aug 15 11:44:08 2017 -0400 st/va: add MJPEG for config To enable MJPEG HW decode Signed-off-by: Leo Liu <leo...

Mesa (master): radeon/vce: support all firmwares with major ver 53

Module: Mesa Branch: master Commit: a44b334e48f24060064eac49c73d8c767c2becf7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a44b334e48f24060064eac49c73d8c767c2becf7 Author: Boyuan Zhang Date: Wed Aug 16 14:24:29 2017 -0400 radeon/vce: support all firmwares

Mesa (master): radeon/vcn: move message buffer to vram for now

Module: Mesa Branch: master Commit: 82fcf3142f5dd43df530b5544350b957fd43f79f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=82fcf3142f5dd43df530b5544350b957fd43f79f Author: Leo Liu <leo@amd.com> Date: Tue Jul 18 09:48:02 2017 -0400 radeon/vcn: move message buffer to vram f

Mesa (master): radeon/vcn: enable h264 decode entension support

Module: Mesa Branch: master Commit: fad0b4721942d05cba34c0270bafeaecc1292c95 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fad0b4721942d05cba34c0270bafeaecc1292c95 Author: Leo Liu <leo@amd.com> Date: Fri Jun 23 13:21:09 2017 -0400 radeon/vcn: enable h264 decode ent

  1   2   3   >