URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a516b047db63835d0acad9cb4a04606c77072643
Author: Juan A. Suarez Romero <jasua...@igalia.com>
Date: Thu Mar 29 11:26:54 2018 +0200
cherry-ignore: docs: fix 18.0 release note version
stable: Explicit 18.0 only nominations.
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=189b25e3df298d8f4d4c69d50b763288caecc621
Author: Timothy Arceri <tarc...@itsqueeze.com>
Date: Mon Mar 26 11:41:51 2018 +1100
nir: fix crash in loop unroll corner case
When an if nesting inside anouther if is optimised away we can
end up with a loop terminator and following block that looks like
this:
if ssa_596 {
block block_5:
/* preds: block_4 */
vec1 32 ssa_601 = load_const (0xffffffff /* -nan */)
break
/* succs: block_8 */
} else {
block block_6:
/* preds: block_4 */
/* succs: block_7 */
}
block block_7:
/* preds: block_6 */
vec1 32 ssa_602 = phi block_6: ssa_552
vec1 32 ssa_603 = phi block_6: ssa_553
vec1 32 ssa_604 = iadd ssa_551, ssa_66
The problem is the phis. Loop unrolling expects the last block in
the loop to be empty once we splice the instructions in the last
block into the continue branch. The problem is we cant move phis
so here we lower the phis to regs when preparing the loop for
unrolling. As it could be possible to have multiple additional
blocks/ifs following the terminator we just convert all phis at
the top level of the loop body for simplicity.
We also add some comments to loop_prepare_for_unroll() while we
are here.
Fixes: 51daccb289eb "nir: add a loop unrolling pass"
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105670
(cherry picked from commit 629ee690addad9b3dc8f68cfff5ae09858f31caf)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ded412b467f0dea08e3c065f413262d30a842dba
Author: Rob Clark <robdcl...@gmail.com>
Date: Fri Mar 16 13:10:18 2018 -0400
nir: fix per_vertex_output intrinsic
This is supposed to have both BASE and COMPONENT but num_indices was
inadvertantly set to 1.
Cc: <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Rob Clark <robdcl...@gmail.com>
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
(cherry picked from commit cc3a88e81dbceb12b79eb4ebe7a4ce5ba97fc291)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=82065af1c9799ed3a4451f9585135216217fec0d
Author: Derek Foreman <der...@osg.samsung.com>
Date: Thu Mar 22 10:20:43 2018 -0500
egl/wayland: Make swrast display_sync the correct queue
commit 03dd9a88b0be17ff0ce91e92f6902a9a85ba584a introduced per surface
queues, but the display_sync for swrast_commit_backbuffer remained on
the old queue. This is likely to break when dispatching the correct
queue at the top of function (which can't dispatch the sync callback
we're waiting for).
The easiest known reproduction case is running weston-subsurfaces under
weston --use-pixman
Signed-off-by: Derek Foreman <der...@osg.samsung.com>
Reviewed-by: Daniel Stone <dani...@collabora.com>
(cherry picked from commit aa18a63512ccfa4eb8bc5d043e8967738a465af4)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=880b548417376c42b38f7d8fff6990ec73c517e8
Author: Timothy Arceri <tarc...@itsqueeze.com>
Date: Mon Mar 26 10:31:26 2018 +1100
glsl: fix infinite loop caused by bug in loop unrolling pass
Just checking for 2 jumps is not enough to be sure we can do a
complex loop unroll. We need to make sure we also have also found
2 loop terminators.
Without this we were attempting to unroll a loop where the second
jump was nested inside multiple ifs which loop analysis is unable
to detect as a terminator. We ended up splicing out the first
terminator but failed to actually unroll the loop, this resulted
in the creation of a possible infinite loop.
Fixes: 646621c66da9 "glsl: make loop unrolling more like the nir unrolling
path"
Tested-by: Gert Wollny <gw.foss...@gmail.com>
Reviewed-by: Ian Romanick <ian.d.roman...@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105670
(cherry picked from commit 56b867395dee1a48594b27987d3bf68a4e745dda)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ccaf9b8fe5609315f9edfc840e2d6d8330cb68e
Author: Juan A. Suarez Romero <jasua...@igalia.com>
Date: Tue Mar 27 13:08:38 2018 +0200
cherry-ignore: omx: always define ENABLE_ST_OMX_{BELLAGIO,TIZONIA}
fixes: The commit fixes earier commits 83d4a5d5aea5a8a05be2,
b2f2236dc565dd1460f0 and c62cf1f165919bc74296 which did not land in
branch.
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd4dd7c96c86a0e8c6b17fa48531b399e35a7165
Author: Caio Marcelo de Oliveira Filho <caio.olive...@intel.com>
Date: Thu Mar 15 13:09:29 2018 -0700
anv/pipeline: fail if TCS/TES compile fail
v2: Add Fixes tag. (Lionel)
Fixes: e50d4807a35e679 ("anv: Compile TCS/TES shaders.")
Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com>
(cherry picked from commit 318073ce660ca72b47ba83e37d1d0bc756f779b7)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5be123aa9ebb7b30ec62377a4e17c3e43e2a015
Author: Juan A. Suarez Romero <jasua...@igalia.com>
Date: Tue Mar 27 12:56:37 2018 +0200
cherry-ignore: radv: handle exporting view index to fragment shader. (v1.1)
fixes: The commit requires earlier commits b358e0e67fac and b2653007b980
which did not land in branch.
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=11f419b64dffc6380e209f44d3f482e471e574c5
Author: Juan A. Suarez Romero <jasua...@igalia.com>
Date: Tue Mar 27 12:04:11 2018 +0200
cherry-ignore: ac/nir: pass the nir variable through tcs loading.
Together with:
cherry-ignore: radv: mark all tess output for an indirect access.
fixes: The commits require earlier commits 2deb82207572 and b2653007b980
which did not land in branch.
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f67c9b17518cf0d2fe946e39e5b8ff5ec2797c5
Author: Ian Romanick <ian.d.roman...@intel.com>
Date: Fri Mar 23 11:46:12 2018 -0700
i965/vec4: Fix null destination register in 3-source instructions
A recent commit (see below) triggered some cases where conditional
modifier propagation and dead code elimination would cause a MAD
instruction like the following to be generated:
mad.l.f0 null, ...
Matt pointed out that fs_visitor::fixup_3src_null_dest() fixes cases
like this in the scalar backend. This commit basically ports that code
to the vec4 backend.
NOTE: I have sent a couple tests to the piglit list that reproduce this
bug *without* the commit mentioned below. This commit fixes those
tests.
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
Reviewed-by: Matt Turner <matts...@gmail.com>
Tested-by: Tapani Pälli <tapani.pa...@intel.com>
Cc: mesa-sta...@lists.freedesktop.org
Fixes: ee63933a7 ("nir: Distribute binary operations with constants into
bcsel")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105704
(cherry picked from commit 91225cb33f0baede872114bd416084b3b52937a1)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8569000542c929304572eb83e7fd240421b66c5
Author: Dave Airlie <airl...@redhat.com>
Date: Wed Mar 14 05:41:53 2018 +1000
radv: get correct offset into LDS for indexed vars.
This seems more correct to me, since if we have an array
of floats they'll be vec4 aligned, and if we do af[2],
we want the const index to increase by 2 slots in the non
compact case.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airl...@redhat.com>
(cherry picked from commit f9de2d409bf4f068a99d358d592d96ab4803f7fb)
[Juan A. Suarez: apply patch in ac_nir_to_llvm.c]
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
Conflicts:
src/amd/vulkan/radv_nir_to_llvm.c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=89c617cca9aef23dc69ace0d21382af59f87a6ea
Author: Jason Ekstrand <jason.ekstr...@intel.com>
Date: Fri Mar 9 21:23:23 2018 -0800
i965: Emit texture cache invalidates around blorp_copy
This is a terrible hack but it fixes CTS regressions. It's still
incredibly unclear exactly what is going wrong in the hardware to cause
this to be an issue so this isn't a good fix by any means. However, it
does fix tests so there is that.
Fixes: fb0e9b5197 "i965: Track the depth and render caches separately"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103746
Acked-by: Kenneth Graunke <kenn...@whitecape.org>
(cherry picked from commit 8379bff6c4456f8a77041eee225dcd44e5e00a76)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1afae6f39e4aa632a31bba245bb23b3f9252b0d5
Author: Ian Romanick <ian.d.roman...@intel.com>
Date: Wed Mar 7 21:05:34 2018 -0800
mesa: Don't write to user buffer in glGetTexParameterIuiv on error
With some sets of optimization flags, GCC will generate warnings like
this:
src/mesa/main/texparam.c:2327:27: warning: ‘*((void *)&ip+12)’ may be used
uninitialized in this function [-Wmaybe-uninitialized]
params[3] = ip[3];
~~^~~
src/mesa/main/texparam.c:2320:16: note: ‘*((void *)&ip+12)’ was declared
here
GLint ip[4];
^~
ip is not initialized in cases where a GL error is generated. In these
cases, we should *not* write to the user's buffer, so this is actually a
bug. I wrote a new piglit test gl-3.0-texparameteri to show this bug.
I suspect that Coverity also detected this, but the scan site is
currently down.
Fixes: c2c507786 "main: Added entry points for glGetTextureParameteriv,
Iiv, and Iuiv."
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
Reviewed-by: Matt Turner <matts...@gmail.com>
(cherry picked from commit def0030e64dd3a4eb3487dd40bf64b9a71a70af3)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b2603cdd528cce1cd1e69c64e50db8c54cc8a855
Author: Marek Olšák <marek.ol...@amd.com>
Date: Wed Mar 7 13:47:28 2018 -0500
st/dri: fix OpenGL-OpenCL interop for GL_TEXTURE_BUFFER
Tested by our OpenCL team.
Fixes: 9c499e6759b26c5e "st/mesa: don't invoke st_finalize_texture &
st_convert_sampler for TBOs"
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
(cherry picked from commit db495b8962909f74e90b9eb0463fb37f37ac5f62)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
Conflicts:
src/gallium/state_trackers/dri/dri2.c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9475e58334e3eb7c33f55f6a760d531f92f6bcb4
Author: Eric Engestrom <eric.engest...@imgtec.com>
Date: Wed Mar 21 17:04:06 2018 +0000
meson/configure: detect endian.h instead of trying to guess when it's
available
Cc: Maxin B. John <maxin.j...@gmail.com>
Cc: Khem Raj <raj.k...@gmail.com>
Cc: Rob Herring <r...@kernel.org>
Suggested-by: Jon Turney <jon.tur...@dronecode.org.uk>
Signed-off-by: Eric Engestrom <eric.engest...@imgtec.com>
Reviewed-by: Emil Velikov <emil.veli...@collabora.com>
Reviewed-by: Dylan Baker <dy...@pnwbakers.com>
Cc: <mesa-sta...@lists.freedesktop.org>
(cherry picked from commit cbee1bfb34274668a05995b9d4c78ddec9e5ea4c)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasua...@igalia.com>
Conflicts:
Android.common.mk
meson.build
Squashed with:
configure: use AC_CHECK_HEADERS to check for endian.h
The currently we use the singular CHECK_HEADER combined with explicit
append to the DEFINES variable. That is a legacy misnomer, since it
requires us to add $DEFINES to every piece that we build.
Using the plural version of the helper sets the HAVE_ macro for us, plus
ensures it's passed to the compiler - if config.h is available in there
(not in the case of mesa) otherwise on the command line.
In hindsight, we should replace all the AC_CHECK_{FUNC,HEADER} instances
with the plural version (or even the _ONCE suffixed version) and drop
the DEFINES hacks.
Fixes: cbee1bfb342 ("meson/configure: detect endian.h instead of trying
to guess when it's available")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105717
Signed-off-by: Emil Velikov <emil.veli...@collabora.com>
Acked-by: Eric Engestrom <eric.engest...@imgtec.com>
Tested-by: Clayton Craft <clayton.a.cr...@intel.com>
(cherry picked from commit 5a75019ad0270a974788a9b8648ba98ff4203768)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f69b63896ce2352aaa25f89287133f7f2ba1fab
Author: Leo Liu <leo....@amd.com>
Date: Mon Mar 19 11:16:46 2018 -0400
radeon/vce: move feedback command inside of destroy function
On the CI family, firmware requires the destory command have to be the
last command in the IB, moving feedback command after destroy is causing
issues on CI cards, so we have to keep the previous logic that moves
destroy back to the last command.
But as the original issue fixed previously, with the newer family like
Vega10,
feedback command have to be included inside of the task info command along
with destroy command.
Fixes: 6d74cb25("radeon/vce: move destroy command before feedback command")
Signed-off-by: Leo Liu <leo....@amd.com>
Acked-by: Christian König <christian.koe...@amd.com>
Cc: mesa-sta...@lists.freedesktop.org
(cherry picked from commit c4de2f0880cfa49bd6fd3138564ee64ef4e637a1)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6aa9d8ff5276700bb2b3d99c0e806800832518ea
Author: Axel Davy <davyax...@gmail.com>
Date: Sat Mar 10 18:49:59 2018 +0100
st/nine: Fix non inversible matrix check
There was a missing absolute value when
checking if the determinant was big enough.
Fixes: https://github.com/iXit/Mesa-3D/issues/292
Signed-off-by: Axel Davy <davyax...@gmail.com>
Reviewed-by: Patrick Rudolph <s...@das-labor.org>
Tested-by: Dieter Nützel <die...@nuetzel-hh.de>
CC: "17.3 18.0" <mesa-sta...@lists.freedesktop.org>
(cherry picked from commit dbc24835d75466951a44b391b42e39461a6ac5a2)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=40fcc985722d4ce97971ba49af638c62b34f2f54
Author: Axel Davy <davyax...@gmail.com>
Date: Sat Mar 10 14:28:10 2018 +0100
st/nine: Fixes warning about implicit conversion
Makes the conversion explicit.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=102542
Signed-off-by: Axel Davy <davyax...@gmail.com>
Reviewed-by: Patrick Rudolph <s...@das-labor.org>
Tested-by: Dieter Nützel <die...@nuetzel-hh.de>
CC: "17.3 18.0" <mesa-sta...@lists.freedesktop.org>
(cherry picked from commit f61e9a958bd8d61cb7ca575ca987caefc6edbffd)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed835017457ec8b75504e2f4d32fe85515eefe0a
Author: Axel Davy <davyax...@gmail.com>
Date: Sat Mar 10 14:23:43 2018 +0100
st/nine: Fix bad tracking of vs textures for NINESBT_ALL
Stateblocks with NINESBT_ALL should track all textures.
For better performance they have a faster path which
copies all the required.
This path was only tracking ps textures.
Fixes: https://github.com/iXit/Mesa-3D/issues/303
Signed-off-by: Axel Davy <davyax...@gmail.com>
Reviewed-by: Patrick Rudolph <s...@das-labor.org>
Tested-by: Dieter Nützel <die...@nuetzel-hh.de>
CC: "17.3 18.0" <mesa-sta...@lists.freedesktop.org>
(cherry picked from commit 71eae7940ef7fa92e01cdc9afa1172f92d4b489e)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5baea7bb20b44e603f100ed484a5ac1134a61694
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date: Tue Mar 6 08:35:50 2018 -0800
i965: Hard code CS scratch_ids_per_subslice for Cherryview
Ken suggested that we might be underallocating scratch space on HD
400. Allocating scratch space as though there was actually 8 EUs
seems to help with a GPU hang seen on synmark CSDof.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104636
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105290
Cc: <mesa-sta...@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
Tested-by: Eero Tamminen <eero.t.tammi...@intel.com>
(cherry picked from commit 06e3bd02c01e499332a9c02b40f506df9695bced)
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aaefff1c6ff708c76f322ec57c05563c502fc6ae
Author: Jordan Justen <jordan.l.jus...@intel.com>
Date: Tue Oct 31 00:34:32 2017 -0700
i965: Calculate thread_count in brw_alloc_stage_scratch
Previously, thread_count was sent in from the stage after some stage
specific calculations. Those stage specific calculations were moved
into brw_alloc_stage_scratch, which will allow the shader cache to
also use the same calculations.
Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
(cherry picked from commit f9d5a7add42af5a2e4410526d1480a08f41317ae)
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