Module: Mesa
Branch: master
Commit: 2c3b54c27820edcf2d74e96faa812f8dd29f56df
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c3b54c27820edcf2d74e96faa812f8dd29f56df
Author: Rob Clark <robcl...@freedesktop.org>
Date: Fri May 20 13:41:44 2016 -0400
freedreno: pass index buffer as a pipe_resource
This will be useful in a following patch.
Signed-off-by: Rob Clark <robdcl...@gmail.com>
---
src/gallium/drivers/freedreno/a4xx/fd4_draw.h | 16 ++++++++--------
src/gallium/drivers/freedreno/freedreno_draw.h | 16 ++++++++--------
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
b/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
index c850c24..5f5f6cd 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
@@ -54,7 +54,7 @@ fd4_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
enum pc_di_src_sel src_sel, uint32_t count,
uint32_t instances, enum a4xx_index_size idx_type,
uint32_t idx_size, uint32_t idx_offset,
- struct fd_bo *idx_bo)
+ struct pipe_resource *idx_buffer)
{
/* for debug after a lock up, write a unique counter value
* to scratch7 for each draw, to make it easier to match up
@@ -64,7 +64,7 @@ fd4_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
*/
emit_marker(ring, 7);
- OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, idx_bo ? 6 : 3);
+ OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 6 : 3);
if (vismode == USE_VISIBILITY) {
/* leave vis mode blank for now, it will be patched up when
* we know if we are binning or not
@@ -76,9 +76,9 @@ fd4_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
}
OUT_RING(ring, instances); /* NumInstances */
OUT_RING(ring, count); /* NumIndices */
- if (idx_bo) {
+ if (idx_buffer) {
OUT_RING(ring, 0x0); /* XXX */
- OUT_RELOC(ring, idx_bo, idx_offset, 0, 0);
+ OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
OUT_RING (ring, idx_size);
}
@@ -107,7 +107,7 @@ fd4_draw_emit(struct fd_context *ctx, struct fd_ringbuffer
*ring,
const struct pipe_draw_info *info)
{
struct pipe_index_buffer *idx = &ctx->indexbuf;
- struct fd_bo *idx_bo = NULL;
+ struct pipe_resource *idx_buffer = NULL;
enum a4xx_index_size idx_type;
enum pc_di_src_sel src_sel;
uint32_t idx_size, idx_offset;
@@ -115,13 +115,13 @@ fd4_draw_emit(struct fd_context *ctx, struct
fd_ringbuffer *ring,
if (info->indexed) {
assert(!idx->user_buffer);
- idx_bo = fd_resource(idx->buffer)->bo;
+ idx_buffer = idx->buffer;
idx_type = fd4_size2indextype(idx->index_size);
idx_size = idx->index_size * info->count;
idx_offset = idx->offset + (info->start * idx->index_size);
src_sel = DI_SRC_SEL_DMA;
} else {
- idx_bo = NULL;
+ idx_buffer = NULL;
idx_type = INDEX4_SIZE_32_BIT;
idx_size = 0;
idx_offset = 0;
@@ -130,7 +130,7 @@ fd4_draw_emit(struct fd_context *ctx, struct fd_ringbuffer
*ring,
fd4_draw(ctx, ring, primtype, vismode, src_sel,
info->count, info->instance_count,
- idx_type, idx_size, idx_offset, idx_bo);
+ idx_type, idx_size, idx_offset, idx_buffer);
}
#endif /* FD4_DRAW_H_ */
diff --git a/src/gallium/drivers/freedreno/freedreno_draw.h
b/src/gallium/drivers/freedreno/freedreno_draw.h
index 3224fb1..7a970a2 100644
--- a/src/gallium/drivers/freedreno/freedreno_draw.h
+++ b/src/gallium/drivers/freedreno/freedreno_draw.h
@@ -49,7 +49,7 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
uint8_t instances,
enum pc_di_index_size idx_type,
uint32_t idx_size, uint32_t idx_offset,
- struct fd_bo *idx_bo)
+ struct pipe_resource *idx_buffer)
{
/* for debug after a lock up, write a unique counter value
* to scratch7 for each draw, to make it easier to match up
@@ -74,7 +74,7 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_RING(ring, 0);
}
- OUT_PKT3(ring, CP_DRAW_INDX, idx_bo ? 5 : 3);
+ OUT_PKT3(ring, CP_DRAW_INDX, idx_buffer ? 5 : 3);
OUT_RING(ring, 0x00000000); /* viz query info. */
if (vismode == USE_VISIBILITY) {
/* leave vis mode blank for now, it will be patched up when
@@ -86,8 +86,8 @@ fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode,
instances));
}
OUT_RING(ring, count); /* NumIndices */
- if (idx_bo) {
- OUT_RELOC(ring, idx_bo, idx_offset, 0, 0);
+ if (idx_buffer) {
+ OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
OUT_RING (ring, idx_size);
}
@@ -118,7 +118,7 @@ fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer
*ring,
const struct pipe_draw_info *info)
{
struct pipe_index_buffer *idx = &ctx->indexbuf;
- struct fd_bo *idx_bo = NULL;
+ struct pipe_resource *idx_buffer = NULL;
enum pc_di_index_size idx_type = INDEX_SIZE_IGN;
enum pc_di_src_sel src_sel;
uint32_t idx_size, idx_offset;
@@ -126,13 +126,13 @@ fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer
*ring,
if (info->indexed) {
assert(!idx->user_buffer);
- idx_bo = fd_resource(idx->buffer)->bo;
+ idx_buffer = idx->buffer;
idx_type = size2indextype(idx->index_size);
idx_size = idx->index_size * info->count;
idx_offset = idx->offset + (info->start * idx->index_size);
src_sel = DI_SRC_SEL_DMA;
} else {
- idx_bo = NULL;
+ idx_buffer = NULL;
idx_type = INDEX_SIZE_IGN;
idx_size = 0;
idx_offset = 0;
@@ -141,7 +141,7 @@ fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer
*ring,
fd_draw(ctx, ring, primtype, vismode, src_sel,
info->count, info->instance_count - 1,
- idx_type, idx_size, idx_offset, idx_bo);
+ idx_type, idx_size, idx_offset, idx_buffer);
}
#endif /* FREEDRENO_DRAW_H_ */
_______________________________________________
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit
