Module: Mesa Branch: master Commit: 6939532593efb5f6dc0ddb79081989f31d0a6851 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6939532593efb5f6dc0ddb79081989f31d0a6851
Author: Topi Pohjolainen <topi.pohjolai...@intel.com> Date: Wed Sep 7 09:38:11 2016 +0300 i965: Add sanity check for non-compressible texture views v2: Fix missing inline declaration Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com> Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net> --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 34 ++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index f12df8f..89d76c1 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -438,6 +438,38 @@ brw_find_matching_rb(const struct gl_framebuffer *fb, return fb->_NumColorDrawBuffers; } +static inline bool +brw_texture_view_sane(const struct brw_context *brw, + const struct intel_mipmap_tree *mt, unsigned format) +{ + /* There are special cases only for lossless compression. */ + if (!intel_miptree_is_lossless_compressed(brw, mt)) + return true; + + if (isl_format_supports_lossless_compression(brw->intelScreen->devinfo, + format)) + return true; + + /* Logic elsewhere needs to take care to resolve the color buffer prior + * to sampling it as non-compressed. + */ + if (mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED) + return false; + + const struct gl_framebuffer *fb = brw->ctx.DrawBuffer; + const unsigned rb_index = brw_find_matching_rb(fb, mt); + + if (rb_index == fb->_NumColorDrawBuffers) + return true; + + /* Underlying surface is compressed but it is sampled using a format that + * the sampling engine doesn't support as compressed. Compression must be + * disabled for both sampling engine and data port in case the same surface + * is used also as render target. + */ + return brw->draw_aux_buffer_disabled[rb_index]; +} + static bool brw_disable_aux_surface(const struct brw_context *brw, const struct intel_mipmap_tree *mt) @@ -592,6 +624,8 @@ brw_update_texture_surface(struct gl_context *ctx, obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY) view.usage |= ISL_SURF_USAGE_CUBE_BIT; + assert(brw_texture_view_sane(brw, mt, format)); + const int flags = brw_disable_aux_surface(brw, mt) ? INTEL_AUX_BUFFER_DISABLED : 0; brw_emit_surface_state(brw, mt, flags, mt->target, view, _______________________________________________ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit