Module: Mesa
Branch: master
Commit: 3e324f99d3b8f6b9da00c3f90719fba19e77ae7d
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e324f99d3b8f6b9da00c3f90719fba19e77ae7d

Author: Chia-I Wu <olva...@gmail.com>
Date:   Sat Mar  8 23:55:15 2014 +0800

ilo: replace bo alloc flags by initial domains

The only alloc flag is INTEL_ALLOC_FOR_RENDER, which can as well be expressed
by specifying the initial write domain.  The change makes it obvious that we
failed to set INTEL_ALLOC_FOR_RENDER in several places.

---

 src/gallium/drivers/ilo/ilo_3d.c                |    2 +-
 src/gallium/drivers/ilo/ilo_3d_pipeline.c       |    2 +-
 src/gallium/drivers/ilo/ilo_cp.c                |    2 +-
 src/gallium/drivers/ilo/ilo_query.c             |    3 ++-
 src/gallium/drivers/ilo/ilo_resource.c          |   19 +++++++++++--------
 src/gallium/drivers/ilo/ilo_resource.h          |    2 --
 src/gallium/winsys/intel/drm/intel_drm_winsys.c |   12 ++++++++----
 src/gallium/winsys/intel/intel_winsys.h         |   13 ++++---------
 8 files changed, 28 insertions(+), 27 deletions(-)

diff --git a/src/gallium/drivers/ilo/ilo_3d.c b/src/gallium/drivers/ilo/ilo_3d.c
index e9bf410..218849a 100644
--- a/src/gallium/drivers/ilo/ilo_3d.c
+++ b/src/gallium/drivers/ilo/ilo_3d.c
@@ -662,7 +662,7 @@ upload_shaders(struct ilo_3d *hw3d, struct ilo_shader_cache 
*shc)
          intel_bo_unreference(hw3d->kernel.bo);
 
       hw3d->kernel.bo = intel_winsys_alloc_buffer(hw3d->cp->winsys,
-            "kernel bo", new_size, 0);
+            "kernel bo", new_size, INTEL_DOMAIN_CPU);
       if (!hw3d->kernel.bo) {
          ilo_err("failed to allocate kernel bo\n");
          return false;
diff --git a/src/gallium/drivers/ilo/ilo_3d_pipeline.c 
b/src/gallium/drivers/ilo/ilo_3d_pipeline.c
index ca02b35..17ac1e5 100644
--- a/src/gallium/drivers/ilo/ilo_3d_pipeline.c
+++ b/src/gallium/drivers/ilo/ilo_3d_pipeline.c
@@ -95,7 +95,7 @@ ilo_3d_pipeline_create(struct ilo_cp *cp, const struct 
ilo_dev_info *dev)
    p->invalidate_flags = ILO_3D_PIPELINE_INVALIDATE_ALL;
 
    p->workaround_bo = intel_winsys_alloc_buffer(p->cp->winsys,
-         "PIPE_CONTROL workaround", 4096, 0);
+         "PIPE_CONTROL workaround", 4096, INTEL_DOMAIN_INSTRUCTION);
    if (!p->workaround_bo) {
       ilo_warn("failed to allocate PIPE_CONTROL workaround bo\n");
       FREE(p);
diff --git a/src/gallium/drivers/ilo/ilo_cp.c b/src/gallium/drivers/ilo/ilo_cp.c
index e2e0ece..cda58eb 100644
--- a/src/gallium/drivers/ilo/ilo_cp.c
+++ b/src/gallium/drivers/ilo/ilo_cp.c
@@ -160,7 +160,7 @@ ilo_cp_realloc_bo(struct ilo_cp *cp)
     * won't point at the same address, which is needed for jmpbuf
     */
    bo = intel_winsys_alloc_buffer(cp->winsys,
-         "batch buffer", cp->bo_size * 4, 0);
+         "batch buffer", cp->bo_size * 4, INTEL_DOMAIN_CPU);
    if (unlikely(!bo)) {
       /* reuse the old one */
       bo = cp->bo;
diff --git a/src/gallium/drivers/ilo/ilo_query.c 
b/src/gallium/drivers/ilo/ilo_query.c
index 59a6b06..6a7da7f 100644
--- a/src/gallium/drivers/ilo/ilo_query.c
+++ b/src/gallium/drivers/ilo/ilo_query.c
@@ -211,7 +211,8 @@ ilo_query_alloc_bo(struct ilo_query *q, int reg_count, int 
repeat_count,
       if (q->bo)
          intel_bo_unreference(q->bo);
 
-      q->bo = intel_winsys_alloc_buffer(winsys, name, size, 0);
+      q->bo = intel_winsys_alloc_buffer(winsys,
+            name, size, INTEL_DOMAIN_INSTRUCTION);
       q->reg_total = (q->bo) ? reg_total : 0;
    }
 
diff --git a/src/gallium/drivers/ilo/ilo_resource.c 
b/src/gallium/drivers/ilo/ilo_resource.c
index 46eaae6..dbcc5f8 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -997,9 +997,14 @@ tex_create_bo(struct ilo_texture *tex,
             &tiling, &pitch);
    }
    else {
+      const uint32_t initial_domain =
+         (tex->base.bind & (PIPE_BIND_DEPTH_STENCIL |
+                            PIPE_BIND_RENDER_TARGET)) ?
+         INTEL_DOMAIN_RENDER : 0;
+
       bo = intel_winsys_alloc_texture(is->winsys, name,
             tex->bo_width, tex->bo_height, tex->bo_cpp,
-            tex->tiling, tex->bo_flags, &pitch);
+            tex->tiling, initial_domain, &pitch);
 
       tiling = tex->tiling;
    }
@@ -1090,7 +1095,7 @@ tex_create_hiz(struct ilo_texture *tex, const struct 
tex_layout *layout)
 
    tex->hiz.bo = intel_winsys_alloc_texture(is->winsys,
          "hiz texture", hz_width, hz_height, 1,
-         INTEL_TILING_Y, INTEL_ALLOC_FOR_RENDER, &pitch);
+         INTEL_TILING_Y, INTEL_DOMAIN_RENDER, &pitch);
    if (!tex->hiz.bo)
       return false;
 
@@ -1209,10 +1214,6 @@ tex_create(struct pipe_screen *screen,
 
    tex->imported = (handle != NULL);
 
-   if (tex->base.bind & (PIPE_BIND_DEPTH_STENCIL |
-                         PIPE_BIND_RENDER_TARGET))
-      tex->bo_flags |= INTEL_ALLOC_FOR_RENDER;
-
    tex_layout_init(&layout, screen, templ, tex->slices);
 
    switch (templ->target) {
@@ -1316,6 +1317,9 @@ tex_estimate_size(struct pipe_screen *screen,
 static bool
 buf_create_bo(struct ilo_buffer *buf)
 {
+   const uint32_t initial_domain =
+      (buf->base.bind & PIPE_BIND_STREAM_OUTPUT) ?
+      INTEL_DOMAIN_RENDER : 0;
    struct ilo_screen *is = ilo_screen(buf->base.screen);
    const char *name;
    struct intel_bo *bo;
@@ -1339,7 +1343,7 @@ buf_create_bo(struct ilo_buffer *buf)
    }
 
    bo = intel_winsys_alloc_buffer(is->winsys,
-         name, buf->bo_size, buf->bo_flags);
+         name, buf->bo_size, initial_domain);
    if (!bo)
       return false;
 
@@ -1372,7 +1376,6 @@ buf_create(struct pipe_screen *screen, const struct 
pipe_resource *templ)
    pipe_reference_init(&buf->base.reference, 1);
 
    buf->bo_size = templ->width0;
-   buf->bo_flags = 0;
 
    /*
     * From the Sandy Bridge PRM, volume 1 part 1, page 118:
diff --git a/src/gallium/drivers/ilo/ilo_resource.h 
b/src/gallium/drivers/ilo/ilo_resource.h
index cba425c..f11cd94 100644
--- a/src/gallium/drivers/ilo/ilo_resource.h
+++ b/src/gallium/drivers/ilo/ilo_resource.h
@@ -81,7 +81,6 @@ struct ilo_buffer {
 
    struct intel_bo *bo;
    unsigned bo_size;
-   unsigned bo_flags;
 };
 
 /**
@@ -109,7 +108,6 @@ struct ilo_texture {
    struct pipe_resource base;
 
    bool imported;
-   unsigned bo_flags;
 
    enum pipe_format bo_format;
    struct intel_bo *bo;
diff --git a/src/gallium/winsys/intel/drm/intel_drm_winsys.c 
b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
index 12ae4aa..e119f9e 100644
--- a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
+++ b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
@@ -219,17 +219,18 @@ struct intel_bo *
 intel_winsys_alloc_buffer(struct intel_winsys *winsys,
                           const char *name,
                           unsigned long size,
-                          unsigned long flags)
+                          uint32_t initial_domain)
 {
+   const bool for_render =
+      (initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION));
    const int alignment = 4096; /* always page-aligned */
    drm_intel_bo *bo;
 
-   if (flags == INTEL_ALLOC_FOR_RENDER) {
+   if (for_render) {
       bo = drm_intel_bo_alloc_for_render(winsys->bufmgr,
             name, size, alignment);
    }
    else {
-      assert(!flags);
       bo = drm_intel_bo_alloc(winsys->bufmgr, name, size, alignment);
    }
 
@@ -241,9 +242,12 @@ intel_winsys_alloc_texture(struct intel_winsys *winsys,
                            const char *name,
                            int width, int height, int cpp,
                            enum intel_tiling_mode tiling,
-                           unsigned long flags,
+                           uint32_t initial_domain,
                            unsigned long *pitch)
 {
+   const unsigned long flags =
+      (initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION)) ?
+      BO_ALLOC_FOR_RENDER : 0;
    uint32_t real_tiling = tiling;
    drm_intel_bo *bo;
 
diff --git a/src/gallium/winsys/intel/intel_winsys.h 
b/src/gallium/winsys/intel/intel_winsys.h
index ccc4620..b16f3a2 100644
--- a/src/gallium/winsys/intel/intel_winsys.h
+++ b/src/gallium/winsys/intel/intel_winsys.h
@@ -62,11 +62,6 @@ enum intel_tiling_mode {
    INTEL_TILING_Y    = 2,
 };
 
-/* this is compatible with intel_bufmgr.h's definitions */
-enum intel_alloc_flag {
-   INTEL_ALLOC_FOR_RENDER     = 1 << 0,
-};
-
 struct winsys_handle;
 struct intel_winsys;
 struct intel_context;
@@ -117,13 +112,13 @@ intel_winsys_read_reg(struct intel_winsys *winsys,
  *
  * \param name             Informative description of the bo.
  * \param size             Size of the bo.
- * \param flags            bitmask of enum intel_alloc_flag.
+ * \param initial_domain   Initial (write) domain.
  */
 struct intel_bo *
 intel_winsys_alloc_buffer(struct intel_winsys *winsys,
                           const char *name,
                           unsigned long size,
-                          unsigned long flags);
+                          uint32_t initial_domain);
 
 /**
  * Allocate a 2-dimentional buffer object.
@@ -133,7 +128,7 @@ intel_winsys_alloc_buffer(struct intel_winsys *winsys,
  * \param height           Height of the bo.
  * \param cpp              Bytes per texel.
  * \param tiling           Tiling mode.
- * \param flags            bitmask of enum intel_alloc_flag.
+ * \param initial_domain   Initial (write) domain.
  * \param pitch            Pitch of the bo.
  */
 struct intel_bo *
@@ -141,7 +136,7 @@ intel_winsys_alloc_texture(struct intel_winsys *winsys,
                            const char *name,
                            int width, int height, int cpp,
                            enum intel_tiling_mode tiling,
-                           unsigned long flags,
+                           uint32_t initial_domain,
                            unsigned long *pitch);
 
 /**

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