Module: Mesa
Branch: master
Commit: 27888977c1f1104d52caac8f023eeeaad7fabbec
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=27888977c1f1104d52caac8f023eeeaad7fabbec
Author: Timothy Arceri <tarc...@itsqueeze.com>
Date: Fri Nov 10 21:33:37 2017 +1100
st/glsl_to_nir/radeonsi: enable gs support for nir backend
Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com>
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/radeonsi/si_get.c | 3 +-
src/gallium/drivers/radeonsi/si_shader_nir.c | 61 +++++++++++++++-------------
src/mesa/state_tracker/st_glsl_to_nir.cpp | 12 ++++++
3 files changed, 47 insertions(+), 29 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_get.c
b/src/gallium/drivers/radeonsi/si_get.c
index 7646ea8255..1c84a252ef 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -227,7 +227,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum
pipe_cap param)
case PIPE_CAP_GLSL_FEATURE_LEVEL:
if (sscreen->debug_flags & DBG(NIR))
- return 140; /* no geometry and tessellation shaders yet
*/
+ return 150; /* no tessellation shaders yet */
if (si_have_tgsi_compute(sscreen))
return 450;
return 420;
@@ -452,6 +452,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen,
case PIPE_SHADER_CAP_PREFERRED_IR:
if (sscreen->debug_flags & DBG(NIR) &&
(shader == PIPE_SHADER_VERTEX ||
+ shader == PIPE_SHADER_GEOMETRY ||
shader == PIPE_SHADER_FRAGMENT))
return PIPE_SHADER_IR_NIR;
return PIPE_SHADER_IR_TGSI;
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 1b502b33e9..4138e04dcb 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -130,6 +130,7 @@ void si_nir_scan_shader(const struct nir_shader *nir,
unsigned i;
assert(nir->info.stage == MESA_SHADER_VERTEX ||
+ nir->info.stage == MESA_SHADER_GEOMETRY ||
nir->info.stage == MESA_SHADER_FRAGMENT);
info->processor = pipe_shader_type_from_mesa(nir->info.stage);
@@ -151,8 +152,6 @@ void si_nir_scan_shader(const struct nir_shader *nir,
unsigned attrib_count =
glsl_count_attribute_slots(variable->type,
nir->info.stage == MESA_SHADER_VERTEX);
- assert(attrib_count == 1 && "not implemented");
-
/* Vertex shader inputs don't have semantics. The state
* tracker has already mapped them to attributes via
* variable->data.driver_location.
@@ -160,6 +159,9 @@ void si_nir_scan_shader(const struct nir_shader *nir,
if (nir->info.stage == MESA_SHADER_VERTEX)
continue;
+ assert(nir->info.stage != MESA_SHADER_FRAGMENT ||
+ (attrib_count == 1 && "not implemented"));
+
/* Fragment shader position is a system value. */
if (nir->info.stage == MESA_SHADER_FRAGMENT &&
variable->data.location == VARYING_SLOT_POS) {
@@ -559,33 +561,36 @@ bool si_nir_build_llvm(struct si_shader_context *ctx,
struct nir_shader *nir)
{
struct tgsi_shader_info *info = &ctx->shader->selector->info;
- uint64_t processed_inputs = 0;
- nir_foreach_variable(variable, &nir->inputs) {
- unsigned attrib_count =
glsl_count_attribute_slots(variable->type,
-
nir->info.stage == MESA_SHADER_VERTEX);
- unsigned input_idx = variable->data.driver_location;
-
- assert(attrib_count == 1);
-
- LLVMValueRef data[4];
- unsigned loc = variable->data.location;
-
- /* Packed components share the same location so skip
- * them if we have already processed the location.
- */
- if (processed_inputs & ((uint64_t)1 << loc))
- continue;
-
- if (nir->info.stage == MESA_SHADER_VERTEX)
- declare_nir_input_vs(ctx, variable, data);
- else if (nir->info.stage == MESA_SHADER_FRAGMENT)
- declare_nir_input_fs(ctx, variable, input_idx / 4,
data);
-
- for (unsigned chan = 0; chan < 4; chan++) {
- ctx->inputs[input_idx + chan] =
- LLVMBuildBitCast(ctx->ac.builder, data[chan],
ctx->ac.i32, "");
+ if (nir->info.stage == MESA_SHADER_VERTEX ||
+ nir->info.stage == MESA_SHADER_FRAGMENT) {
+ uint64_t processed_inputs = 0;
+ nir_foreach_variable(variable, &nir->inputs) {
+ unsigned attrib_count =
glsl_count_attribute_slots(variable->type,
+
nir->info.stage == MESA_SHADER_VERTEX);
+ unsigned input_idx = variable->data.driver_location;
+
+ assert(attrib_count == 1);
+
+ LLVMValueRef data[4];
+ unsigned loc = variable->data.location;
+
+ /* Packed components share the same location so skip
+ * them if we have already processed the location.
+ */
+ if (processed_inputs & ((uint64_t)1 << loc))
+ continue;
+
+ if (nir->info.stage == MESA_SHADER_VERTEX)
+ declare_nir_input_vs(ctx, variable, data);
+ else if (nir->info.stage == MESA_SHADER_FRAGMENT)
+ declare_nir_input_fs(ctx, variable, input_idx /
4, data);
+
+ for (unsigned chan = 0; chan < 4; chan++) {
+ ctx->inputs[input_idx + chan] =
+ LLVMBuildBitCast(ctx->ac.builder,
data[chan], ctx->ac.i32, "");
+ }
+ processed_inputs |= ((uint64_t)1 << loc);
}
- processed_inputs |= ((uint64_t)1 << loc);
}
ctx->abi.inputs = &ctx->inputs[0];
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index e1f47d88dd..5d18e7b62b 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -655,6 +655,18 @@ st_finalize_nir(struct st_context *st, struct gl_program
*prog,
&nir->num_outputs,
nir->info.stage);
st_nir_fixup_varying_slots(st, &nir->outputs);
+ } else if (nir->info.stage == MESA_SHADER_GEOMETRY) {
+ sort_varyings(&nir->inputs);
+ st_nir_assign_var_locations(&nir->inputs,
+ &nir->num_inputs,
+ nir->info.stage);
+ st_nir_fixup_varying_slots(st, &nir->inputs);
+
+ sort_varyings(&nir->outputs);
+ st_nir_assign_var_locations(&nir->outputs,
+ &nir->num_outputs,
+ nir->info.stage);
+ st_nir_fixup_varying_slots(st, &nir->outputs);
} else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
sort_varyings(&nir->inputs);
st_nir_assign_var_locations(&nir->inputs,
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