https://bugs.freedesktop.org/show_bug.cgi?id=72889
--- Comment #4 from Martin Andersson g02ma...@gmail.com ---
I had the the same issue and I bisected it to this commit
http://cgit.freedesktop.org/mesa/mesa/commit/?h=10.0id=e64633e8c3a5498998a45ab721bf80edca101cf5
(r600g,radeonsi: share
bump..
Any chance someone from the pci camp could have a look at this series?
Also, I'm not quite sure about other build systems (android.. and is
scons still a thing?).. something is probably needed for those, but I
wouldn't know how to build with either of those. But something like
this
This was one of the things we always wanted to do to this, to make it more
useful than just (value FIELD_MASK).
---
src/mesa/drivers/dri/i965/brw_defines.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
With all of the flipping and pitch twiddling and miptree layout involved
in our blits, there are lots of ways for us to scribble outside of a
buffer. Put in a check that we're not about to do so.
This catches a bug that glamor was running into.
---
src/mesa/drivers/dri/i965/intel_blit.c | 4
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index c653828..c2ca10d 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++
Noticed by tex3d-maxsize on my next commit to check that our addresses
don't overflow.
---
src/mesa/drivers/dri/i965/intel_blit.c| 20
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 23 ---
2 files changed, 40 insertions(+), 3 deletions(-)
diff
While incorrect, it probably wouldn't affect anyone ever: You'd have to do
an appropriately-formatted readpixels into a PBO, then overwrite the tail
end of the updated area of the PBO with glBufferSubData(), and you
wouldn't get appropriate synchronization.
---
Fixes piglit GL_MESA_pack_invert/readpixels and GPU hangs with glamor and
cairo-gl.
Cc: 10.0 9.2 mesa-sta...@lists.freedesktop.org
---
src/mesa/drivers/dri/i965/intel_pixel_read.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c
The earlier assert made sure that our math didn't exceed our bounds, but
this makes sure that we don't overflow from the high bits X into the low
bits of Y. We've already put checks in intel_miptree_blit(), but I've
wanted to expand the type in our protoype from short to uint32_t, and we
could
https://bugs.freedesktop.org/show_bug.cgi?id=72895
Michel Dänzer mic...@daenzer.net changed:
What|Removed |Added
Assignee|dri-devel@lists.freedesktop
On Son, 2013-12-22 at 03:46 +0100, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
The renaming was driven by the function st_mesa_format_to_pipe_format.
Only whole words are renamed to prevent regressions.
For the MESA formats which don't have corresponding PIPE formats, I tried
On Fre, 2013-12-20 at 12:28 -0800, Mark Mueller wrote:
Also, because these Mesa formats are defined as packed values,
you're
essentially changing the notation from big endian (aka human
readable)
to little endian. It's unfortunate that the packed
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