Re: [Mesa-dev] [PATCH][RFC] dri3: Add support for the GLX_EXT_buffer_age extension

Am 20.02.2014 02:59, schrieb Ian Romanick: On 02/19/2014 02:49 PM, Adel Gadllah wrote: Hi, The attached patch adds support for the GLX_EXT_buffer_age extension, which is mostly used by compositors for efficient sub screen updates. The extension should not be reported as supported when running

[Mesa-dev] [Bug 75061] bug in clearing color buffer

https://bugs.freedesktop.org/show_bug.cgi?id=75061 --- Comment #6 from Maxim ya.maxi...@yandex.ru --- (In reply to comment #5) Created attachment 94321 [details] [review] Bail if rr-buf is NULL Does this patch help? (In reply to comment #3) valgrind + hellgrind Thanks, but the proper

[Mesa-dev] [Bug 75061] bug in clearing color buffer

https://bugs.freedesktop.org/show_bug.cgi?id=75061 --- Comment #7 from Maxim ya.maxi...@yandex.ru --- Created attachment 94418 -- https://bugs.freedesktop.org/attachment.cgi?id=94418action=edit gdb with patch -- You are receiving this mail because: You are the assignee for the bug.

[Mesa-dev] [Bug 75061] bug in clearing color buffer

https://bugs.freedesktop.org/show_bug.cgi?id=75061 --- Comment #8 from Maxim ya.maxi...@yandex.ru --- Created attachment 94419 -- https://bugs.freedesktop.org/attachment.cgi?id=94419action=edit valgrind only (with patch) -- You are receiving this mail because: You are the assignee for the

[Mesa-dev] [Bug 75061] bug in clearing color buffer

https://bugs.freedesktop.org/show_bug.cgi?id=75061 --- Comment #9 from Maxim ya.maxi...@yandex.ru --- Created attachment 94422 -- https://bugs.freedesktop.org/attachment.cgi?id=94422action=edit valgrind + helgrind (with patch) -- You are receiving this mail because: You are the assignee for

[Mesa-dev] [PATCH 0/3] dri3: Add GLX_EXT_buffer_age support

Hi, OK here are updated patches based on the review comments. The first one simply updates the glxext.h header even though that turned out to not be required for this but it doesn't hurt doing it anyway. The second one refactors glx_pbuffer based on the review comments from Ian (assuming I got

[Mesa-dev] [PATCH 3/3] dri3: Add GLX_EXT_buffer_age support

--- src/glx/dri2_glx.c | 1 + src/glx/dri3_glx.c | 18 ++ src/glx/dri3_priv.h | 2 ++ src/glx/glx_pbuffer.c | 8 src/glx/glxclient.h | 1 + src/glx/glxextensions.c | 1 + src/glx/glxextensions.h | 1 + 7 files changed, 32 insertions(+) diff

[Mesa-dev] [PATCH 2/3] glx_pbuffer: Refactor GetDrawableAttribute

Move the pdraw != NULL check out so that they don't have to be duplicated. --- src/glx/glx_pbuffer.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/glx/glx_pbuffer.c b/src/glx/glx_pbuffer.c index 411d6e5..978730c 100644 --- a/src/glx/glx_pbuffer.c +++

[Mesa-dev] [PATCH 1/3] glx: Update glxext.h to revision 25407

--- include/GL/glxext.h | 32 +--- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/include/GL/glxext.h b/include/GL/glxext.h index 8c642f3..826fda5 100644 --- a/include/GL/glxext.h +++ b/include/GL/glxext.h @@ -6,7 +6,7 @@ extern C { #endif /* -**

Re: [Mesa-dev] [PATCH] st/omx/enc: add multi scaling buffers for performance improvement

Am 19.02.2014 18:17, schrieb Leo Liu: From: Leo Liu leo@amd.com Signed-off-by: Leo Liu leo@amd.com Reviewed and pushed. Thanks, Christian. --- src/gallium/state_trackers/omx/vid_enc.c | 38 src/gallium/state_trackers/omx/vid_enc.h | 7 -- 2

Re: [Mesa-dev] [PATCH 5/9] glsl: Fix memcpy size in ir_constant

On Wed, Feb 19, 2014 at 4:35 AM, Ian Romanick i...@freedesktop.org wrote: On 02/09/2014 01:50 AM, Juha-Pekka Heikkilä wrote: The place which cause Klocwork to highlight this is at src/mesa/main/ff_fragment_shader.cpp around line 897 where it says: ... float const_data[4] = {

[Mesa-dev] classic dri driver cleanup broke --disable-dri

Hi Folks, Since commit ee55500c (configure: cleanup classic dri drivers handling, 2014-02-04) when I build from source using $ ./autogen.sh --disable-dri it fails with this error message: configure: error: classic DRI driver 'yes' does not exist I'm not sure whether it is related but I also

[Mesa-dev] [Bug 75126] configure: error: classic DRI driver 'yes' does not exist

https://bugs.freedesktop.org/show_bug.cgi?id=75126 --- Comment #2 from Brad King brad.k...@kitware.com --- I encountered the same issue and can confirm that 0001-configure-use-default-dri-drivers-whenever-opengl-an.patch fixes it for me. Thanks! -- You are receiving this mail because: You are

Re: [Mesa-dev] [PATCH] configure: use shared-glapi when more than one gl* API is used

Emil Velikov emil.l.veli...@gmail.com writes: Current behaviour states that shared-glapi is usefull when building with dri, which is not the case. Shared-glapi is used to dispatch the gl* functions across the one or more gl api's which can be dri based but do not need to be. Fixed the

[Mesa-dev] [PATCH 5/8] r600g: Use util_cpu_to_le32() instead of bswap32() on big-endian systems

--- src/gallium/drivers/r600/r600_asm.c | 2 +- src/gallium/drivers/r600/r600_shader.c | 2 +- src/gallium/drivers/r600/r600_state_common.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/r600/r600_asm.c

[Mesa-dev] [PATCH 4/8] radeonsi: Use util_cpu_to_le32() instead of bswap32() on big-endian systems

--- src/gallium/drivers/radeonsi/si_descriptors.c | 2 +- src/gallium/drivers/radeonsi/si_shader.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index d45bc80..9b10d01

[Mesa-dev] [PATCH 8/8] clover: Pass buffer offsets to the driver in set_global_binding() v3

The offsets will be stored in the handles parameter. This makes it possible to use sub-buffers. v2: - Style fixes - Add support for constant sub-buffers - Store handles in device byte order v3: - Use endian helpers --- src/gallium/drivers/r600/evergreen_compute.c | 7 ++-

[Mesa-dev] [PATCH 3/8] util: Add util_cpu_to_le* helpers

--- src/gallium/auxiliary/util/u_math.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/auxiliary/util/u_math.h b/src/gallium/auxiliary/util/u_math.h index 0f498bc..ffbcc4c 100644 --- a/src/gallium/auxiliary/util/u_math.h +++ b/src/gallium/auxiliary/util/u_math.h @@ -726,6

[Mesa-dev] [PATCH 1/8] configure.ac: Use AX_GCC_BUILTIN to check availability of __builtin_bswap32

--- configure.ac| 6 ++ m4/ax_gcc_builtin.m4| 168 src/gallium/auxiliary/util/u_math.h | 3 +- 3 files changed, 176 insertions(+), 1 deletion(-) create mode 100644 m4/ax_gcc_builtin.m4 diff --git a/configure.ac

[Mesa-dev] [PATCH 7/8] clover: Make resource::bind_surface() const

--- src/gallium/state_trackers/clover/core/resource.cpp | 2 +- src/gallium/state_trackers/clover/core/resource.hpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/state_trackers/clover/core/resource.cpp b/src/gallium/state_trackers/clover/core/resource.cpp

[Mesa-dev] [PATCH 6/8] radeonsi: Use SI_BIG_ENDIAN now that it exists

--- src/gallium/drivers/radeonsi/si_shader.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 9b04e6b..7776821 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++

[Mesa-dev] [PATCH 2/8] util: Add util_bswap64() v2

v2: - Use __builtin_bswap64() - Remove unnecessary mask - Add util_le64_to_cpu() helper --- configure.ac| 2 ++ src/gallium/auxiliary/util/u_math.h | 16 2 files changed, 18 insertions(+) diff --git a/configure.ac b/configure.ac index

[Mesa-dev] [Bug 75278] New: st_program.c:1099: undefined reference to `ureg_property_gs_invocations'

https://bugs.freedesktop.org/show_bug.cgi?id=75278 Priority: medium Bug ID: 75278 Keywords: regression CC: anuj.pho...@gmail.com, jljus...@gmail.com, stereotype...@gmail.com Assignee: mesa-dev@lists.freedesktop.org

[Mesa-dev] [PATCH] dri3: Enable GLX_MESA_query_renderer on DRI3 too

From: Ian Romanick ian.d.roman...@intel.com This should have happend around the time of commit 4680d23, but Keith's DRI3 patches and my GLX_MESA_query_renderer patches crossed in the mail. I don't have a working DRI3 setup, so I haven't been able to actually verify this. I'm hoping that someone

[Mesa-dev] [PATCH 00/19] i965/fs clean ups

Matt Turner (19): i965: Reduce predicate field of backend_instruction to uint8_t. i965: Mark brw_reg_type and register_file enums as PACKED. i965/fs: Reduce the sizes of some fs_reg members. i965/fs: Make fs_reg's type an enum for better debugging. i965/fs: Reorder fs_reg for better

[Mesa-dev] [PATCH 02/19] i965: Mark brw_reg_type and register_file enums as PACKED.

Will now take a byte, rather than four. --- src/mesa/drivers/dri/i965/brw_reg.h| 3 ++- src/mesa/drivers/dri/i965/brw_shader.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h index

[Mesa-dev] [PATCH 05/19] i965/fs: Reorder fs_reg for better packing.

--- src/mesa/drivers/dri/i965/brw_fs.h | 30 +++--- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index d3a5f85..a1f7222 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++

[Mesa-dev] [PATCH 01/19] i965: Reduce predicate field of backend_instruction to uint8_t.

--- src/mesa/drivers/dri/i965/brw_shader.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index c76f33b..4c79861 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++

[Mesa-dev] [PATCH 06/19] i965/fs: Reduce the sizes of some fs_inst members.

--- src/mesa/drivers/dri/i965/brw_fs.h | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index a1f7222..7da66ed 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++

[Mesa-dev] [PATCH 03/19] i965/fs: Reduce the sizes of some fs_reg members.

--- src/mesa/drivers/dri/i965/brw_fs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index c6f4ffb..38fa34b 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 04/19] i965/fs: Make fs_reg's type an enum for better debugging.

Since the enum is marked as packed, it'll still take only one byte. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +++--- src/mesa/drivers/dri/i965/brw_fs.h | 6 +++--- src/mesa/drivers/dri/i965/brw_shader.cpp | 2 +- src/mesa/drivers/dri/i965/brw_shader.h | 3 ++- 4 files changed, 9

[Mesa-dev] [PATCH 07/19] i965/fs: Reorder fs_inst's fields for better packing.

--- src/mesa/drivers/dri/i965/brw_fs.h | 20 +++- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 7da66ed..b4e69ba 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++

[Mesa-dev] [PATCH 13/19] i965/fs: Make fs_visitor::emit take a constant reference to an fs_inst.

It makes a copy internally, so making a second copy is unnecessary. --- src/mesa/drivers/dri/i965/brw_fs.h | 2 +- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 17/19] i965/fs: ralloc fs_inst's fs_reg sources.

Potentially we'll want more than three sources for Phi nodes. To avoid passing a mem_ctx parameter into each fs_inst() constructor, we add a static thread-local variable to fs_inst that we set in the fs_visitor() constructor. --- Is __thread good enough? What about multi-context GL?

[Mesa-dev] [PATCH 15/19] i965/fs: Disable fs_inst assignment operator.

The fs_reg src array is going to turn into a pointer and we'd rather not consider the implications of shallow copying fs_insts. --- src/mesa/drivers/dri/i965/brw_fs.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 10/19] i965/fs: Drop redundant zero assignments in fs_inst::init().

Unfortunately the compiler isn't able to recognize that assigning reg_undef is just zeroing the fs_reg, which was already done by the above memset. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 6 -- 1 file changed, 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp

[Mesa-dev] [PATCH 19/19] i965/fs: Add a function to resize fs_inst's sources array.

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 9 + src/mesa/drivers/dri/i965/brw_fs.h | 2 ++ 2 files changed, 11 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 997b411..ce50e8b 100644 ---

[Mesa-dev] [PATCH 12/19] i965/fs: Pass fs_regs by constant reference where possible.

These functions (modulo emit_lrp, necessitating the small fix-up) pass these arguments by value unmodified to other functions. No point in making an additional copy. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 7 --- src/mesa/drivers/dri/i965/brw_fs.h | 14 --

[Mesa-dev] [PATCH 11/19] i965/fs: Move setting opcode = NOP to its one useful location.

All other callers of init() immediately set opcode to something else. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index e51cdbd..37b5bb0 100644 ---

[Mesa-dev] [PATCH 08/19] i965/fs: Use a bitfield for fs_inst's bool fields.

--- src/mesa/drivers/dri/i965/brw_fs.h | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index b4e69ba..a1f33e7 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++

[Mesa-dev] [PATCH 18/19] i965/fs: Store the number of sources an fs_inst has.

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 13 +++-- src/mesa/drivers/dri/i965/brw_fs.h | 3 ++- 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 4d13446..997b411 100644 ---

[Mesa-dev] [PATCH 14/19] i965/fs: Add and use an fs_inst copy constructor.

Will get more complicated when fs_reg src becomes a pointer. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 5 + src/mesa/drivers/dri/i965/brw_fs.h | 1 + src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 +-- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git

[Mesa-dev] [PATCH 09/19] i965/fs: Use reg_undef instead of unset fs_reg constructor.

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 4 ++-- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp

[Mesa-dev] [PATCH 16/19] i965/fs: Combine fs_inst constructors using default parameters.

Wouldn't it be nice if case labels could be non-constant expressions. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 77 +--- src/mesa/drivers/dri/i965/brw_fs.h | 10 ++--- 2 files changed, 31 insertions(+), 56 deletions(-) diff --git

[Mesa-dev] [Bug 71870] Metro: Last Light rendering issues

https://bugs.freedesktop.org/show_bug.cgi?id=71870 Thomas Rohloff v10la...@myway.de changed: What|Removed |Added Status|VERIFIED|REOPENED

[Mesa-dev] [Bug 71870] Metro: Last Light rendering issues

https://bugs.freedesktop.org/show_bug.cgi?id=71870 Kenneth Graunke kenn...@whitecape.org changed: What|Removed |Added Status|REOPENED|RESOLVED

[Mesa-dev] [Bug 75286] New: make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 Priority: medium Bug ID: 75286 Assignee: mesa-dev@lists.freedesktop.org Summary: make error with Gallium i915/DRM configuration Severity: normal Classification: Unclassified

[Mesa-dev] [PATCH] tgsi_ureg: add property_gs_invocations

Fixes a build break in state_tracker/st_program.c Signed-off-by: Jordan Justen jordan.l.jus...@intel.com Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75278 Cc: Vinson Lee v...@freedesktop.org --- src/gallium/auxiliary/tgsi/tgsi_ureg.c | 7 +++ src/gallium/auxiliary/tgsi/tgsi_ureg.h

[Mesa-dev] [Bug 75286] make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 --- Comment #1 from Emil Velikov emil.l.veli...@gmail.com --- The gallium i915 is a bit special, as it's the only driver to have both sw and drm based winsys. When you disable dri, you essentially state there will be no drm winsys, thus the

[Mesa-dev] [Bug 75286] make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 --- Comment #2 from Stephane Marchesin marche...@icps.u-strasbg.fr --- I wonder if we should just remove the i915 sw winsys... I certainly don't use/test it and it's confusing (like in this case where people thing they're still getting

[Mesa-dev] [Bug 75286] make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 --- Comment #3 from Christian Prochaska christian.procha...@genode-labs.com --- So, which configuration would be the one to use for accelerated rendering on i915 without X11? -- You are receiving this mail because: You are the assignee for the

[Mesa-dev] [Bug 75286] make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 --- Comment #4 from Emil Velikov emil.l.veli...@gmail.com --- (In reply to comment #2) I wonder if we should just remove the i915 sw winsys... I certainly don't use/test it and it's confusing (like in this case where people thing they're still

Re: [Mesa-dev] [PATCH] i965: Avoid dependency hints on math opcodes

On 02/12/2014 04:24 PM, m...@lunarg.com wrote: From: Mike Stroyan m...@lunarg.com Putting NoDDClr and NoDDChk dependency control on instruction sequences that include math opcodes can cause corruption of channels. Treat math opcodes like send opcodes and suppress dependency hinting. Since

[Mesa-dev] [Bug 75286] make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 --- Comment #5 from Stephane Marchesin marche...@icps.u-strasbg.fr --- (In reply to comment #4) (In reply to comment #2) I wonder if we should just remove the i915 sw winsys... I certainly don't use/test it and it's confusing (like in this

Re: [Mesa-dev] [PATCH 1/6] i965: Fix miptree matching for multisampled, non-interleaved miptrees.

On 02/19/2014 05:30 PM, Eric Anholt wrote: We haven't been executing this code before the meta-blit case, because we've been flagging the miptree as validated at texstorage time, and never having to revalidate. --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 15 ++-

[Mesa-dev] [Bug 75278] st_program.c:1099: undefined reference to `ureg_property_gs_invocations'

https://bugs.freedesktop.org/show_bug.cgi?id=75278 Jordan Justen jljus...@gmail.com changed: What|Removed |Added Status|NEW |RESOLVED

[Mesa-dev] [Bug 75286] make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 --- Comment #6 from Christian Prochaska christian.procha...@genode-labs.com --- (In reply to comment #4) (In reply to comment #2) I wonder if we should just remove the i915 sw winsys... I certainly don't use/test it and it's confusing (like

Re: [Mesa-dev] [PATCH] i965: Avoid dependency hints on math opcodes

Ian, Here is a shader_test version. It lacks the sparkling uncertainty of the pixel values in the previous animated example program. It just gets all vertices uniformly wrong when I run it. On Thu, Feb 20, 2014 at 4:31 PM, Ian Romanick i...@freedesktop.org wrote: On 02/12/2014 04:24 PM,

[Mesa-dev] [Bug 75286] make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 --- Comment #7 from Emil Velikov emil.l.veli...@gmail.com --- (In reply to comment #5) [snip] I ship i915g on Chrome OS, so it is maintained. I don't encounter many issues with it, though, so there's not many commits. As for i915 + sw winsys,

Re: [Mesa-dev] [PATCH] dri3: Enable GLX_MESA_query_renderer on DRI3 too

On 20/02/14 19:47, Ian Romanick wrote: From: Ian Romanick ian.d.roman...@intel.com This should have happend around the time of commit 4680d23, but Keith's DRI3 patches and my GLX_MESA_query_renderer patches crossed in the mail. I don't have a working DRI3 setup, so I haven't been able to

Re: [Mesa-dev] [PATCH 4/8] radeonsi: Use util_cpu_to_le32() instead of bswap32() on big-endian systems

On Don, 2014-02-20 at 10:21 -0800, Tom Stellard wrote: diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 54270cd..9b04e6b 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2335,7

[Mesa-dev] [Bug 75286] make error with Gallium i915/DRM configuration

https://bugs.freedesktop.org/show_bug.cgi?id=75286 --- Comment #8 from Christian Prochaska christian.procha...@genode-labs.com --- (In reply to comment #7) For compilation purposes you will need the headers but as far as runtime is concerned you should be fine. Seems to be only a missing

Re: [Mesa-dev] [PATCH] i965: Avoid dependency hints on math opcodes

On Thu, Feb 20, 2014 at 4:55 PM, Mike Stroyan m...@lunarg.com wrote: Ian, Here is a shader_test version. It lacks the sparkling uncertainty of the pixel values in the previous animated example program. It just gets all vertices uniformly wrong when I run it. Thanks for the test Mike. I

Re: [Mesa-dev] [PATCH 4/8] radeonsi: Use util_cpu_to_le32() instead of bswap32() on big-endian systems

FWIW, memcpy() vs a for() loop has different semantics with respect to address alignment. I don't know how much it will matter, but last time I was reading assembly output, copying int[] via for() loop didn't produce a codepath for 16-byte aligned addresses (allowing for SSE streaming) while

Re: [Mesa-dev] [PATCH 1/8] configure.ac: Use AX_GCC_BUILTIN to check availability of __builtin_bswap32

On Thu, Feb 20, 2014 at 10:21 AM, Tom Stellard thomas.stell...@amd.com wrote: --- configure.ac| 6 ++ m4/ax_gcc_builtin.m4| 168 src/gallium/auxiliary/util/u_math.h | 3 +- 3 files changed, 176 insertions(+),

[Mesa-dev] [PATCH] nouveau: add a nouveau_compiler binary to compile TGSI into shader ISA

This makes it easy to compare output between different cards, especially for ones that you don't have (and/or not in the current machine). Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- This currently only works for nv50+, but it'd probably be possible to split the code paths and introduce

[Mesa-dev] [PATCH 3/4] nv30: remove unused sprite flipping parameter

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- I assume this is some left-over from nvfx - nv30? That flag certainly doesn't do anything now... src/gallium/drivers/nouveau/nv30/nv30_context.h | 3 +-- src/gallium/drivers/nouveau/nv30/nv30_fragprog.c | 2 +-

[Mesa-dev] [PATCH 1/4] nv30: remove use_nv4x, it is identical to is_nv4x

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- Perhaps there was a day when those were different, but that day is not today. src/gallium/drivers/nouveau/nv30/nv30_context.c | 1 - src/gallium/drivers/nouveau/nv30/nv30_context.h | 1 - src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c |

[Mesa-dev] [PATCH 2/4] nv30: remove unused render_mode and hw_pointsprite_control

Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- Were these things that didn't get quite ported over from the old nvfx? If so, does it matter? Are they things we need? Even if they are, they can be implemented in a way that doesn't put that state into nv30_context.

[Mesa-dev] [PATCH 4/4] nv30: remove nv30_context use from nvfx_*prog

This should pave the way to being able to use the compiler without a context. Also leads to cleaner code. Signed-off-by: Ilia Mirkin imir...@alum.mit.edu --- So... there was a bit of an oops on this patch, I realized that NOUVEAU_ERR was supplied in silly places and decided to move it to a

[Mesa-dev] [PATCH V2 00/22] ARB_texture_view support for i965

This series adds support for texture views on i965. I think it's fairly complete, but have probably still missed some things. It would be great if someone at Intel can run the relevant parts of oglconform against this. Big changes from V1: * Level/layer clamping behavior is fixed. [there were

[Mesa-dev] [PATCH V2 03/22] i965: Include #slices in miptree debug

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index eca876b..e43c1ff 100644 ---

[Mesa-dev] [PATCH V2 01/22] i965: Pretend we don't support BRW_SURFACEFORMAT_R16G16B16_FLOAT for textures.

None of the other 3-component 16bpc formats are directly supported, so they get promoted to XRGB equivalents. *Not* promoting RGB16F the same way makes texture views much more fiddly -- we don't want to have to do crazy copying behind the scenes. (with my other master + my experimental

[Mesa-dev] [PATCH V2 02/22] mesa: Adjust _MaxLevel computation to account for views

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/main/texobj.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c index 6adc0ae..67c362d 100644 --- a/src/mesa/main/texobj.c +++ b/src/mesa/main/texobj.c @@ -557,6 +557,13 @@

[Mesa-dev] [PATCH V2 05/22] i965: refactor format selection for unsupported ETC* formats

We will need to call this to munge view formats. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 76 +++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 ++ 2 files changed, 45 insertions(+), 34 deletions(-) diff --git

[Mesa-dev] [PATCH V2 06/22] i965: Skip texture validation for immutable-format textures.

We're about to start sharing miptrees in texture views, and I'd rather not teach this validation code about nonzero MinLevel or MinLayer when views are guaranteed complete [and all levels resident in the base miptree]. The only thing we have to do is set up our _MaxLevel derived state.

[Mesa-dev] [PATCH V2 04/22] i965: refactor format munging for separate stencil

We will need this for munging the view's format. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 31 --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 +++ 2 files changed, 26 insertions(+), 8 deletions(-) diff --git

[Mesa-dev] [PATCH V2 07/22] i965: Add driver hook for TextureView

We need to wire the original texture's mt into the view. All the hard work of setting up an appropriate tree of gl_texture_image structures has already been done by core mesa. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_tex.c | 41

[Mesa-dev] [PATCH V2 09/22] i965: Adjust surface_state emission to account for view parameters

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index

[Mesa-dev] [PATCH V2 08/22] i965: Add _Format to intel_texobj.

This is the actual mesa_format to use. In non-view cases this is always the same as the mt's format. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_tex.c | 8 src/mesa/drivers/dri/i965/intel_tex_obj.h | 5 +

[Mesa-dev] [PATCH V2 18/22] i965/blorp: Use irb-layer_count in clear

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp index 9159df5..039bc03 100644 ---

[Mesa-dev] [PATCH V2 11/22] i965: Adjust map/unmap code for MinLevel/MinLayer

This allows core mesa's TexSubImage paths etc to work correctly with views which have nonzero MinLevel or MinLayer. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_tex.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH V2 12/22] i965: Account for MinLevel in texture upload fast path

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c index 489b6ad..c2875dd 100644

[Mesa-dev] [PATCH V2 10/22] i965: Don't try to use fast upload path for nontrivial views

This will eventually be relaxed, but we'll get the fallback path working first. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c

[Mesa-dev] [PATCH V2 20/22] i965: Account for view parameters in fast depth clears

V2: - No need for layer_multiplier; multisampled depth surfaces are IMS. - Remove unused num_layers. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/brw_clear.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH V2 22/22] docs: Mark off ARB_texture_view and add to release notes for 10.2.

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- docs/GL3.txt| 2 +- docs/relnotes/10.2.html | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index 542ee28..f53e92a 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -162,7 +162,7 @@ GL 4.3:

[Mesa-dev] [PATCH V2 15/22] i965: Add `layered` parameter to intel_update_renderbuffer_wrapper

We're about to need this so we can determine the layer count of the wrapper. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_fbo.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c

[Mesa-dev] [PATCH V2 19/22] i965/blorp: Account for nonzero MinLayer in layered clears.

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp index 039bc03..9e7252f 100644 ---

[Mesa-dev] [PATCH V2 17/22] i965: Add layer_count to intel_renderbuffer

This is the effective layer count, for clears etc. This differs from the depth of the miptree level when views are involved. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_fbo.c | 10 ++ src/mesa/drivers/dri/i965/intel_fbo.h | 3 +++ 2 files changed, 13

[Mesa-dev] [PATCH V2 13/22] i965: Enable texture upload fast path with MinLevel

We'll still avoid MinLayer here since the fast path doesn't understand arrays at all, but it's straightforward to do levels. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH V2 14/22] i965: Adjust renderbuffer wrapper to account for MinLevel/MinLayer

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_fbo.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index d11cdb6..a2ed5d2 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c

[Mesa-dev] [PATCH V2 16/22] i965: Pull out layer_multiplier in intel_update_renderbuffer_wrapper

We're about to need this in another place. Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_fbo.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index

[Mesa-dev] [PATCH V2 21/22] i965: Enable ARB_texture_view on Gen7+

Signed-off-by: Chris Forbes chr...@ijw.co.nz --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index ef9aa55..0bd1115 100644 ---