From: Samuel Iglesias Gonsalvez
This takes care of generating code required to handle transform feedback.
Notice that transform feedback isn't enabled yet, since that requires
additional setups in other parts of the code that will come in later patches.
Signed-off-by: Samuel Iglesias Gonsalvez
On Thu, Sep 18, 2014 at 11:50 PM, Samuel Iglesias Gonsálvez
wrote:
> On Thu, 2014-09-18 at 16:05 -0700, Jordan Justen wrote:
>> On Thu, Aug 14, 2014 at 4:12 AM, Iago Toral Quiroga
>> wrote:
>> > From: Samuel Iglesias Gonsalvez
>> >
>> > + this->xfb_output = src_reg(this,
>> > +
On vie, 2014-09-19 at 00:26 -0700, Jordan Justen wrote:
> On Thu, Sep 18, 2014 at 11:50 PM, Samuel Iglesias Gonsálvez
> wrote:
> > On Thu, 2014-09-18 at 16:05 -0700, Jordan Justen wrote:
> >> On Thu, Aug 14, 2014 at 4:12 AM, Iago Toral Quiroga
> >> wrote:
> >> > From: Samuel Iglesias Gonsalvez
https://bugs.freedesktop.org/show_bug.cgi?id=84089
Iaroslav Andrusyak changed:
What|Removed |Added
Assignee|dri-devel@lists.freedesktop |mesa-dev@lists.freedesktop.
https://bugs.freedesktop.org/show_bug.cgi?id=84089
--- Comment #1 from Christian König ---
(In reply to comment #0)
> I changed num_sgprs <= 104 to num_sgprs <= 204 and add fprint for num_sgprs
> and user_sgprs
??? 104 is a hardware limit, you can't change it. You probably just need to use
a ne
https://bugs.freedesktop.org/show_bug.cgi?id=84089
--- Comment #2 from Iaroslav Andrusyak ---
i use llvm-svn|git from yesterday, and 6-7 days ago valley fork fine.
--
You are receiving this mail because:
You are the assignee for the bug.
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mesa-dev
https://bugs.freedesktop.org/show_bug.cgi?id=84089
--- Comment #3 from Christian König ---
(In reply to comment #2)
> i use llvm-svn|git from yesterday, and 6-7 days ago valley fork fine.
Ah! Then some change in LLVM broke register spilling, please bisect LLVM to
figure out what it was.
Thanks,
Also, as suggested by Ian Romanick, make it so we don't need a bunch of
individual handles to flippable matrices, instead we register
matrix/transpose_matrix pairs in a hash table for all built-in matrices
using the non-transpose matrix name as key.
---
src/glsl/opt_flip_matrices.cpp | 159 +++
On Fri, 2014-09-19 at 12:52 +0200, Iago Toral Quiroga wrote:
> Also, as suggested by Ian Romanick, make it so we don't need a bunch of
> individual handles to flippable matrices, instead we register
> matrix/transpose_matrix pairs in a hash table for all built-in matrices
> using the non-transpose
On vie, 2014-09-19 at 21:16 +1000, Timothy Arceri wrote:
> On Fri, 2014-09-19 at 12:52 +0200, Iago Toral Quiroga wrote:
> > Also, as suggested by Ian Romanick, make it so we don't need a bunch of
> > individual handles to flippable matrices, instead we register
> > matrix/transpose_matrix pairs in
The series looks good to me. Nice catches.
Reviewed-by: Brian Paul
-Brian
On 09/18/2014 05:32 PM, Kenneth Graunke wrote:
Dead since the _MaxElement removal, but these functions seemed generally
applicable, so I decided to remove them in a separate patch.
Signed-off-by: Kenneth Graunke
---
https://bugs.freedesktop.org/show_bug.cgi?id=84089
--- Comment #4 from Tom Stellard ---
Created attachment 106551
--> https://bugs.freedesktop.org/attachment.cgi?id=106551&action=edit
Fix
Can you try this patch? Make sure you replace the original assert in the mesa
code.
--
You are receivin
From: Roland Scheidegger
Useful to know in some cases.
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h | 6 ++
src/gallium/auxiliary/gallivm/lp_bld_tgsi_info.c | 4
2 files changed, 10 insertions(+)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
b/src/gallium/auxiliary/
On 19/09/14 18:12, srol...@vmware.com wrote:
From: Roland Scheidegger
Useful to know in some cases.
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi.h | 6 ++
src/gallium/auxiliary/gallivm/lp_bld_tgsi_info.c | 4
2 files changed, 10 insertions(+)
diff --git a/src/gallium/auxilia
Patches 1, 2, 3 and 4 are:
Reviewed-by: Fredrik Höglund
On Friday 19 September 2014, Kenneth Graunke wrote:
> Dead since the _MaxElement removal, but these functions seemed generally
> applicable, so I decided to remove them in a separate patch.
>
> Signed-off-by: Kenneth Graunke
> ---
> src/
On Friday 19 September 2014, Kenneth Graunke wrote:
> For now, this prints out the same information as before - just using the
> newer/non-derived structures. Printing out each structure's fields
> separately might be more useful, but I've never used this code, so I'm
> not sure.
>
> Signed-off-b
Mesa 10.2.8 has been released. Mesa 10.2.8 is a bug fix release
fixing bugs since the 10.2.7 release, (see below for a list of
changes).
The tag in the git repository for Mesa 10.2.8 is 'mesa-10.2.8'.
Mesa 10.2.8 is available for download at
ftp://freedesktop.org/pub/mesa/10.2.8/
SHA-256 checksu
(Resend with GPG signature.)
Mesa 10.2.8 has been released. Mesa 10.2.8 is a bug fix release
fixing bugs since the 10.2.7 release, (see below for a list of
changes).
The tag in the git repository for Mesa 10.2.8 is 'mesa-10.2.8'.
Mesa 10.2.8 is available for download at
ftp://freedesktop.org/pub
From: Marek Olšák
E.g. the 4.0 compatibility profile can be forced with:
MESA_GL_VERSION_OVERRIDE=4.0COMPAT
Some tests that I have require 4.0 compatibility.
---
src/mesa/main/version.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/version.
From: Marek Olšák
No place in Mesa expects an ES version there.
Drivers don't even set it like this.
---
src/mesa/main/context.c | 12 ++--
src/mesa/main/mtypes.h | 2 +-
2 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
i
From: Marek Olšák
Just for consistency. This doesn't fix anything as the original code was
already pretty good.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_trac
From: Marek Olšák
The extensions and limits being set in the conditional block are core-only
anyway and don't have any effect on other profiles.
---
src/mesa/state_tracker/st_context.c| 2 +-
src/mesa/state_tracker/st_extensions.c | 20 +---
src/mesa/state_tracker/st_extensi
From: Marek Olšák
Generic varyings in TGSI were based on the value of VARYING_SLOT_TEX0, so VAR0
was always GENERIC[22] (with tessellation patches). Some drivers might not
be able to cope with that.
This commit defines a proper mapping, so that PNTC is GENERIC[8] and VAR0 is
GENERIC[9].
---
src
From: Marek Olšák
This was missed when Christoph Bumiller added PIPE_CAP_TGSI_TEXCOORD.
---
src/mesa/state_tracker/st_atom_rasterizer.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_atom_rasterizer.c
b/src/mesa/state_tracker/st_atom_rasterizer.c
From: Marek Olšák
There's no other way. It will use hw resolve + blit.
---
src/gallium/drivers/r300/r300_blit.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/r300/r300_blit.c
b/src/gallium/drivers/r300/r300_blit.c
index 2320abb..4e7efc5 100644
---
Mesa 10.3 has been released! Mesa 10.3 is a feature release that
includes many updates and enhancements. The full list is available in
the release notes file in docs/relnotes/10.3.html.
The tag in the GIT repository for Mesa 10.3 is 'mesa-10.3'. I have
verified that the tag is in the correct plac
So, lucky me, I have a scenario where I get to deal with NV12MT. Hurray!
I know there has been some reluctance in the past to combine tiling
and color format, since in theory that could lead to a combinatorial
explosion in formats. And, as long as the buffer usage is entirely
within a single dri
https://bugs.freedesktop.org/show_bug.cgi?id=84089
Iaroslav Andrusyak changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 10a3a20..af8c087 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/sr
This splits emit_fb_writes into two functions: emit_fb_writes and
emit_single_fb_write. This reduces the amount of duplicated code in
emit_fb_writes and makes the register number fiddling less arcane.
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs.h | 4 +-
src/m
We also set the register width equal to the dispatch width. Right now,
this is effectively a no-op since we don't do anything with it. However,
it will be important once we add an actual width field to fs_reg.
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs.h | 6 +
Using a floating-point type doesn't usually cause hangs on my HSW, but the
simulator complains about it quite a bit.
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/
I'm working on a series (which I hope to send out soon) that will allow us
to have explicit register widths and instruction execution sizes in the fs
backend IR. If you want to see where I'm going with this, I've got a
working version here:
http://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/k
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.h | 6 +++---
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 11 ++-
4 files changed, 11 insertions(+),
Previously we disabled compact_virtual_grfs when dumping optimizations.
The idea here was to make it easier to diff the dumped shader because you
didn't have a sudden renaming. However, sometimes a bug is affected by
compact_virtual_grfs and, when this happens, you want to keep dumping
instruction
We have this wonderful offset() function for advancing registers, but we're
not using it. Using offset() allows us to do some sanity checking and
avoid manually touching fs_reg::reg_offset. In a few commits, we will make
offset do even more nifty things for us.
Signed-off-by: Jason Ekstrand
---
The original vgrf splitting code was written assuming that with the
assumption that vgrfs came in two types: those that can be split into
single registers and those that can't be split at all It was very
conservative and bailed as soon as more than one element of a register was
read or written. Th
Previously, we were generating the fast-clear shader from GLSL. The
problem is that fast clears require that we use a replicated write rather
than a regular write instruction. In order to get this we had a
complicated and somewhat fragile optimization pass that looked for places
where we can use
Sometimes these show up in LOAD_PAYLOAD instructions and it's nice to be
able to see them.
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
b/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
index e7ecb0f..39fc61a 100644
--
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
b/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
index 697b
From: Marek Olšák
I will need this for fixing sample shading with 1 sample.
The good news is that all shader pm4 states no longer use the current context
state, so we can generate the pm4 states outside of draw_vbo if needed.
---
src/gallium/drivers/radeonsi/si_pipe.h | 1 +
src/gallium/
From: Marek Olšák
It's called db_misc_state in r600g.
---
src/gallium/drivers/radeonsi/si_blit.c | 6 +++
src/gallium/drivers/radeonsi/si_hw_context.c | 1 +
src/gallium/drivers/radeonsi/si_pipe.h | 16 +++---
src/gallium/drivers/radeonsi/si_state.c | 73 ++
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_pipe.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 4f9c876..2cce5cc 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers
From: Marek Olšák
This was the original naming convention in r600g and it somehow crept
into radeonsi.
---
src/gallium/drivers/radeonsi/si_compute.c | 15 ++---
src/gallium/drivers/radeonsi/si_descriptors.c | 14 ++--
src/gallium/drivers/radeonsi/si_pipe.h| 15 +++
From: Marek Olšák
One is part of the other anyway.
---
src/gallium/drivers/radeonsi/si_compute.c| 6 +--
src/gallium/drivers/radeonsi/si_shader.c | 56 +++
src/gallium/drivers/radeonsi/si_shader.h | 68 ++--
src/gallium/drivers/radeonsi/si
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 6 +-
src/gallium/drivers/radeonsi/si_shader.h | 1 -
src/gallium/drivers/radeonsi/si_state_draw.c | 3 ---
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/
From: Marek Olšák
Instead, pass the layout of GS inputs in memory to the ES using the shader
key. Only 64 bits are needed to represent the layout in the key.
Mixing and matching different VS and GS shaders should now always work.
---
src/gallium/drivers/radeonsi/si_shader.c | 107 ++
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 10 -
src/gallium/drivers/radeonsi/si_pipe.h| 4 ++--
src/gallium/drivers/radeonsi/si_state.h | 2 +-
src/gallium/drivers/radeonsi/si_state_draw.c | 32 ---
4 files changed, 22
From: Marek Olšák
Also set the field on SI too. It's not just specific to CIK.
---
src/gallium/drivers/radeonsi/si_shader.c | 7 ---
src/gallium/drivers/radeonsi/si_shader.h | 1 -
src/gallium/drivers/radeonsi/si_state_draw.c | 4
3 files changed, 4 insertions(+), 8 deletions(-)
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.h | 1 -
src/gallium/drivers/radeonsi/si_state_draw.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.h
b/src/gallium/drivers/radeonsi/si_shader.h
index a68c25a..df7dbb0 100644
--- a/src
From: Marek Olšák
This fixes piglit: arb_sample_shading-builtin-gl-sample-mask 0
---
src/gallium/drivers/radeonsi/si_state.c | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state
From: Marek Olšák
Cc: 10.2 10.3
---
src/gallium/drivers/radeonsi/si_shader.c | 4
src/gallium/drivers/radeonsi/si_state.c | 7 ---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index
Patch 1: Documenting.
radeonsi: document what si_descriptors.c does
Patches 2-8: Improvements and cleanups for DB registers and MSAA.
radeonsi: remove unused variable si_pipe_shader::sprite_coord_enable
radeonsi: move DB registers from draw_vbo into new db_render_state
ra
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 792d2c3..2543052 100644
--- a/src/gallium/drivers/radeonsi/si_
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_state.c | 50 ++---
1 file changed, 27 insertions(+), 23 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index b83b930..671e57b 100644
--- a/src/gallium
From: Marek Olšák
This should prevent accessing context state there.
---
src/gallium/drivers/radeonsi/si_compute.c | 2 +-
src/gallium/drivers/radeonsi/si_shader.c | 29 +
src/gallium/drivers/radeonsi/si_shader.h | 7 +++
src/gallium/drivers/radeonsi/si_state.
A switch statement is much easier to read/edit than a big giant or
statement.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 25 -
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index a
Oops. For got one:
i965/fs: Refactor fs_inst::is_send_from_grf()
On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand
wrote:
> I'm working on a series (which I hope to send out soon) that will allow us
> to have explicit register widths and instruction execution sizes in the fs
> backend IR. If yo
Hi
I'm pretty sure this is all thats needed to switch on GLSL 3.30 and
OpenGL 3.3 on Sandybridge
Cheers
Mike
From b16937f37681f8e44c86cdb86bd76fd1bbfab998 Mon Sep 17 00:00:00 2001
From: Mike Lothian
Date: Fri, 19 Sep 2014 22:56:46 +0100
Subject: [PATCH] i965/gen6: Enable GLSL 3.30 and OpenGL 3.
Tested on my snb-gt2:
4 tests skip->pass in spec/EXT_texture_array
51 tests skip->pass in spec.glsl-3.30
4 tests skip->pass in spec/!OpenGL 3.3
No regressions; no skip->fail changes.
Signed-off-by: Chris Forbes
---
Had the gen6 machine out anyway to try some other things; may as well get this
Reviewed-by: Jordan Justen
Mike, my reply for your patch was going to be:
* Can you inline your patch?
* Did you run piglit?
On Fri, Sep 19, 2014 at 3:39 PM, Chris Forbes wrote:
> Tested on my snb-gt2:
>
> 4 tests skip->pass in spec/EXT_texture_array
> 51 tests skip->pass in spec.glsl-3.30
> 4
Ensure that the object is build in the target folder, as automake 2.0
will mandate subdir-objects. Pointed out by automake 1.14.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69874
Signed-off-by: Emil Velikov
---
src/gallium/targets/omx/.gitignore | 1 +
src/gallium/targets/omx/Makefi
Ensure that the object is build in the target folder, as automake 2.0
will mandate subdir-objects. Pointed out by automake 1.14.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69874
Signed-off-by: Emil Velikov
---
src/gallium/targets/vdpau/.gitignore | 1 +
src/gallium/targets/vdpau/Mak
Ensure that the object is build in the target folder, as automake 2.0
will mandate subdir-objects. Pointed out by automake 1.14.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69874
Signed-off-by: Emil Velikov
---
src/gallium/targets/xvmc/.gitignore | 1 +
src/gallium/targets/xvmc/Makef
Hi
This is the first time I've used git send-mail - hopefully it should be inline
now
I've run piglit and there don't seem to be any failures related to the new
enablement (I do get some GS fails though)
Cheers
Mike
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mesa-
---
src/mesa/drivers/dri/i965/intel_extensions.c | 4 +---
src/mesa/drivers/dri/i965/intel_screen.c | 7 +--
2 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index b7c64c6..4e6627e 10
Do we do that anywhere else? Seems really hacky, and windows doesn't
support symlinks among other things... I'd just as soon force a
non-broken version of automake :)
On Fri, Sep 19, 2014 at 7:01 PM, Emil Velikov wrote:
> Ensure that the object is build in the target folder, as automake 2.0
> wil
On 20/09/14 00:13, Ilia Mirkin wrote:
> Do we do that anywhere else? Seems really hacky, and windows doesn't
> support symlinks among other things... I'd just as soon force a
> non-broken version of automake :)
>
Hmm just noticed that we should put the generated source(s) into the
nodist_*
Please
On Fri, Sep 19, 2014 at 7:45 PM, Emil Velikov wrote:
> On 20/09/14 00:13, Ilia Mirkin wrote:
>> Do we do that anywhere else? Seems really hacky, and windows doesn't
>> support symlinks among other things... I'd just as soon force a
>> non-broken version of automake :)
>>
> Hmm just noticed that we
On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand wrote:
> Signed-off-by: Jason Ekstrand
> ---
> src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp
>
On 20/09/14 00:56, Ilia Mirkin wrote:
> On Fri, Sep 19, 2014 at 7:45 PM, Emil Velikov
> wrote:
>> On 20/09/14 00:13, Ilia Mirkin wrote:
>>> Do we do that anywhere else? Seems really hacky, and windows doesn't
>>> support symlinks among other things... I'd just as soon force a
>>> non-broken versi
On Fri, Sep 19, 2014 at 4:01 PM, Emil Velikov wrote:
> Ensure that the object is build in the target folder, as automake 2.0
> will mandate subdir-objects. Pointed out by automake 1.14.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69874
> Signed-off-by: Emil Velikov
> ---
> src/gal
Reviewed-by: Matt Turner
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mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
On Fri, Sep 19, 2014 at 8:14 PM, Emil Velikov wrote:
> On 20/09/14 00:56, Ilia Mirkin wrote:
>> On Fri, Sep 19, 2014 at 7:45 PM, Emil Velikov
>> wrote:
>>> On 20/09/14 00:13, Ilia Mirkin wrote:
Do we do that anywhere else? Seems really hacky, and windows doesn't
support symlinks among
Reviewed-by: Matt Turner
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http://lists.freedesktop.org/mailman/listinfo/mesa-dev
On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand wrote:
> The original vgrf splitting code was written assuming that with the
> assumption that vgrfs came in two types: those that can be split into
s/ with the assumption that//
> single registers and those that can't be split at all
Period
> It
On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand wrote:
> We have this wonderful offset() function for advancing registers, but we're
> not using it. Using offset() allows us to do some sanity checking and
> avoid manually touching fs_reg::reg_offset. In a few commits, we will make
> offset do ev
Reviewed-by: Matt Turner
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Yes, I've always been weirded out by this.
Reviewed-by: Matt Turner
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On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand wrote:
> We also set the register width equal to the dispatch width. Right now,
> this is effectively a no-op since we don't do anything with it. However,
> it will be important once we add an actual width field to fs_reg.
I don't really see the p
On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand wrote:
> Previously we disabled compact_virtual_grfs when dumping optimizations.
> The idea here was to make it easier to diff the dumped shader because you
> didn't have a sudden renaming. However, sometimes a bug is affected by
> compact_virtual_g
Reviewed-by: Matt Turner
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Reviewed-by: Matt Turner
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On Thu, Aug 28, 2014 at 8:10 PM, Matt Turner wrote:
> This series adds instruction compaction support for G45 and Gen5
> and enables compaction of control flow instructions.
Ken reviewed the first four patches I think. Can I get someone to
review the rest?
On Wed, Sep 17, 2014 at 5:51 AM, Pohjolainen, Topi
wrote:
> On Tue, Sep 02, 2014 at 09:34:25PM -0700, Matt Turner wrote:
>> The register coalescing portion of this patch hurts three shaders in
>> Guacamelee by one instruction each, but examining the diff makes me
>> believe that what we were gener
---
This also means I'll drop 05/20.
v2: Just pass block to emit_before(), rather than trying to get rid
of emit_before().
src/mesa/drivers/dri/i965/brw_vec4.cpp | 6 +-
src/mesa/drivers/dri/i965/brw_vec4.h | 13 +++--
.../drivers/dri/i965/brw_vec4_reg_allocate.cpp
On Fri, Sep 19, 2014 at 5:16 PM, Matt Turner wrote:
> On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand
> wrote:
> > Signed-off-by: Jason Ekstrand
> > ---
> > src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp | 10 +-
> > 1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > dif
On Fri, Sep 19, 2014 at 5:37 PM, Matt Turner wrote:
> On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand
> wrote:
> > We also set the register width equal to the dispatch width. Right now,
> > this is effectively a no-op since we don't do anything with it. However,
> > it will be important once w
On Fri, Sep 19, 2014 at 5:41 PM, Matt Turner wrote:
> On Fri, Sep 19, 2014 at 1:10 PM, Jason Ekstrand
> wrote:
> > Previously we disabled compact_virtual_grfs when dumping optimizations.
> > The idea here was to make it easier to diff the dumped shader because you
> > didn't have a sudden renami
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