The code is cut-and-pasted from dri2_glx.c; we can't quite share it
because we have to use different structures.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
Cc: Keith Packard kei...@keithp.com
---
src/glx/dri3_glx.c | 35 ++-
src/glx/dri3_priv.h | 6
The GL functions and driver hooks use corresponding names---for example,
glMapBufferRange and Driver.MapBufferRange. But our implementation was
called intel_bufferobj_map_range, which has the words map and
buffer swapped, as well as randomly adding obj.
FlushMappedBufferRange was even trickier:
https://bugs.freedesktop.org/show_bug.cgi?id=59225
--- Comment #1 from Andrés Gómez García ago...@igalia.com ---
Is this valid any more?
piglit: b13d0bb86d175e36e013dbd528a50e59308adad0 (master)
mesa: 17d98ae25491d5781356da39658f926ed55f2eb5 (master)
$ ./piglit run -t arb_es2_compatibility
https://bugs.freedesktop.org/show_bug.cgi?id=59225
Andrés Gómez García ago...@igalia.com changed:
What|Removed |Added
Status|NEW |NEEDINFO
--
You
Hi,
On pe, 2014-10-24 at 17:37 +, Emil Velikov wrote:
Hi Joonas,
On 22/10/14 18:17, Joonas Lahtinen wrote:
Hi,
This patch introduced DRI3 support to the EGL backend.
Patch is on top of current master. With the patch you can observe
reduced CPU stress when many glViewport
On 28/10/2014 10:19, Joonas Lahtinen wrote :
Hi,
On pe, 2014-10-24 at 17:37 +, Emil Velikov wrote:
Hi Joonas,
On 22/10/14 18:17, Joonas Lahtinen wrote:
Hi,
This patch introduced DRI3 support to the EGL backend.
Patch is on top of current master. With the patch you can observe
reduced
https://bugs.freedesktop.org/show_bug.cgi?id=84566
--- Comment #43 from Iago Toral ito...@igalia.com ---
Jason, we are running into some issues when attempting to use
_mesa_format_convert for glReadPixels and glGetTexImage.
Generally, one thing that is different in this case is that the current
On 28/10/14 09:19, Joonas Lahtinen wrote:
Hi,
On pe, 2014-10-24 at 17:37 +, Emil Velikov wrote:
Hi Joonas,
On 22/10/14 18:17, Joonas Lahtinen wrote:
Hi,
This patch introduced DRI3 support to the EGL backend.
Patch is on top of current master. With the patch you can observe
reduced
Hi,
Comments below.
On ti, 2014-10-28 at 12:44 +0100, Axel Davy wrote:
On 28/10/2014 10:19, Joonas Lahtinen wrote :
Hi,
On pe, 2014-10-24 at 17:37 +, Emil Velikov wrote:
Hi Joonas,
On 22/10/14 18:17, Joonas Lahtinen wrote:
Hi,
This patch introduced DRI3 support to the EGL
https://bugs.freedesktop.org/show_bug.cgi?id=84566
--- Comment #44 from Iago Toral ito...@igalia.com ---
(In reply to Iago Toral from comment #43)
(...)
3) Luminance formats have special requirements. A conversion to Luminance
from RGBA requires to do L=R+G+B for example. This is something that
https://bugs.freedesktop.org/show_bug.cgi?id=85467
--- Comment #2 from José Fonseca jfons...@vmware.com ---
This is probably along the same lines as
https://bugs.freedesktop.org/show_bug.cgi?id=85377
However it seems that, this time around, its not in an unit test, but that
we're actually making
https://bugs.freedesktop.org/show_bug.cgi?id=85467
--- Comment #3 from José Fonseca jfons...@vmware.com ---
$ gdb --args ./bin/gl-1.0-dlist-beginend -auto
[...]
Program received signal SIGSEGV, Segmentation fault.
0x77eb8288 in ?? ()
(gdb) disassemble 0x77eb8240,0x77eb82ff
https://bugs.freedesktop.org/show_bug.cgi?id=85467
José Fonseca jfons...@vmware.com changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |srol...@vmware.com
Reviewed-by: Marek Olšák marek.ol...@amd.com
Marek
On Tue, Oct 28, 2014 at 8:09 AM, Kenneth Graunke kenn...@whitecape.org wrote:
The code is cut-and-pasted from dri2_glx.c; we can't quite share it
because we have to use different structures.
Signed-off-by: Kenneth Graunke
https://bugs.freedesktop.org/show_bug.cgi?id=85419
--- Comment #5 from Roland Scheidegger srol...@vmware.com ---
(In reply to James Evans from comment #2)
Thanks for the tip with '~0' I was unaware of that. I only used '0x'
because that was what was used in the red book examples.
I
On Tue, Oct 28, 2014 at 1:19 AM, Kenneth Graunke kenn...@whitecape.org wrote:
The GL functions and driver hooks use corresponding names---for example,
glMapBufferRange and Driver.MapBufferRange. But our implementation was
called intel_bufferobj_map_range, which has the words map and
buffer
https://bugs.freedesktop.org/show_bug.cgi?id=85425
Neil Roberts n...@linux.intel.com changed:
What|Removed |Added
Status|NEW |RESOLVED
Kenneth Graunke kenn...@whitecape.org writes:
The code is cut-and-pasted from dri2_glx.c; we can't quite share it
because we have to use different structures.
It might be fun to use the UST value provided in the
PRESENT_COMPLETE_NOTIFY event instead of a local gettimeofday call? That
way you'd
On inspection it looks like this would potentially break
_mesa_meta_Clear when it is using GLSL because that does not save the
MESA_META_TRANSFORM state.
I wonder if MESA_META_TRANSFORM is not the right state flag for this
because all of the other state in it is about fixed-function stuff which
On Thu, Oct 16, 2014 at 3:40 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
Before, we used the a signed d-word for booleans and the immedates we
emitted varried between signed and unsigned. This commit changes the type
to unsigned (I think that makes more sense) and makes immediates more
From: Marek Olšák marek.ol...@amd.com
This reverts commit 20836c81851e0df29a8ee9c86e5e5388738c840b.
255 is a huge number. If you have a loop with 255 iterations, unrolling it
will exceed the SM3 instruction limit. Let's use the default again.
The comment about a SM3 limit doesn't make sense.
On Oct 28, 2014 11:57 AM, Matt Turner matts...@gmail.com wrote:
On Thu, Oct 16, 2014 at 3:40 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
Before, we used the a signed d-word for booleans and the immedates we
emitted varried between signed and unsigned. This commit changes the
type
to
On Tue, Oct 28, 2014 at 12:10 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
On Oct 28, 2014 11:57 AM, Matt Turner matts...@gmail.com wrote:
On Thu, Oct 16, 2014 at 3:40 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
Before, we used the a signed d-word for booleans and the immedates we
I think if you change the clip depth mode without changing the clip
origin then only the _NEW_VIEWPORT state would be set. Does that mean we
have to add _NEW_VIEWPORT to the state for the gen7_clip_state atom as
well to make sure that upload_clip_state is called?
There is also some state for the
On Tuesday, October 28, 2014 11:12:40 AM Keith Packard wrote:
Kenneth Graunke kenn...@whitecape.org writes:
The code is cut-and-pasted from dri2_glx.c; we can't quite share it
because we have to use different structures.
It might be fun to use the UST value provided in the
Hi,
On Tuesday, October 28, 2014 19:43:23 Neil Roberts wrote:
I think if you change the clip depth mode without changing the clip
origin then only the _NEW_VIEWPORT state would be set. Does that mean we
have to add _NEW_VIEWPORT to the state for the gen7_clip_state atom as
well to make sure
On Mon, 2014-10-27 at 20:04 +, Bruno Jimenez wrote:
[snip]
+
+ if (aligned_count = 4) {
^^
Hi,
I have been thinking and I think that you can change that 4 for an 8. In
the case aligned_count == 4 there's no gain in using SSE, as you will
Kenneth Graunke kenn...@whitecape.org writes:
Is UST expressed in a particular unit? I thought it was just monotonically
increasing but otherwise meaningless. At which point, our FPS would be
frames per...something? :)
UST in GL's extension is not defined, but Present uses microseconds.
Yes, thanks!
Reviewed-by: Marek Olšák marek.ol...@amd.com
Marek
On Sat, Oct 25, 2014 at 10:42 AM, mathias.froehl...@gmx.net wrote:
From: Mathias Fröhlich mathias.froehl...@gmx.net
Hi Marek,
Did you have something like below in mind?
Mathias
This removes the need for the gallium
On Tuesday, October 28, 2014 12:10:11 PM Jason Ekstrand wrote:
On Oct 28, 2014 11:57 AM, Matt Turner matts...@gmail.com wrote:
On Thu, Oct 16, 2014 at 3:40 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
Before, we used the a signed d-word for booleans and the immedates we
emitted
On 10/28/2014 01:08 PM, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
This reverts commit 20836c81851e0df29a8ee9c86e5e5388738c840b.
255 is a huge number. If you have a loop with 255 iterations, unrolling it
will exceed the SM3 instruction limit. Let's use the default again.
The
On Wed, 2014-10-29 at 07:49 +1100, Timothy Arceri wrote:
On Mon, 2014-10-27 at 20:04 +, Bruno Jimenez wrote:
[snip]
+
+ if (aligned_count = 4) {
^^
Hi,
I have been thinking and I think that you can change that 4 for an 8. In
the
With Broadwell we have the option to run vertex shaders in scalar (SIMD8)
mode which potentially gives us better throughput and more vertices
per thread dispatch. This patch series implements this by repurposing our
fs backend to also work for vertex shaders.
Kristian Høgsberg (14):
i965:
This will be reused for the scalar VS pass.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 132 +++
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
2 files changed, 71 insertions(+), 62 deletions(-)
diff --git
Now that fs_visitor::run is back to being only fragment
shader compilation, we can clean up a few stage == MESA_SHADER_FRAGMENT
conditions and rename it to run_fs.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 31 +--
The LOAD_PAYLOAD opcode can't saturate its sources, so skip
saturating MOVs. The register coalescing after lower_load_payload()
will clean up the extra MOVs.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 6 +-
1 file changed,
This patch uses the previous refactoring to add a new run_vs() method
that generates vertex shader code using the scalar visitor and
optimizer.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 101 -
src/mesa/drivers/dri/i965/brw_fs.h
This is all we need from the generator for SIMD8 vertex shaders. This
opcode is just the send instruction, all the hard work will happen
in the visitor using LOAD_PAYLOAD.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
fs_generator no longer knows what stage it's generating code for, so
we have to set the debug name of the shader from the call site.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 4 +++-
src/mesa/drivers/dri/i965/brw_fs.cpp
This flag signals that we have a SIMD8 VS shader so we can set up the
corresponding state accordingly. This boils down to setting
the BDW+ SIMD8 enable bit in 3DSTATE_VS and making UBO and pull
constant buffers use dword pitch.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
Now that the caller passes in the shader debug name, we don't need this
anymore.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp| 2 +-
src/mesa/drivers/dri/i965/brw_fs.h
This chunk of code is repeated in a few places, and we're going to add
a MESA_SHADER_VERTEX case to it soon.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 37
1 file changed, 16 insertions(+), 21 deletions(-)
These last few operations all only apply when we've actually generated code,
optimized and allocated registers. The dummy and the repclear shaders don't
touch uncompressed_stack, don't need the gen4 send workaround, and don't
spill. This means we can move these lines into the else-branch, which
This removes all stage specific data from the generator, and lets us
create a generator for any stage.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 5 ++---
src/mesa/drivers/dri/i965/brw_fs.cpp| 2 +-
With everything in place, we can now use the scalar backend compiler for
vertex shaders on BDW+. We make scalar vertex shaders the default on
BDW+ but add a new vec4vs debug option to force the vec4 backend.
No piglit regressions.
Performance impact is minimal, I see a ~1.5 improvement on the
The scalar vertex shader will use the ATTR register file for vertex
attributes. This patch adds support for the ATTR file to fs_visitor.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 12 ++--
src/mesa/drivers/dri/i965/brw_fs.h
We'll reuse this toplevel optimization driver for the scalar VS.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 136 ++-
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
2 files changed, 72 insertions(+), 65
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net wrote:
The LOAD_PAYLOAD opcode can't saturate its sources, so skip
saturating MOVs. The register coalescing after lower_load_payload()
will clean up the extra MOVs.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
Reviewed-by: Charmaine Lee charmai...@vmware.com
From: mesa-dev mesa-dev-boun...@lists.freedesktop.org on behalf of Brian Paul
bri...@vmware.com
Sent: Monday, October 27, 2014 2:04 PM
To: mesa-dev@lists.freedesktop.org
Subject: [Mesa-dev] [PATCH] st/mesa:
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net wrote:
This removes all stage specific data from the generator, and lets us
create a generator for any stage.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 5
On Tue, Oct 28, 2014 at 3:58 PM, Matt Turner matts...@gmail.com wrote:
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net wrote:
This removes all stage specific data from the generator, and lets us
create a generator for any stage.
Signed-off-by: Kristian Høgsberg
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net wrote:
This is all we need from the generator for SIMD8 vertex shaders. This
opcode is just the send instruction, all the hard work will happen
in the visitor using LOAD_PAYLOAD.
Signed-off-by: Kristian Høgsberg
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net wrote:
This flag signals that we have a SIMD8 VS shader so we can set up the
corresponding state accordingly. This boils down to setting
the BDW+ SIMD8 enable bit in 3DSTATE_VS and making UBO and pull
constant buffers use
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net wrote:
The scalar vertex shader will use the ATTR register file for vertex
attributes. This patch adds support for the ATTR file to fs_visitor.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net wrote:
These last few operations all only apply when we've actually generated code,
optimized and allocated registers. The dummy and the repclear shaders don't
touch uncompressed_stack, don't need the gen4 send workaround,
On Tuesday, October 28, 2014 03:41:45 PM Matt Turner wrote:
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net
wrote:
The LOAD_PAYLOAD opcode can't saturate its sources, so skip
saturating MOVs. The register coalescing after lower_load_payload()
will clean up the extra
On Tue, Oct 28, 2014 at 4:50 PM, Kenneth Graunke kenn...@whitecape.org wrote:
On Tuesday, October 28, 2014 03:41:45 PM Matt Turner wrote:
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net
wrote:
The LOAD_PAYLOAD opcode can't saturate its sources, so skip
saturating MOVs.
On Tue, Oct 28, 2014 at 12:29 PM, Matt Turner matts...@gmail.com wrote:
On Tue, Oct 28, 2014 at 12:10 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
On Oct 28, 2014 11:57 AM, Matt Turner matts...@gmail.com wrote:
On Thu, Oct 16, 2014 at 3:40 PM, Jason Ekstrand ja...@jlekstrand.net
On Tue, Oct 28, 2014 at 3:59 PM, Matt Turner matts...@gmail.com wrote:
- assert(stage == MESA_SHADER_FRAGMENT);
I like removing these asserts from the function bodies, but I'm
confused why you're doing it. The VS isn't going to call
fire_fb_write, or emit a derivative instruction.
Oh,
On Tue, Oct 28, 2014 at 5:23 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
On Tue, Oct 28, 2014 at 12:29 PM, Matt Turner matts...@gmail.com wrote:
On Tue, Oct 28, 2014 at 12:10 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
On Oct 28, 2014 11:57 AM, Matt Turner matts...@gmail.com
On Tuesday, October 28, 2014 04:25:05 PM Matt Turner wrote:
On Tue, Oct 28, 2014 at 3:17 PM, Kristian Høgsberg k...@bitplanet.net
wrote:
This flag signals that we have a SIMD8 VS shader so we can set up the
corresponding state accordingly. This boils down to setting
the BDW+ SIMD8 enable
On Tue, Oct 28, 2014 at 5:48 PM, Kenneth Graunke kenn...@whitecape.org wrote:
I believe Eric introduced the name, and it's been around for quite a while
now. Feel free to submit a patch to rename it.
Oh, yuck. Okay.
___
mesa-dev mailing list
Hello,
I'd like to rename some files in i965:
- brw_gs.c - brw_ff_gs.c
- brw_gs.h - brw_ff_gs.h
- brw_gs_emit.c - brw_ff_gs_emit.c
- brw_vec4_gs.c - brw_gs.c
- brw_vec4_gs.h - brw_gs.h
The current brw_gs files are about emulating fixed-function functionality
(VF primitive
On Tue, Oct 28, 2014 at 7:27 PM, Kenneth Graunke kenn...@whitecape.org wrote:
I'd like to rename some files in i965:
- brw_gs.c - brw_ff_gs.c
- brw_gs.h - brw_ff_gs.h
- brw_gs_emit.c - brw_ff_gs_emit.c
- brw_vec4_gs.c - brw_gs.c
- brw_vec4_gs.h - brw_gs.h
Sounds good to me.
Ack
On Oct 28, 2014 7:24 PM, Kenneth Graunke kenn...@whitecape.org wrote:
Hello,
I'd like to rename some files in i965:
- brw_gs.c - brw_ff_gs.c
- brw_gs.h - brw_ff_gs.h
- brw_gs_emit.c - brw_ff_gs_emit.c
- brw_vec4_gs.c - brw_gs.c
- brw_vec4_gs.h - brw_gs.h
The current
On Tue, 2014-10-28 at 22:14 +, Bruno Jimenez wrote:
On Wed, 2014-10-29 at 07:49 +1100, Timothy Arceri wrote:
On Mon, 2014-10-27 at 20:04 +, Bruno Jimenez wrote:
[snip]
+
+ if (aligned_count = 4) {
^^
Hi,
I have been
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