On Sun, Nov 30, 2014 at 2:24 AM, Chris Forbes chr...@ijw.co.nz wrote:
Fixes the piglit test: spec/glsl-es-3.00/compiler/undef-GL_ES.vert
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/glsl/glcpp/glcpp-parse.y | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
On Wed, Dec 3, 2014 at 11:31 PM, Ben Widawsky b...@bwidawsk.net wrote:
On Wed, Dec 03, 2014 at 11:27:55PM -0800, Ben Widawsky wrote:
On Wed, Dec 03, 2014 at 04:47:18PM -0800, Matt Turner wrote:
---
The number of times I've wondered why piglit/gbm wasn't working...
On Wed, 2014-12-03 at 14:58 -0800, Jason Ekstrand wrote:
On Wed, Dec 3, 2014 at 2:52 PM, Ian Romanick i...@freedesktop.org
wrote:
On 12/01/2014 03:04 AM, Iago Toral Quiroga wrote:
From: Jason Ekstrand jason.ekstr...@intel.com
(...)
+enum
On 04.12.2014 17:17, Iago Toral wrote:
On Wed, 2014-12-03 at 14:58 -0800, Jason Ekstrand wrote:
On Wed, Dec 3, 2014 at 2:52 PM, Ian Romanick i...@freedesktop.org
wrote:
On 12/01/2014 03:04 AM, Iago Toral Quiroga wrote:
From: Jason Ekstrand jason.ekstr...@intel.com
(...)
On Thu, 2014-12-04 at 17:39 +0900, Michel Dänzer wrote:
On 04.12.2014 17:17, Iago Toral wrote:
On Wed, 2014-12-03 at 14:58 -0800, Jason Ekstrand wrote:
On Wed, Dec 3, 2014 at 2:52 PM, Ian Romanick i...@freedesktop.org
wrote:
On 12/01/2014 03:04 AM, Iago Toral Quiroga wrote:
On Wed, 2014-12-03 at 14:26 -0800, Jason Ekstrand wrote:
On Wed, Dec 3, 2014 at 2:15 PM, Ian Romanick i...@freedesktop.org
wrote:
This patch is
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Should it also be tagged for 10.4?
Yes, it
On 02/12/2014 20:53, Mario Kleiner wrote :
Restores proper immediate tearing swap behaviour for
OpenGL bufferswap under DRI3/Present.
+ if (priv-swap_interval == 0)
+ options |= XCB_PRESENT_OPTION_ASYNC;
+
back-busy = 1;
Currently under DRI3 glx, you'll get triple
On 02/12/2014 20:53, Mario Kleiner wrote :
targetSBC == 0 is a special case, which asks the function
to block until all pending OpenGL bufferswap requests have
completed.
Currently the function just falls through for targetSBC == 0,
returning bogus results.
This breaks applications originally
Le 04/12/2014 11:44, Axel Davy a écrit :
On 02/12/2014 20:53, Mario Kleiner wrote :
targetSBC == 0 is a special case, which asks the function
to block until all pending OpenGL bufferswap requests have
completed.
Currently the function just falls through for targetSBC == 0,
returning bogus
On 02/12/2014 20:53, Mario Kleiner wrote :
Prevent calls to glXGetSyncValuesOML() and glXWaitForMscOML()
from overwriting the (ust,msc) values of the last successfull
swapbuffers call (PresentPixmapCompleteNotify event), as
glXWaitForSbcOML() relies on those values corresponding to
the most
On 02/12/2014 20:53, Mario Kleiner wrote :
glXSwapBuffersMscOML() with target_msc=divisor=remainder=0 gets
translated into target_msc=divisor=0 but remainder=1 by the mesa
api. This is done for server DRI2 where there needs to be a way
to tell the server-side DRI2ScheduleSwap implementation if a
On Wednesday, December 03, 2014 10:09:59 AM Chris Forbes wrote:
It would be nice if this could be added to the existing logic for the
interaction between builtins and app-provided overloads -- or do we
need to fail earlier than that?
This is the place where we store the information about a
Jan Vesely jan.ves...@rutgers.edu writes:
This way we get a warning when an enum value is not handled
Signed-off-by: Jan Vesely jan.ves...@rutgers.edu
---
src/gallium/state_trackers/clover/core/kernel.cpp | 45
++-
1 file changed, 20 insertions(+), 25 deletions(-)
From: Marek Olšák marek.ol...@amd.com
Discussion: https://bugs.freedesktop.org/show_bug.cgi?id=83510#c8
---
src/gallium/drivers/radeonsi/si_shader.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
Hello all,
Kenneth kindly pointed out in an earlier thread [1] that it's quite
likely that drivers for older hardware are somewhat busted.
A quick look at my local piglit runs, shows that the classic swrast has
a staggering number of regressions ~130 and only ~20 fixes. These stats
come from the
On Dec 4, 2014 1:07 AM, Iago Toral ito...@igalia.com wrote:
On Wed, 2014-12-03 at 14:26 -0800, Jason Ekstrand wrote:
On Wed, Dec 3, 2014 at 2:15 PM, Ian Romanick i...@freedesktop.org
wrote:
This patch is
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
Hi Keith,
With the week of Thanksgiving behind us, can you let us know your plans
wrt this series. Would you have a chance to look at it any time soon, or
is it quite low on your list ?
Thanks
Emil
P.S. Not meant to be pushy but curious.
On 02/12/14 19:53, Mario Kleiner wrote:
A slightly
Hmm I have to say I'm not really convinced of that solution. Because all
divs are lowered, this will screw the results of all divs (if the rcp
would come from a legacy arb_fp rcp that would be different and quite
possible some apps depending on it, problems like that are very common
for d3d9 apps
https://bugs.freedesktop.org/show_bug.cgi?id=86980
Roland Scheidegger srol...@vmware.com changed:
What|Removed |Added
CC||bri...@vmware.com
https://bugs.freedesktop.org/show_bug.cgi?id=86980
--- Comment #5 from Brian Paul bri...@vmware.com ---
Going from my notes, some of the catia tests use GL_NV_fragment_program[23]
features (which like, GL_NV_fragment_program_option, layer on
GL_ARB_fragment_program). And those tests fail with
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
https://www.opengl.org/registry/specs/EXT/texture_sRGB_decode.txt
Explicitly talks about ES, other drivers seem to expose it. Not sure about ES1.
src/mesa/main/extensions.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Returning FLT_MAX instead of 0 also works, which is similar to another
hw instruction: V_RCP_CLAMP_F32.
The Unreal engine is a pretty big target with a lot of apps out there.
I'm afraid a driconf option isn't feasible.
Marek
On Thu, Dec 4, 2014 at 5:39 PM, Roland Scheidegger srol...@vmware.com
I'm also concerned this sort of ad-hoc re-interpretation of opcode
semantics will come to bytes us later, as different state trackers might
want different semantics.
I think we might need to redefine TGSI_OPCODE_RCP opcode or introduce a
TGSI_OPCODE_RCP_LEGACY opcode.
Also, do we know
https://bugs.freedesktop.org/show_bug.cgi?id=84186
Mathias Brodala i...@noctus.net changed:
What|Removed |Added
CC|i...@noctus.net |
--
You are receiving
The problem is, while glsl was quite lenient in older versions wrt
precision or things like div by zero, starting with glsl 4.10 you are
_required_ to return +-/Inf for divs by zero. Hence if you use hacks
here to make some app run, you _will_ have to fix that properly in the
future in any case.
On Wed, Dec 3, 2014 at 3:53 PM, Ben Widawsky
benjamin.widaw...@intel.com wrote:
SKL moves the GS threadcount to dw8 from dw7, and no longer does the divide
by 2
thing.
Only compile test.
Cc: Kristian Høgsberg k...@bitplanet.net
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
Oh hm. Apparently EXT_sRGB is required for this [or ES3, but that's
not available on the driver I'm interested quite yet]. I'll see if
that can be added easily.
On Thu, Dec 4, 2014 at 12:42 PM, Ilia Mirkin imir...@alum.mit.edu wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
I agree that this should be fixed properly, but my time is limited at
the moment. We know there's a problem with our shader backend, because
there are issues with other games too. We can fix it later and we
certainly won't forget about it.
Note that r600g is using a lot of these non-standard
I certainly don't want to deter you from pushing a quick fix now.
If possible I'd just like any further information you might have
collected while debugging this issue in the hope we can figure out a
more comprehensive solution should be.
Because I'm sure other drivers (including VMware's
Am 04.12.2014 um 20:49 schrieb Marek Olšák:
I agree that this should be fixed properly, but my time is limited at
the moment. We know there's a problem with our shader backend, because
there are issues with other games too. We can fix it later and we
certainly won't forget about it.
Note
On 12/04/2014 11:48 AM, Axel Davy wrote:
Le 04/12/2014 11:44, Axel Davy a écrit :
On 02/12/2014 20:53, Mario Kleiner wrote :
targetSBC == 0 is a special case, which asks the function
to block until all pending OpenGL bufferswap requests have
completed.
Currently the function just falls
On 12/04/2014 11:20 AM, Axel Davy wrote:
On 02/12/2014 20:53, Mario Kleiner wrote :
Restores proper immediate tearing swap behaviour for
OpenGL bufferswap under DRI3/Present.
+ if (priv-swap_interval == 0)
+ options |= XCB_PRESENT_OPTION_ASYNC;
+
back-busy = 1;
This is similar to the existing functions get_instance, get_array_instance,
etc. for getting a type singleton. The new get_sampler_instance() function
will be used by the upcoming shader cache.
---
src/glsl/glsl_types.cpp | 111
From: Tapani Pälli tapani.pa...@intel.com
Shader binary cache requires this to be able to cache hash data from
the gl_shader_program structure.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
Reviewed-by: Paul Berry stereotype...@gmail.com
Reviewed-by: Carl Worth cwo...@cworth.org
---
There is an internal implementation detail that the hash table
underlying the struct string_to_uint_map stores each value internally
as (value+1). The user needn't be very concerned with this (other than
knowing that a value of UINT_MAX cannot be stored) since put() adds 1
and get() subtracts 1.
On 11/04/2014 04:20 AM, Tapani Pälli wrote:
Note that some of the GLSL specifications explicitly state this as
compile error, some simply state that 'it is an error'.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/glsl/glsl_parser.yy | 13 -
1 file changed, 12
On 11/29/2014 12:54 PM, Chris Forbes wrote:
Fixes the piglit test: spec/glsl-es-3.00/compiler/undef-GL_ES.vert
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/glsl/glcpp/glcpp-parse.y | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glsl/glcpp/glcpp-parse.y
Ugh, yes, I'll fix that and land it at the same time.
Thanks :)
On Fri, Dec 5, 2014 at 11:12 AM, Ian Romanick i...@freedesktop.org wrote:
On 11/29/2014 12:54 PM, Chris Forbes wrote:
Fixes the piglit test: spec/glsl-es-3.00/compiler/undef-GL_ES.vert
Signed-off-by: Chris Forbes
On 12/02/2014 09:54 AM, Ilia Mirkin wrote:
I believe the issue is that _mesa_TextureView should be checking the
target internal format against _mesa_base_tex_format() and returning a
GL_INVALID_VALUE error (? the spec conveniently lists errors as
'TODO') if it returns -1. Chris -- thoughts?
On 12/04/2014 02:00 PM, Carl Worth wrote:
This is similar to the existing functions get_instance, get_array_instance,
etc. for getting a type singleton. The new get_sampler_instance() function
will be used by the upcoming shader cache.
---
src/glsl/glsl_types.cpp | 111
On 12/04/2014 02:00 PM, Carl Worth wrote:
There is an internal implementation detail that the hash table
underlying the struct string_to_uint_map stores each value internally
as (value+1). The user needn't be very concerned with this (other than
knowing that a value of UINT_MAX cannot be
On Wed, Dec 3, 2014 at 5:58 PM, Kenneth Graunke kenn...@whitecape.org wrote:
On Tuesday, December 02, 2014 10:34:49 AM Matt Turner wrote:
On Tue, Dec 2, 2014 at 3:50 AM, Kenneth Graunke kenn...@whitecape.org
wrote:
The Pixel Shader Computed Depth Mode value is entirely based on the
shader
On Thu, Dec 4, 2014 at 2:00 PM, Carl Worth cwo...@cworth.org wrote:
+ assert(!Should not get here.);
+ return error_type;
Let's just use unreachable(not reached) here.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
---
Ken pointed this out in his review, and I fixed it in the FS, but apparently
forgot to fix it in the vec4 code.
src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
---
src/mesa/drivers/dri/i965/brw_fs.h | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index b29b6b0..c7bc55c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -119,6
This is a revert of commit 4656c14e (i965/fs: Change the type of
booleans to UD and emit correct immediates) plus some small additional
fixes, like casting ctx-Const.UniformBooleanTrue to int and changing UD
to D in the ir_unop_b2f cases. Note that it's safe to leave 0x3f80
as UD and as a
Jason realized that we could fix the result of the CMP instruction on
Gen = 5 by doing -(result 1). Also do the resolves in the vec4
backend before use, rather than when the bool was created. The FS does
this and it saves some unnecessary resolves.
On Ironlake:
total instructions in shared
From: Roland Scheidegger srol...@vmware.com
The original idea was to optimize away the condition by integrating it directly
into the CMP instruction. However, with native integers this requires an extra
I2F instruction. It is also fishy because the negation used didn't really honor
ieee754 float
The GS has an interesting use for mul. It's essentially used as a fancy mov (in
fact, I am not sure why a mov isn't used). The documentation in the function has
a very good explanation from Paul on the mechanics.
CHV has some quirks with regard to multiplication. While the documentation is
The index_bias (aka base_vertex) applies to the downstream draw just as
much, since the actual index values are never modified.
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.3 10.4 mesa-sta...@lists.freedesktop.org
---
src/gallium/auxiliary/indices/u_primconvert.c | 1 +
1 file changed,
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.4 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/auxiliary/indices/u_primconvert.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/indices/u_primconvert.c
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.3 10.4 mesa-sta...@lists.freedesktop.org
---
src/gallium/auxiliary/indices/u_primconvert.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/auxiliary/indices/u_primconvert.c
b/src/gallium/auxiliary/indices/u_primconvert.c
This series is
Reviewed-by: Jason Ekstrand jason.ekstr...@intel.com
On Thu, Dec 4, 2014 at 3:05 PM, Matt Turner matts...@gmail.com wrote:
Jason realized that we could fix the result of the CMP instruction on
Gen = 5 by doing -(result 1). Also do the resolves in the vec4
backend before use,
Matt Turner matts...@gmail.com writes:
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 10 ++
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 10 ++
2 files changed, 20 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
On 12/04/2014 03:05 PM, Matt Turner wrote:
This is a revert of commit 4656c14e (i965/fs: Change the type of
booleans to UD and emit correct immediates) plus some small additional
Commit 4656c14e contained some shader-db data... does this pseudo-revert
have shader-db changes?
fixes, like
On 12/04/2014 03:05 PM, Matt Turner wrote:
Jason realized that we could fix the result of the CMP instruction on
Gen = 5 by doing -(result 1). Also do the resolves in the vec4
backend before use, rather than when the bool was created. The FS does
this and it saves some unnecessary resolves.
On Thu, Dec 4, 2014 at 4:22 PM, Ian Romanick i...@freedesktop.org wrote:
On 12/04/2014 03:05 PM, Matt Turner wrote:
This is a revert of commit 4656c14e (i965/fs: Change the type of
booleans to UD and emit correct immediates) plus some small additional
Commit 4656c14e contained some shader-db
On Thu, Dec 4, 2014 at 4:26 PM, Ian Romanick i...@freedesktop.org wrote:
On 12/04/2014 03:05 PM, Matt Turner wrote:
Jason realized that we could fix the result of the CMP instruction on
Gen = 5 by doing -(result 1). Also do the resolves in the vec4
backend before use, rather than when the
On 12/04/2014 05:01 PM, Ilia Mirkin wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.3 10.4 mesa-sta...@lists.freedesktop.org
---
src/gallium/auxiliary/indices/u_primconvert.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/auxiliary/indices/u_primconvert.c
The PRMs say that
src0 region must be a replicated scalar
(with HorzStride = VertStride = 0).
but apparently that doesn't actually apply to all generations. I did
notice when implementing the optimization later in this series that G45
and ILK needed this regioning.
---
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 4ae35ac..2f99d65 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++
The LINE instruction performs a multiply-add instruction (a * b + c)
where b and c are scalar arguments. It reads b and c from offsets in
src0 such that you can load them (it they're representable) as a
vector-float immediate with a single instruction.
Hurts some programs, but that'll all get
Safe from causing optimization loops, since we don't constant propagate
VF arguments.
(for this and the previous patch):
total instructions in shared programs: 4289075 - 4271932 (-0.40%)
instructions in affected programs: 1616779 - 1599636 (-1.06%)
---
LGTM. Reviewed-by: Brian Paul bri...@vmware.com
On 12/04/2014 04:25 PM, srol...@vmware.com wrote:
From: Roland Scheidegger srol...@vmware.com
The original idea was to optimize away the condition by integrating it directly
into the CMP instruction. However, with native integers this requires
On Thu, Dec 4, 2014 at 3:37 PM, Ben Widawsky
benjamin.widaw...@intel.com wrote:
The GS has an interesting use for mul. It's essentially used as a fancy mov
(in
fact, I am not sure why a mov isn't used). The documentation in the function
has
a very good explanation from Paul on the
On Thursday, December 04, 2014 03:37:17 PM Ben Widawsky wrote:
The GS has an interesting use for mul. It's essentially used as a fancy mov
(in
fact, I am not sure why a mov isn't used). The documentation in the function
has
a very good explanation from Paul on the mechanics.
CHV has some
Hello,
Building recent mesa git i found that most video players that use VDPAu
hardware decoding fail with
vl/vl_stubs.c:45:vl_video_buffer_formats: Assertion `0' failed.
Trace/breakpoint trap
for example trying to play a 1080p h264 video that worked with hw
decoding:
$ mpv
On Thursday, December 04, 2014 03:05:59 PM Matt Turner wrote:
Jason realized that we could fix the result of the CMP instruction on
Gen = 5 by doing -(result 1). Also do the resolves in the vec4
backend before use, rather than when the bool was created. The FS does
this and it saves some
On Thu, Dec 4, 2014 at 5:48 PM, Kenneth Graunke kenn...@whitecape.org wrote:
Some comments would be nice:
/**
* Resolve the result of a Gen4-5 CMP instruction to a proper boolean.
*
* CMP on Gen4-5 only sets the LSB of the result; the rest are undefined.
* If we need a proper boolean
Cuts an instruction from two shaders in Tesseract, by allowing the
(x+y) cmp 0 - x cmp -y optimization to take place.
instructions in affected programs: 1198 - 1194 (-0.33%)
---
src/glsl/opt_algebraic.cpp | 10 ++
1 file changed, 10 insertions(+)
diff --git
On Fri, Nov 21, 2014 at 10:23 AM, Matt Turner matts...@gmail.com wrote:
Thoughts?
Ping^2
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Matt Turner matts...@gmail.com writes:
Cuts an instruction from two shaders in Tesseract, by allowing the
(x+y) cmp 0 - x cmp -y optimization to take place.
instructions in affected programs: 1198 - 1194 (-0.33%)
Reviewed-by: Eric Anholt e...@anholt.net
signature.asc
Description: PGP
https://bugs.freedesktop.org/show_bug.cgi?id=86939
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Blocks||79706
--
You are
https://bugs.freedesktop.org/show_bug.cgi?id=79706
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Depends on||86939
--
You are
https://bugs.freedesktop.org/show_bug.cgi?id=86944
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Blocks||79706
--
You are
https://bugs.freedesktop.org/show_bug.cgi?id=79706
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Depends on||86944
--
You are
https://bugs.freedesktop.org/show_bug.cgi?id=86980
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Blocks||79706
--
You are
https://bugs.freedesktop.org/show_bug.cgi?id=79706
Vinson Lee v...@freedesktop.org changed:
What|Removed |Added
Depends on||86980
--
You are
Mario Kleiner mario.kleiner...@gmail.com writes:
glXSwapBuffersMscOML() with target_msc=divisor=remainder=0 gets
translated into target_msc=divisor=0 but remainder=1 by the mesa
api. This is done for server DRI2 where there needs to be a way
to tell the server-side DRI2ScheduleSwap
Mario Kleiner mario.kleiner...@gmail.com writes:
On 12/04/2014 11:48 AM, Axel Davy wrote:
Le 04/12/2014 11:44, Axel Davy a écrit :
On 02/12/2014 20:53, Mario Kleiner wrote :
targetSBC == 0 is a special case, which asks the function
to block until all pending OpenGL bufferswap requests have
Mario Kleiner mario.kleiner...@gmail.com writes:
Restores proper immediate tearing swap behaviour for
OpenGL bufferswap under DRI3/Present.
Cc: 10.3 10.4 mesa-sta...@lists.freedesktop.org
v2: Add Frank Binns signed off by for his original earlier
patch from April 2014, which is identical
Mario Kleiner mario.kleiner...@gmail.com writes:
A slightly updated and extended series of the dri3/present fixes for Mesa i
sent last week.
Patch 1 and 2 are same as before. Patch 3 now has signed off by Frank Binns
and reviewed by Chris Wilson. Patch 4 and 5 are additional fixes. The last
On 12/04/2014 04:33 PM, Matt Turner wrote:
On Thu, Dec 4, 2014 at 4:26 PM, Ian Romanick i...@freedesktop.org wrote:
On 12/04/2014 03:05 PM, Matt Turner wrote:
Jason realized that we could fix the result of the CMP instruction on
Gen = 5 by doing -(result 1). Also do the resolves in the vec4
On 12/04/2014 06:06 PM, Matt Turner wrote:
On Fri, Nov 21, 2014 at 10:23 AM, Matt Turner matts...@gmail.com wrote:
Thoughts?
Ping^2
Seems reasonable enough... any progress on the common ternary pattern
better? (I deleted the original message, so I reviewed the patch from
the list archive.)
On 12/04/2014 04:37 PM, Matt Turner wrote:
The LINE instruction performs a multiply-add instruction (a * b + c)
where b and c are scalar arguments. It reads b and c from offsets in
src0 such that you can load them (it they're representable) as a
if?
On 12/04/2014 04:37 PM, Matt Turner wrote:
The LINE instruction performs a multiply-add instruction (a * b + c)
where b and c are scalar arguments. It reads b and c from offsets in
src0 such that you can load them (it they're representable) as a
vector-float immediate with a single
On Thu, Dec 04 2014, Ian Romanick wrote:
Should this just get squashed with the previous commit?
Yes. I only hesitated because I wrote the second and not the first, (so
I didn't want to lose authorship in the history).
But it's not useful to have an iterate in the history that actually does
the
On Thu, Dec 4, 2014 at 7:34 PM, Brian Paul bri...@vmware.com wrote:
On 12/04/2014 05:01 PM, Ilia Mirkin wrote:
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
Cc: 10.3 10.4 mesa-sta...@lists.freedesktop.org
---
src/gallium/auxiliary/indices/u_primconvert.c | 2 ++
1 file changed, 2
On Thu, Dec 4, 2014 at 6:54 PM, Ian Romanick i...@freedesktop.org wrote:
On 12/04/2014 04:33 PM, Matt Turner wrote:
On Thu, Dec 4, 2014 at 4:26 PM, Ian Romanick i...@freedesktop.org wrote:
On 12/04/2014 03:05 PM, Matt Turner wrote:
Jason realized that we could fix the result of the CMP
On Thu, Dec 04 2014, Ian Romanick wrote:
Shouldn't type be glsl_base_type instead of unsigned?
Yes, thanks for the catch. Fixed.
+ if (shadow)
+return (array ? sampler2DArrayShadow_type : sampler2DShadow_type
+);
It's weird that the closing paren ended up here. I don't
On Thu, Dec 04 2014, Matt Turner wrote:
On Thu, Dec 4, 2014 at 2:00 PM, Carl Worth cwo...@cworth.org wrote:
+ assert(!Should not get here.);
+ return error_type;
Let's just use unreachable(not reached) here.
That's a good idea. I copied this line from the surrounding code in the
same
On Thu, Dec 04, 2014 at 05:08:21PM -0800, Matt Turner wrote:
On Thu, Dec 4, 2014 at 3:37 PM, Ben Widawsky
benjamin.widaw...@intel.com wrote:
The GS has an interesting use for mul. It's essentially used as a fancy mov
(in
fact, I am not sure why a mov isn't used). The documentation in the
On Thu, Dec 04, 2014 at 07:48:06PM -0800, Ben Widawsky wrote:
On Thu, Dec 04, 2014 at 05:08:21PM -0800, Matt Turner wrote:
On Thu, Dec 4, 2014 at 3:37 PM, Ben Widawsky
benjamin.widaw...@intel.com wrote:
The GS has an interesting use for mul. It's essentially used as a fancy
mov (in
On 12/03/2014 05:42 PM, Kenneth Graunke wrote:
BRW_NEW_VERTICES is flagged every time we draw a primitive. Having
the brw_vs_prog atom depend on BRW_NEW_VERTICES meant that we had to
compute the VS program key and do a program cache lookup for every
single primitive. This is painfully
On Thu, Dec 4, 2014 at 7:54 PM, Carl Worth cwo...@cworth.org wrote:
On Thu, Dec 04 2014, Carl Worth wrote:
So I think I'll follow up with a separate patch to clean these up.
Before I do that, I noticed the following in util/macros.h:
/**
* Unreachable macro. Useful for
fs_generator no longer knows what stage it's generating code for, so
we have to set the debug name of the shader from the call site.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 4 +++-
src/mesa/drivers/dri/i965/brw_fs.cpp
The scalar vertex shader will use the ATTR register file for vertex
attributes. This patch adds support for the ATTR file to fs_visitor.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 10 +-
src/mesa/drivers/dri/i965/brw_fs.h
This patch uses the previous refactoring to add a new run_vs() method
that generates vertex shader code using the scalar visitor and
optimizer.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 111 +-
This removes all stage specific data from the generator, and lets us
create a generator for any stage.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 5 ++---
src/mesa/drivers/dri/i965/brw_fs.cpp| 2 +-
Now that the caller passes in the shader debug name, we don't need this
anymore.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp| 2 +-
src/mesa/drivers/dri/i965/brw_fs.h
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