On Tue, Feb 09, 2016 at 03:50:04PM -0800, Ben Widawsky wrote:
> On Mon, Feb 08, 2016 at 06:51:32PM +0200, Topi Pohjolainen wrote:
> > Signed-off-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/gen8_surface_state.c | 62
> > --
> > 1 file changed, 29 insertions(
https://bugs.freedesktop.org/show_bug.cgi?id=94072
sav...@ukr.net changed:
What|Removed |Added
CC||sav...@ukr.net
--
You are receiving thi
On Tue, 2016-02-09 at 11:46 -0800, Ian Romanick wrote:
> On 02/09/2016 08:56 AM, Ian Romanick wrote:
> > On 02/09/2016 06:06 AM, Samuel Iglesias Gonsálvez wrote:
> > >
> > > On Tue, 2016-01-12 at 20:34 +1100, Timothy Arceri wrote:
> > > > From Section 4.4.5 (Uniform and Shader Storage Block Layout
On Tue, 2016-02-09 at 11:46 -0800, Ian Romanick wrote:
> On 02/09/2016 08:56 AM, Ian Romanick wrote:
> > On 02/09/2016 06:06 AM, Samuel Iglesias Gonsálvez wrote:
> > >
> > > On Tue, 2016-01-12 at 20:34 +1100, Timothy Arceri wrote:
> > > > From Section 4.4.5 (Uniform and Shader Storage Block Layout
On Tue, Feb 09, 2016 at 10:35:45AM -0800, Matt Turner wrote:
> On Tue, Feb 9, 2016 at 9:44 AM, Sameer Kibey wrote:
> > Update the format in which workarounds are documented
> > in the source code. This allows mesa to be parsed
> > by the list-workarounds utility in intel-gpu-tools.
>
> I don't kn
On Tue, 9 Feb 2016 at 22:38 Michel Dänzer wrote:
> On 10.02.2016 10:11, Alexandre Demers wrote:
> > Signed-off-by: Alexandre Demers
> > ---
> > src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/src/gallium/winsy
https://bugs.freedesktop.org/show_bug.cgi?id=94072
sav...@ukr.net changed:
What|Removed |Added
Version|unspecified |git
--
You are receiving this mail beca
https://bugs.freedesktop.org/show_bug.cgi?id=94072
Bug ID: 94072
Summary: error: The command line is too long when building MESA
on Windows with MinGW-W64
Product: Mesa
Version: unspecified
Hardware: x86-64 (AMD64)
I was just messing with warning flags on virglrenderer and noticed
-Wshadow generated a fair few warnings with gallium, so I did a mesa
build with -Wshadow enabled and it was fairly messy,
do we care? there could be bugs hiding in -Wshadow land.
Dave.
_
On Feb 9, 2016 7:06 PM, "Connor Abbott" wrote:
>
> Did you make sure the other drivers and ttn don't use this? Assming that,
Well, I deleted it from the header and the other drivers built so...
> Reviewed-by: Connor Abbott
>
> I really should get to your other series, but I've been busy with
>
On 10.02.2016 10:11, Alexandre Demers wrote:
> Signed-off-by: Alexandre Demers
> ---
> src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
> b/src/gallium/winsys/radeon/
On Tue, Feb 9, 2016 at 10:06 PM, Connor Abbott wrote:
> Did you make sure the other drivers and ttn don't use this? Assming that,
ttn doesn't use it.. freedreno does but only since I already started
pushing some of my backend fixes resulting from the gallium ttn stuff
that I'd been working on.
Did you make sure the other drivers and ttn don't use this? Assming that,
Reviewed-by: Connor Abbott
I really should get to your other series, but I've been busy with
school stuff and whatnot and I've been too lazy -- sorry!
On Tue, Feb 9, 2016 at 8:08 PM, Jason Ekstrand wrote:
> When NIR was
On Mon, Feb 08, 2016 at 06:51:20PM +0200, Topi Pohjolainen wrote:
> This series enables compression for single sampled color surfaces,
> also referred to as "lossless compression". This is yet only for
> driver internal use easing pressure on memory bandwidth and caches
> when writing, blending and
On Mon, Feb 08, 2016 at 06:51:33PM +0200, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> b/src/mesa/driver
Signed-off-by: Alexandre Demers
---
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 49c310c..aab81f9 100644
--- a
When NIR was originally drafted, there was no easy way to determine if
something was constant or not. The result was that we had lots of
special-casing for constant values such as this. Now that load_const
instructions are SSA-only, it's really easy to find constants and this
isn't really needed
Setting brw->ctx.NewDriverState and brw->ctx.NewGLState affects
the dirty bits for the current pipeline. But, we need to flag
everything dirty on *both* pipelines, so that when we switch
back, we'll realize our programs are stale and re-upload them.
To accomplish this, flag the saved state for bo
I think this was just missed; Curro and I were probably writing
code simultaneously and forgot to combine them at the end.
Signed-off-by: Kenneth Graunke
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/gen7_l3_state.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --
When uploading state for the compute pipeline, we don't want to
look at VS/TCS/TES/GS/FS programs, as they might be stale, and
aren't relevant anyway. Likewise, the render pipeline shouldn't
look at CS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93790
Signed-off-by: Kenneth Graunke
R
When uploading state for the compute pipeline, we don't want to
look at VS/TCS/TES/GS/FS programs, as they might be stale, and
aren't relevant anyway. Likewise, the render pipeline shouldn't
look at CS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93790
Signed-off-by: Kenneth Graunke
R
Am 09.02.2016 um 23:49 schrieb Brian Paul:
> Use st->internal_target instead of PIPE_TEXTURE_2D when choosing the
> texture format. Probably no real difference, but let's be consistent.
>
> Simplify a test when determining whether we need normalized texcoords.
>
> Add a new assertion.
> ---
> s
On Mon, Feb 08, 2016 at 06:51:32PM +0200, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/gen8_surface_state.c | 62
> --
> 1 file changed, 29 insertions(+), 33 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/gen8_surfa
On Mon, Feb 08, 2016 at 06:51:31PM +0200, Topi Pohjolainen wrote:
> The assertion is inside a condition mandating num_samples > 1 and
> therefore the first half of the constraint is always met. The
> second half in turn would only be applicable for single sampled
> case and moreover it is trying to
OpenGL ES 1.0 doesn't support using GL_STREAM_DRAW and both
ES 1.0 and 2.0 don't support GL_STREAM_READ in glBufferData().
So, handle it correctly by calling the _mesa_meta_begin()
before create_texture_for_pbo().
V2: Remove the changes related to allocate_storage. (Ian)
Cc: Ian Romanick
Cc: "11
On Mon, Feb 08, 2016 at 06:51:27PM +0200, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> b/src/mesa/drivers
On Mon, Feb 08, 2016 at 06:51:26PM +0200, Topi Pohjolainen wrote:
> Skylake introduces compression support also for the single-sampled
> color buffers. Similarly to the multi-sampled case the color buffer
> will be associated with an auxiliary surface tracking the
> compression state.
>
> Signed-o
On Tue, Feb 9, 2016 at 11:38 PM, Alexandre Demers
wrote:
> On Tue, 9 Feb 2016 at 15:17 Alex Deucher wrote:
>>
>> On Tue, Feb 9, 2016 at 12:47 PM, Marek Olšák wrote:
>> > On Tue, Feb 9, 2016 at 6:17 PM, Alexandre Demers
>> > wrote:
>> >>> +/* The kernel returns 12 for some cards for
On Mon, Feb 08, 2016 at 06:51:23PM +0200, Topi Pohjolainen wrote:
> Currently the logic allocating and setting up miptrees is closely
> combined with decision making when to re-allocate buffers in
> X-tiled layout and when to associate colors with auxiliary buffers.
>
> These auxiliary buffers are
---
src/mesa/state_tracker/st_cb_drawpixels.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c
b/src/mesa/state_tracker/st_cb_drawpixels.c
index 9c1eba4..7096bd2 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/st
Use st->internal_target instead of PIPE_TEXTURE_2D when choosing the
texture format. Probably no real difference, but let's be consistent.
Simplify a test when determining whether we need normalized texcoords.
Add a new assertion.
---
src/mesa/state_tracker/st_cb_drawpixels.c | 8 +---
1 fi
Bitmaps may be drawn with a PIPE_TEXTURE_2D or PIPE_TEXTURE_RECT resource
as determined at context creation by checking if PIPE_CAP_NPOT_TEXTURES is
supported. But many places in the bitmap code were hard-coded to use
PIPE_TEXTURE_2D. Use st->internal_target instead.
I think an older NV chip is
On Mon, Feb 08, 2016 at 06:51:24PM +0200, Topi Pohjolainen wrote:
> In addition to simply calling miptree_create() the higher level
> call intel_miptree_create() also considers if the buffer should
> be associated with an auxiliary buffer based on the given format.
>
> Here we are allocating an au
On Tue, 9 Feb 2016 at 15:17 Alex Deucher wrote:
> On Tue, Feb 9, 2016 at 12:47 PM, Marek Olšák wrote:
> > On Tue, Feb 9, 2016 at 6:17 PM, Alexandre Demers
> > wrote:
> >>> +/* The kernel returns 12 for some cards for an unknown
> >>> reason.
> >>> + * I thought this was
On 02/09/2016 12:57 PM, Miklós Máté wrote:
> On 02/06/2016 12:11 AM, Matt Turner wrote:
>> Thanks a ton for contributing this. This is really cool.
>>
>> I've replied to a couple of patches with a lot of style comments.
>> These issues appear in a lot of places I didn't point out (it was
>> getting
On 02/06/2016 12:11 AM, Matt Turner wrote:
Thanks a ton for contributing this. This is really cool.
I've replied to a couple of patches with a lot of style comments.
These issues appear in a lot of places I didn't point out (it was
getting a bit repetitive). A summary is
- Use spaces around o
On 09/02/2016 20:30, Jose Fonseca wrote:
On 09/02/16 19:17, Axel Davy wrote:
Hi,
We'd need to do some formats conversion in gallium nine, and if possible
we would like to do them in-place.
unpack_rgba_8unorm/pack_rgba_8unorm doesn't seem to explicitly allow
in-place conversion,
but the generat
On Tue, Feb 09, 2016 at 12:10:18PM -0800, Ian Romanick wrote:
> On 02/09/2016 11:58 AM, Ben Widawsky wrote:
> > On Mon, Feb 08, 2016 at 09:48:54PM -0800, Jason Ekstrand wrote:
> >> On Sat, Feb 6, 2016 at 6:11 PM, Ben Widawsky
> >> wrote:
> >>
> >>> This fixes an assertion failure in [at least] one
On Mon, Feb 08, 2016 at 06:51:22PM +0200, Topi Pohjolainen wrote:
> The logic in intel_miptree_create() uses the local copies
> for 64-byte aligned equivalent but only for stencil buffers which
> in turn are never x-tiled. This makes the logic a little more
> explicit and helps to keep subsequent p
On Tue, Feb 9, 2016 at 12:47 PM, Marek Olšák wrote:
> On Tue, Feb 9, 2016 at 6:17 PM, Alexandre Demers
> wrote:
>>> +/* The kernel returns 12 for some cards for an unknown
>>> reason.
>>> + * I thought this was supposed to be a power of two.
>>> + */
>>> +
On Tue, 9 Feb 2016 at 12:47 Marek Olšák wrote:
> On Tue, Feb 9, 2016 at 6:17 PM, Alexandre Demers
> wrote:
> >> +/* The kernel returns 12 for some cards for an unknown
> >> reason.
> >> + * I thought this was supposed to be a power of two.
> >> + */
> >> +
On 02/09/2016 11:58 AM, Ben Widawsky wrote:
> On Mon, Feb 08, 2016 at 09:48:54PM -0800, Jason Ekstrand wrote:
>> On Sat, Feb 6, 2016 at 6:11 PM, Ben Widawsky
>> wrote:
>>
>>> This fixes an assertion failure in [at least] one of the Unreal Engine
>>> Linux
>>> demo/games that uses DXT1 compression.
On 02/08/2016 04:21 PM, Matt Turner wrote:
> On Mon, Feb 8, 2016 at 3:57 PM, Ian Romanick wrote:
>> On 02/04/2016 05:47 PM, Matt Turner wrote:
>>> Walking the SSA definitions in order means that we consider the smallest
>>> algebraic optimizations before larger optimizations. So if a smaller
>>> r
On Mon, Feb 08, 2016 at 06:51:21PM +0200, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 15 +++
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> b/s
On Mon, Feb 08, 2016 at 09:48:54PM -0800, Jason Ekstrand wrote:
> On Sat, Feb 6, 2016 at 6:11 PM, Ben Widawsky
> wrote:
>
> > This fixes an assertion failure in [at least] one of the Unreal Engine
> > Linux
> > demo/games that uses DXT1 compression. Specifically, the "Vehicle Game".
> >
> > At so
On 02/09/2016 11:30 AM, Jose Fonseca wrote:
> On 09/02/16 19:17, Axel Davy wrote:
>> Hi,
>>
>> We'd need to do some formats conversion in gallium nine, and if possible
>> we would like to do them in-place.
>>
>> unpack_rgba_8unorm/pack_rgba_8unorm doesn't seem to explicitly allow
>> in-place conver
On 02/09/2016 08:56 AM, Ian Romanick wrote:
> On 02/09/2016 06:06 AM, Samuel Iglesias Gonsálvez wrote:
>>
>> On Tue, 2016-01-12 at 20:34 +1100, Timothy Arceri wrote:
>>> From Section 4.4.5 (Uniform and Shader Storage Block Layout
>>> Qualifiers) of the OpenGL 4.50 spec:
>>>
>>> "The align qualifi
Hi again,
Actually, "util_format_translate" seems to fit our needs.
It could probably be optimised better (8unorm fitting format->ARGB could
avoid using tmp buffer for example),
but that should be ok for our needs.
Yours,
Axel Davy
On 09/02/2016 20:17, Axel Davy wrote:
Hi,
We'd need to do
On 09/02/16 19:17, Axel Davy wrote:
Hi,
We'd need to do some formats conversion in gallium nine, and if possible
we would like to do them in-place.
unpack_rgba_8unorm/pack_rgba_8unorm doesn't seem to explicitly allow
in-place conversion,
but the generated code seems to be fine with that.
Can w
> On Feb 9, 2016, at 11:23, Tom Stellard wrote:
>
> We should still add +fp64-denormals even if the backend doesn't do
> anything with it now.
This is the default, so it doesn’t really matter anyway.
-Matt___
mesa-dev mailing list
mesa-dev@lists.free
On Mon, Feb 08, 2016 at 09:38:32PM +0100, Marek Olšák wrote:
> On Mon, Feb 8, 2016 at 5:08 PM, Tom Stellard wrote:
> > On Sat, Feb 06, 2016 at 01:15:42PM +0100, Marek Olšák wrote:
> >> From: Marek Olšák
> >>
> >> This fixes FP16 conversion instructions for VI, which has 16-bit floats,
> >> but no
Hi,
We'd need to do some formats conversion in gallium nine, and if possible
we would like to do them in-place.
unpack_rgba_8unorm/pack_rgba_8unorm doesn't seem to explicitly allow
in-place conversion,
but the generated code seems to be fine with that.
Can we rely on these functions to be s
https://bugs.freedesktop.org/show_bug.cgi?id=93813
Brian Paul changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
On Tue, Feb 9, 2016 at 9:44 AM, Sameer Kibey wrote:
> Update the format in which workarounds are documented
> in the source code. This allows mesa to be parsed
> by the list-workarounds utility in intel-gpu-tools.
I don't know that I find this valuable.
Ben touched on one concern -- keeping it u
Am 09.02.2016 um 18:03 schrieb Brian Paul:
> Ilia Mirkin found/fixed the mistake.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93813
> Cc: "11.1"
> ---
> src/mesa/main/viewport.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/main/viewport.c
On 09/02/16 17:03, Brian Paul wrote:
Ilia Mirkin found/fixed the mistake.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93813
Cc: "11.1"
---
src/mesa/main/viewport.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/viewport.c b/src/mesa/main/view
On Tue, Feb 9, 2016 at 6:17 PM, Alexandre Demers
wrote:
>> +/* The kernel returns 12 for some cards for an unknown
>> reason.
>> + * I thought this was supposed to be a power of two.
>> + */
>> +if (ws->gen == DRV_SI && ws->info.num_tile_pipes == 12)
Update the format in which workarounds are documented
in the source code. This allows mesa to be parsed
by the list-workarounds utility in intel-gpu-tools.
Signed-off-by: Sameer Kibey
---
src/mesa/drivers/dri/i965/brw_binding_tables.c | 3 ++-
src/mesa/drivers/dri/i965/brw_blorp.cpp| 2 +
> -Original Message-
> From: Ben Widawsky [mailto:b...@bwidawsk.net]
> Sent: Monday, February 08, 2016 5:41 PM
> To: Kibey, Sameer
> Cc: mesa-dev@lists.freedesktop.org; Sharp, Sarah A; Widawsky, Benjamin
> Subject: Re: [Mesa-dev] [PATCH v2] workarounds: Update workaround
> names and platfo
> +/* The kernel returns 12 for some cards for an unknown
reason.
> + * I thought this was supposed to be a power of two.
> + */
> +if (ws->gen == DRV_SI && ws->info.num_tile_pipes == 12)
> +ws->info.num_tile_pipes = 8;
> +
I may be l
Ilia Mirkin found/fixed the mistake.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93813
Cc: "11.1"
---
src/mesa/main/viewport.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/viewport.c b/src/mesa/main/viewport.c
index 7d891429..681e46b 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=93813
--- Comment #9 from Mathias Fröhlich ---
Brian,
I had the same experience with the nvidia driver back when I wrote the test
some time ago.
But if I recall correctly, then the nvidia driver does agree with the test in
any of these tested state co
Patches 1, 2, and 4 are
Reviewed-by: Ian Romanick
Pending the result of the Khronos spec bug, patch 3 is also R-b.
On 01/12/2016 01:34 AM, Timothy Arceri wrote:
> I don't think this will do much as it's a compiler error
> to use component without location which is already in the
> table but its
On 02/09/2016 06:06 AM, Samuel Iglesias Gonsálvez wrote:
>
> On Tue, 2016-01-12 at 20:34 +1100, Timothy Arceri wrote:
>> From Section 4.4.5 (Uniform and Shader Storage Block Layout
>> Qualifiers) of the OpenGL 4.50 spec:
>>
>> "The align qualifier makes the start of each block member have a
>>
https://bugs.freedesktop.org/show_bug.cgi?id=93813
--- Comment #8 from Ilia Mirkin ---
Mathias, Jose, and Brian -- thanks to all of you for taking a look. Sounds like
everyone's in agreement that Mesa is wrong.
I'll get the ball rolling on throwing something into piglit and sending out my
patch
On 02/05/2016 06:57 PM, Timothy Arceri wrote:
> For the past couple of months I've been working away solely in the
> wasteland that is GLSL IR and one things seems clear. No one wants to
> review this code anymore. A lot of the original developers have either
> moved on or are busy with other thing
On 01/25/2016 06:33 PM, Timothy Arceri wrote:
> On Mon, 2016-01-25 at 16:58 -0800, Ian Romanick wrote:
>> On 01/25/2016 04:46 PM, Timothy Arceri wrote:
>>> Previously an empty program would go through the entire
>>> link_shaders() function and we would have to be careful
>>> not to cause a segfault
https://bugs.freedesktop.org/show_bug.cgi?id=93813
--- Comment #7 from Brian Paul ---
I think Ilia's fix in comment #1 is correct.
BTW, the piglit clip-control test currently passes with Mesa but fails with
nvidia's driver. I'll try to take a closer look.
--
You are receiving this mail becaus
On 02/08/2016 05:11 PM, Ian Romanick wrote:
> On 02/05/2016 01:11 PM, Miklós Máté wrote:
>> dri drawables must never be released when unbound from a context
>> as long as their corresponding glx objects (window, pixmap, pbuffer)
>> still exist
>
> I'd really like to have Kristian weigh in, since D
On 08.02.2016 12:07, Brian Paul wrote:
Most apps don't use glBitmap so don't allocate the bitmap cache or
gallium state objects/shaders/etc until the first call to st_Bitmap().
---
src/mesa/state_tracker/st_cb_bitmap.c | 145 ++
src/mesa/state_tracker/st_cb_bitm
On 09.02.2016 05:40, Samuel Pitoiset wrote:
This avoids a possible NULL dereference because ureg_create() might
return a NULL pointer.
Spotted by coverity.
Thanks.
Reviewed-by: Nicolai Hähnle
Signed-off-by: Samuel Pitoiset
Cc: Nicolai Hähnle
---
src/mesa/state_tracker/st_cb_texture.c
Reviewed-by: Samuel Iglesias Gonsálvez
On Tue, 2016-01-12 at 20:34 +1100, Timothy Arceri wrote:
> ---
> docs/GL3.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/docs/GL3.txt b/docs/GL3.txt
> index c64784c..1377eb8 100644
> --- a/docs/GL3.txt
> +++ b/docs/GL3.txt
> @
Reviewed-by: Samuel Iglesias Gonsálvez
On Tue, 2016-01-12 at 20:34 +1100, Timothy Arceri wrote:
> ---
> src/glsl/ast.h | 11 +++
> src/glsl/ast_type.cpp | 4
> src/glsl/glsl_parser.yy | 11 +++
> 3 files changed, 26 insertions(+)
>
> diff --git a/src/glsl/ast.h
Reviewed-by: Samuel Iglesias Gonsálvez
On Tue, 2016-01-12 at 20:34 +1100, Timothy Arceri wrote:
> I don't think this will do much as it's a compiler error
> to use component without location which is already in the
> table but its good to be consistent.
> ---
> src/glsl/ast_type.cpp | 1 +
> 1 f
On Tue, 2016-01-12 at 20:34 +1100, Timothy Arceri wrote:
> From Section 4.4.5 (Uniform and Shader Storage Block Layout
> Qualifiers) of the OpenGL 4.50 spec:
>
> "The align qualifier makes the start of each block member have a
> minimum byte alignment. It does not affect the internal layout
On 7 February 2016 at 23:13, Axel Davy wrote:
> A few more patches I'd like to get in 11.2.
>
> There a few cleanup patches and some fixes.
>
> The last patch fixes build with llvm 32 bits
> when it isn't built with -mstackrealign.
> Basically Apps have a 4 byte aligned stack,
> and it needs to be
On Mon, Feb 08, 2016 at 06:51:42PM +0200, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 21 +
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 +++
> 2 files changed, 24 insertions(+)
>
> diff --git a/src
https://bugs.freedesktop.org/show_bug.cgi?id=93813
--- Comment #6 from Jose Fonseca ---
(In reply to Mathias Fröhlich from comment #4)
> I believe that the piglit tests don't uses non zero y values for
> the viewport. May be we want to add a test there also.
Definitely. And in fact James exampl
https://bugs.freedesktop.org/show_bug.cgi?id=93813
Jose Fonseca changed:
What|Removed |Added
CC||bri...@vmware.com,
|
On Tue, 2016-02-09 at 01:29 -0800, Kenneth Graunke wrote:
> On Tuesday, February 2, 2016 12:20:01 PM PST Timothy Arceri wrote:
> > The existing code was very hard to follow and has been the source
> > of at least 3 bugs in the past year.
> >
> > The existing code also has a bug for SSO where if we
Thanks Nanley,
I confirm that this patch-set fix the Bugzilla:92193
/Marta
> -Original Message-
> From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On
> Behalf Of Nanley Chery
> Sent: Monday, February 8, 2016 11:38 PM
> To: mesa-dev@lists.freedesktop.org
> Cc: 11.0 11.1 ; Ch
On Tue, 2016-02-09 at 00:50 -0800, Kenneth Graunke wrote:
> On Friday, February 5, 2016 1:08:19 PM PST Timothy Arceri wrote:
> > Fixes:
> > dEQP-
> > GLES31.functional.shaders.arrays_of_arrays.invalid.empty_declaratio
> > n_without_var_name_fragment
> > dEQP-
> > GLES31.functional.shaders.arrays_of
This avoids a possible NULL dereference because ureg_create() might
return a NULL pointer.
Spotted by coverity.
Signed-off-by: Samuel Pitoiset
Cc: Nicolai Hähnle
---
src/mesa/state_tracker/st_cb_texture.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/state_tracker/st_cb_textur
On Tue, 2016-02-09 at 02:12 -0800, Kenneth Graunke wrote:
> If the only stage is MESA_SHADER_COMPUTE, we should complain that
> there's nothing coming out of the geometry shader stage just as
> we would if the first stage were MESA_SHADER_FRAGMENT.
>
> Also, it's valid for tessellation shaders to
If the only stage is MESA_SHADER_COMPUTE, we should complain that
there's nothing coming out of the geometry shader stage just as
we would if the first stage were MESA_SHADER_FRAGMENT.
Also, it's valid for tessellation shaders to be the stage producing
transform feedback varyings, so mention those
On Saturday, January 30, 2016 8:43:52 AM PST Timothy Arceri wrote:
> ---
>
> This applies on top of:
>
> http://patchwork.freedesktop.org/patch/71619/
>
> src/compiler/glsl/linker.cpp | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
Nice!
This series is:
Reviewed-by: Kenne
On Saturday, January 30, 2016 10:50:12 AM PST Timothy Arceri wrote:
> This was added in 2548092ad80156a4 although I don't see why as it
> was already in the linker.h header.
> ---
> src/compiler/glsl/linker.cpp | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/src/compiler/glsl/linker.cpp
On Tuesday, February 2, 2016 12:20:01 PM PST Timothy Arceri wrote:
> The existing code was very hard to follow and has been the source
> of at least 3 bugs in the past year.
>
> The existing code also has a bug for SSO where if we have a
> multi-stage SSO for example a tes -> gs program, if we try
On Tuesday, January 26, 2016 11:46:19 AM PST Timothy Arceri wrote:
> Previously an empty program would go through the entire
> link_shaders() function and we would have to be careful
> not to cause a segfault.
>
> In core profile also now set link_status to false by
> generating an error, it was p
On Tuesday, February 2, 2016 11:53:57 AM PST Timothy Arceri wrote:
> These are used in GLSL IR to removed unused varyings and match
> transform feedback variables. There is no need to use these in NIR.
> ---
> src/compiler/nir/glsl_to_nir.cpp | 2 --
> src/compiler/nir/nir.h | 18 --
On Friday, February 5, 2016 1:08:19 PM PST Timothy Arceri wrote:
> Fixes:
> dEQP-GLES31.functional.shaders.arrays_of_arrays.invalid.empty_declaration_without_var_name_fragment
> dEQP-GLES31.functional.shaders.arrays_of_arrays.invalid.empty_declaration_without_var_name_vertex
>
> Cc: Ilia Mirkin
>
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