Cc: "10.2"
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_draw.c| 4 +++-
src/mesa/drivers/dri/i965/brw_draw_upload.c | 2 +-
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dr
---
src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 52
1 file changed, 35 insertions(+), 17 deletions(-)
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 91f4322..7e66149 100644
--- a/src/intel/vul
Right now, we're setting the range to [0, 0] which is obviously bogus.
Instead, we should set it to be invalid like we do for DrawIndirect.
Cc: "10.2"
---
src/mesa/vbo/vbo_exec_array.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vb
The old code always divided rounded down and then subtracted 1. What we
wanted was to divide rounded up and then subtract 1 which is equivalent to
subtracting 1 and then dividing rounded down.
Cc: "10.2"
---
src/mesa/drivers/dri/i965/brw_draw_upload.c | 4 ++--
1 file changed, 2 insertions(+),
---
src/compiler/glsl/linker.cpp | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index 70c6317..71a71df 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4875,10 +4875,13 @@ link_s
---
src/intel/vulkan/anv_nir_apply_dynamic_offsets.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_nir_apply_dynamic_offsets.c
b/src/intel/vulkan/anv_nir_apply_dynamic_offsets.c
index 84fed0a..80ef8ee 100644
--- a/src/intel/vulkan/anv_nir_apply_dy
This prevents array overflow when the block is actually an array of UBOs or
SSBOs. On some hardware such as i965, such overflows can cause GPU hangs.
---
src/compiler/glsl/ir_optimization.h | 2 +-
src/compiler/glsl/linker.cpp | 3 ++-
src/compiler/glsl/lower_ubo_reference.cp
Previously, we were using the size of the whole BO which may be
substantially larger than the actual index buffer size.
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_draw_upload.c | 8 ++--
src/mesa/drivers/dri/i965/gen8_draw_upload.c | 2 +-
3 files ch
Previously, we were using the size of the BO which may be substantially
larger than the actual vertex buffer size.
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_draw_upload.c | 52 +++-
src/mesa/drivers/dri/i965/gen8_draw_upload.c |
Previously, we only handled the "I don't know what's going on" case for
things with InstanceDivisor == 0. However, in the DrawIndirect case we can
get num_instances == 0 and we don't know what's going on with the instanced
ones either. This commit makes the worst-case bound the default and then
c
Originally we removed the instruction, changed the source, and then
re-inserted it. This works, but nir_instr_rewrite_src is a bit more
obviously correct.
---
src/intel/vulkan/anv_nir_apply_dynamic_offsets.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/intel/vu
---
src/compiler/nir/nir_lower_samplers.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/compiler/nir/nir_lower_samplers.c
b/src/compiler/nir/nir_lower_samplers.c
index 0de9eb8..4a43269 100644
--- a/src/compiler/nir/nir_lower_samplers.c
+++ b/src/compiler/nir/nir
---
src/intel/vulkan/anv_device.c | 3 +++
src/intel/vulkan/anv_private.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 54810d9..fbc94ca 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -8
The previous code got the BO the first time we encountered it. However,
this can potentially lead to problems if the BO is used for multiple arrays
with the same buffer object because the range we declare as busy may not be
quite right. By delaying the call to intel_bufferobj_buffer, we can ensur
The vbo layer passes an index_bounds_valid flag that we should be using
instead. This also fixes a bug when min_index == -1 and basevertex != 0
where we were actually comparing min_index + basevertex == -1 which was
false and we were getting the wrong buffer-sizing path.
Cc: "10.2"
---
src/mesa
On Wed, May 18, 2016 at 11:50 PM, Michael Schellenberger Costa <
mschellenbergerco...@googlemail.com> wrote:
> Hi Jason,
>
> Am 19.05.2016 um 06:42 schrieb Jason Ekstrand:
> > Originally we removed the instruction, changed the source, and then
> > re-inserted it. This works, but nir_instr_rewrite
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