Re: [Mesa-dev] [PATCH] anv: fix enumeration of properties

Hey Emil, On Thu, 2016-10-06 at 14:12 +0100, Emil Velikov wrote: > From: Emil Velikov > > Driver should enumerate only up-to min2(num_available, num_requested) > properties and return VK_INCOMPLETE if the # of requested props is > smaller than the ones available. >

Re: [Mesa-dev] [PATCH] anv: fix segfault in anv_BindImageMemory

It's not a problem on sky lake :-) For a very convoluted reason but yeah, we should fix this. Thanks! Reviewed-by: Jason Ekstrand On Tue, Nov 22, 2016 at 10:06 PM, Dave Airlie wrote: > From: Dave Airlie > > Since bind image

[Mesa-dev] [PATCH] anv: fix segfault in anv_BindImageMemory

From: Dave Airlie Since bind image memory started memsetting surfaces, the device node can't be NULL, since we lookup device->info.has_llc. Not sure why it ever was NULL before. Fixes some things on my Ivybridge. Signed-off-by: Dave Airlie ---

[Mesa-dev] [PATCH] [rfc] radv: add initial prime support.

From: Dave Airlie This is kind of a gross hacks, but vulkan doesn't specify anything but it would be nice to let people with prime systems at least see some stuff rendering for now. This creates a linear shadow image in GART that gets blitted to at the image transition. Now

Re: [Mesa-dev] [PATCH] anv: expose depthBiasClamp, it is already set

On Tue, Nov 22, 2016 at 11:03 PM, Ilia Mirkin wrote: > The gen7/8_cmd_buffer logic already sets the clamp, and it's piped > through via the dynamic state. > > Signed-off-by: Ilia Mirkin > --- > > Untested. I don't think there are any VK-CTS tests about

[Mesa-dev] [PATCH] anv: enable drawIndirectFirstInstance

This was already piped through in the CmdDraw(Indexed)Indirect handling. Signed-off-by: Ilia Mirkin --- Passes the 2 vk-cts tests dedicated to it as well. src/intel/vulkan/anv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH] anv: expose depthBiasClamp, it is already set

The gen7/8_cmd_buffer logic already sets the clamp, and it's piped through via the dynamic state. Signed-off-by: Ilia Mirkin --- Untested. I don't think there are any VK-CTS tests about this. But reading the code, it all seems to have been piped through already.

[Mesa-dev] [PATCH 2/6] intel/blorp_blit: Split blorp blits if they are too large

We rename do_blorp_blit() to try_blorp_blit(), and add a return error if the surface size for the blit is too large. Now, do_blorp_blit() is rewritten to try to split the blit into smaller operations if try_blorp_blit() fails. Note: In this commit, try_blorp_blit() will always attempt to blit and

[Mesa-dev] [PATCH 6/6] i965: Increase max texture to 16k for gen7+

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98297 Signed-off-by: Jordan Justen --- src/mesa/drivers/dri/i965/brw_context.c | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c

[Mesa-dev] [PATCH 1/6] intel/blorp_blit: Create structure for src & dst coordinates

This will be useful for splitting blits into smaller sizes. Signed-off-by: Jordan Justen --- src/intel/blorp/blorp_blit.c | 75 +--- 1 file changed, 56 insertions(+), 19 deletions(-) diff --git a/src/intel/blorp/blorp_blit.c

[Mesa-dev] [PATCH 5/6] intel/blorp_blit: Add split_blorp_blit_debug switch

Enabling this debug switch causes surface shrinking to happen by default, and lowers the surface size limit which causes blorp blits to be split. Signed-off-by: Jordan Justen --- src/intel/blorp/blorp_blit.c | 11 --- 1 file changed, 8 insertions(+), 3

[Mesa-dev] [PATCH 3/6] intel/blorp_blit: Adjust blorp surface parameters for split blits

If try_blorp_blit() previously returned that a blit was too large, shrink_surface_params() will be used to update the surface parameters for the smaller blit so the blit operation can proceed. Signed-off-by: Jordan Justen --- src/intel/blorp/blorp_blit.c | 124

[Mesa-dev] [PATCH 4/6] intel/blorp_blit: Enable splitting large blorp blits

Detect when the surface sizes are too large for a blorp blit. When it is too large, the blorp blit will be split into a smaller operation and attempted again. For gen7, this fixes the cts test:

[Mesa-dev] [PATCH 0/6] Split blorp blits; Enable 16k render target on gen7+

git://people.freedesktop.org/~jljusten/mesa split-blorp-blit-v1 (These patches have been applied on top of my ISL surface dumping patch series, which is included in the branch above.) This series allows large blorp blits to be split into multiple smaller blits. For Haswell, this fixes some

Re: [Mesa-dev] [PATCH] util: fix missing swizzle components in the SINT <-> UINT conversion string

Am 22.11.2016 um 22:33 schrieb Charmaine Lee: > Fixes tgsi error introduced in commit 3817a7a. The error complains missing > swizzle component in the conversion string "UMIN TEMP[0], TEMP[0], IMM[0].x". > --- > src/gallium/auxiliary/util/u_simple_shaders.c | 4 ++-- > 1 file changed, 2

Re: [Mesa-dev] [PATCH 3/3] glsl/cache/tests: Cast cache_get result to avoid compiler warning

On Tue, Nov 22, 2016 at 2:48 PM, Matt Turner wrote: > On 11/22, Aaron Watry wrote: > >> disk_cache_get returns void*, but we were storing/comparing a char*. >> >> Signed-off-by: Aaron Watry >> --- >> Note that this did, and still, segfaults for me when I

Re: [Mesa-dev] [PATCH 4/3] i965/hiz: Add debug dump for depth/hiz buffers around hiz ops

On Tue, Nov 22, 2016 at 4:02 PM, Jordan Justen wrote: > On 2016-11-22 15:16:45, Jason Ekstrand wrote: > >On Thu, Nov 17, 2016 at 3:27 PM, Jordan Justen < > jordan.l.jus...@intel.com> > >wrote: > > > > Signed-off-by: Jordan Justen

[Mesa-dev] [PATCH] swr: [rasterizer common] add SwrTrace() and macros

--- .../drivers/swr/rasterizer/common/swr_assert.cpp | 96 ++ .../drivers/swr/rasterizer/common/swr_assert.h | 14 2 files changed, 95 insertions(+), 15 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/common/swr_assert.cpp

Re: [Mesa-dev] [PATCH] swr: [rasterizer core] fix cast for stencil clear value

Reviewed-by: Ilia Mirkin On Tue, Nov 22, 2016 at 8:56 PM, Tim Rowley wrote: > Bad type cast for stencil clear value was picking up structure > padding bytes. > --- > src/gallium/drivers/swr/rasterizer/core/backend.cpp | 5 ++--- > 1 file

[Mesa-dev] [PATCH] swr: [rasterizer core] fix cast for stencil clear value

Bad type cast for stencil clear value was picking up structure padding bytes. --- src/gallium/drivers/swr/rasterizer/core/backend.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/core/backend.cpp

[Mesa-dev] [PATCH 5/6] swr: reorder renderable formats, add grouping comments

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/swr/swr_screen.cpp | 152 +++-- 1 file changed, 87 insertions(+), 65 deletions(-) diff --git a/src/gallium/drivers/swr/swr_screen.cpp b/src/gallium/drivers/swr/swr_screen.cpp index

[Mesa-dev] [PATCH 3/6] swr: enable cubemap arrays

Everything is in place for these. Signed-off-by: Ilia Mirkin --- src/gallium/drivers/swr/swr_screen.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/swr_screen.cpp b/src/gallium/drivers/swr/swr_screen.cpp index

[Mesa-dev] [PATCH 1/6] swr: only store up to the LOD size

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/swr/swr_draw.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/swr/swr_draw.cpp b/src/gallium/drivers/swr/swr_draw.cpp index e8c5b23..c4d5e5c 100644 ---

[Mesa-dev] [PATCH 6/6] swr: add missing rgbx8_srgb variant

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/swr/swr_screen.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/swr/swr_screen.cpp b/src/gallium/drivers/swr/swr_screen.cpp index 642f9be..19bb102 100644 ---

[Mesa-dev] [PATCH 2/6] swr: rearrange caps into limits/supported/unsupported groups

I find this a lot more readable and compact - much easier to scan through the list and see what's on and what's off. No functional change intended. Signed-off-by: Ilia Mirkin --- src/gallium/drivers/swr/swr_screen.cpp | 213 + 1 file

[Mesa-dev] [PATCH 4/6] swr: use util_copy_framebuffer_state helper

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/swr/swr_state.cpp | 13 + 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/src/gallium/drivers/swr/swr_state.cpp b/src/gallium/drivers/swr/swr_state.cpp index 4119379..8541aca 100644 ---

[Mesa-dev] [PATCH] scons: Recognize LLVM_CONFIG environment variable.

Signed-off-by: Vinson Lee --- scons/llvm.py | 19 --- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/scons/llvm.py b/scons/llvm.py index 977e47a..a27bf00 100644 --- a/scons/llvm.py +++ b/scons/llvm.py @@ -194,11 +194,16 @@ def generate(env):

Re: [Mesa-dev] [PATCH 4/3] i965/hiz: Add debug dump for depth/hiz buffers around hiz ops

On 2016-11-22 15:16:45, Jason Ekstrand wrote: >On Thu, Nov 17, 2016 at 3:27 PM, Jordan Justen >wrote: > > Signed-off-by: Jordan Justen > Cc: Matt Turner > --- >

Re: [Mesa-dev] [PATCH] util: fix missing swizzle components in the SINT <-> UINT conversion string

Looks good to me. Reviewed-by: Brian Paul On Tue, Nov 22, 2016 at 2:33 PM, Charmaine Lee wrote: > Fixes tgsi error introduced in commit 3817a7a. The error complains missing > swizzle component in the conversion string "UMIN TEMP[0], TEMP[0], >

Re: [Mesa-dev] EGL/android: pbuffer implementation.

Hi, Tapani Can you share your detailed CTS result summary and logs? We will double check it. Btw, we do the CTS test on SKL GT2 and android-ia. Thanks, Randy -Original Message- From: Palli, Tapani Sent: Tuesday, November 22, 2016 2:44 PM To: Xu, Randy ; Tomasz Figa

Re: [Mesa-dev] EGL/android: pbuffer implementation.

Hi ,Tapani With this pbuffer patch, only three EGL dEQP failure remained on Android platform , they are under investigation now dEQP-EGL.functional.image.create#gles2_renderbuffer_depth16_depth_buffer fail due to "=== with config

Re: [Mesa-dev] [PATCH] intel/aubinator: Use the correct length for MEDIA commands

Hi Jason, this would be the same as case 3. Is that intentional and if so would you combine the cases? --Michael -Ursprüngliche Nachricht- Von: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] Im Auftrag von Jason Ekstrand Gesendet: Dienstag, 22. November 2016 03:59 An:

Re: [Mesa-dev] [PATCH 1/3] intel/blorp: Support map/unmap of blorp_address

On 2016-11-22 15:06:25, Jason Ekstrand wrote: >On Wed, Nov 16, 2016 at 12:56 AM, Jordan Justen > wrote: > > Signed-off-by: Jordan Justen > --- > src/intel/blorp/blorp.h | 8 +++ >

Re: [Mesa-dev] [PATCH 03/58] glsl: use linked_shaders bitmask to iterate stages for subroutine fields

On Tue, 2016-11-22 at 18:49 +, Emil Velikov wrote: > On 20 November 2016 at 13:28, Timothy Arceri > wrote: > > > > > @@ -3134,11 +3134,10 @@ check_resources(struct gl_context *ctx, > > struct gl_shader_program *prog) > >  static void > >  

[Mesa-dev] [PATCH 13/14] mesa/glsl: set and get cs layouts to and from shader_info

--- src/compiler/glsl/linker.cpp | 35 +++ src/mesa/main/mtypes.h | 10 -- src/mesa/main/shaderapi.c| 6 ++ src/mesa/main/shaderobj.c| 2 -- 4 files changed, 17 insertions(+), 36 deletions(-) diff --git a/src/compiler/glsl/linker.cpp

[Mesa-dev] [PATCH 14/14] mesa: remove unused gl_shader_info field from gl_linked_shader

--- src/mesa/main/mtypes.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index b5c4f5d..fbf58b9 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -2348,8 +2348,6 @@ struct gl_linked_shader struct exec_list

[Mesa-dev] [PATCH 12/14] mesa/glsl: set and get gs layouts directly to and from shader_info

--- src/compiler/glsl/linker.cpp | 70 +++- src/mesa/main/shaderapi.c| 12 +++- 2 files changed, 41 insertions(+), 41 deletions(-) diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp index f9821a5..01389a2 100644 ---

[Mesa-dev] [PATCH 06/14] mesa/glsl: move uses_gl_fragcoord to gl_shader

This is only used by gl_linked_shader as a temp during linking so use a temp there instead. --- src/compiler/glsl/glsl_parser_extras.cpp | 2 +- src/compiler/glsl/linker.cpp | 12 +--- src/mesa/main/mtypes.h | 3 +-- 3 files changed, 7 insertions(+), 10

[Mesa-dev] [PATCH 10/14] mesa/glsl: move TransformFeedbackBufferStride to gl_shader

Here we remove the single use of this field in gl_linked_shader which allows us to move the field out of gl_shader_info While we are at it we rewrite link_xfb_stride_layout_qualifiers() to be more clear. --- src/compiler/glsl/glsl_parser_extras.cpp | 2 +- src/compiler/glsl/link_varyings.cpp

[Mesa-dev] [PATCH 08/14] mesa/glsl: move pixel_center_integer to gl_shader

This is only used by gl_linked_shader as a temp during linking so use a temp there instead. --- src/compiler/glsl/glsl_parser_extras.cpp | 2 +- src/compiler/glsl/linker.cpp | 8 +++- src/mesa/main/mtypes.h | 3 +-- 3 files changed, 5 insertions(+), 8

[Mesa-dev] [PATCH 02/14] mesa/glsl/i965: set and use tcs vertices_out directly

--- src/compiler/glsl/linker.cpp| 25 - src/mesa/drivers/dri/i965/brw_tcs.c | 6 ++ src/mesa/main/shaderapi.c | 6 +- 3 files changed, 15 insertions(+), 22 deletions(-) diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp

[Mesa-dev] [PATCH 11/14] mesa/glsl/i965: set and get tes layouts directly to and from shader_info

--- src/compiler/glsl/linker.cpp| 60 ++--- src/mesa/drivers/dri/i965/brw_tcs.c | 6 ++-- src/mesa/main/shaderapi.c | 15 +++--- 3 files changed, 37 insertions(+), 44 deletions(-) diff --git a/src/compiler/glsl/linker.cpp

[Mesa-dev] [PATCH 04/14] mesa/glsl: move ARB_fragment_coord_conventions_enable field

This is only used by gl_shader not gl_linked_shader so move it there. --- src/compiler/glsl/glsl_parser_extras.cpp | 2 +- src/compiler/glsl/linker.cpp | 2 +- src/mesa/main/mtypes.h | 3 ++- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH 09/14] glsl: exit loop early if we find xfb layout qualifers

--- src/compiler/glsl/link_varyings.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/compiler/glsl/link_varyings.cpp b/src/compiler/glsl/link_varyings.cpp index da51fd8..398e1da 100644 --- a/src/compiler/glsl/link_varyings.cpp +++ b/src/compiler/glsl/link_varyings.cpp @@ -120,6 +120,7

[Mesa-dev] [PATCH 05/14] mesa/glsl: move redeclares_gl_fragcoord to gl_shader

This is never used in gl_linked_shader other than as a temp during linking so just use a temp instead. --- src/compiler/glsl/glsl_parser_extras.cpp | 3 +-- src/compiler/glsl/linker.cpp | 21 - src/mesa/main/mtypes.h | 3 ++- 3 files changed, 11

[Mesa-dev] [PATCH 03/14] st/mesa/glsl: set early_fragment_tests directly in shader_info

We also move EarlyFragmentTests out of the gl_shader_info struct as it is now only used by gl_shader. --- src/compiler/glsl/glsl_parser_extras.cpp | 2 +- src/compiler/glsl/linker.cpp | 4 ++-- src/mesa/main/mtypes.h | 12 ++--

[Mesa-dev] [PATCH 07/14] mesa/glsl: move origin_upper_left to gl_shader

This is only used by gl_linked_shader as a temp during linking so use a temp there instead. --- src/compiler/glsl/glsl_parser_extras.cpp | 2 +- src/compiler/glsl/linker.cpp | 8 +++- src/mesa/main/mtypes.h | 9 + 3 files changed, 9 insertions(+), 10

[Mesa-dev] [PATCH 01/14] i965: get outputs_written from gl_program

There is no need to go via the pointer in nir_shader. This change is required for the shader cache as we don't create a nir_shader. --- src/mesa/drivers/dri/i965/brw_vs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vs.c

[Mesa-dev] More shader state clean-ups

This series applies on top of my series to rework the way we handle the gl shader/program structs [1]. These changes allow us to stop passing duplicate fields around for no good reason, and allow us to simplify the on disk shader cache by getting all the values from a single location we can

Re: [Mesa-dev] [PATCH 2/2] i965: Add i965 plumbing for ARB_post_depth_coverage for i965 (gen9+).

Reviewed-by: Jason Ekstrand Of course, the other has to land first. :-) On Tue, Nov 22, 2016 at 1:55 PM, Plamena Manolova < plamena.manol...@intel.com> wrote: > This extension allows the fragment shader to control whether values in > gl_SampleMaskIn[] reflect the coverage

Re: [Mesa-dev] [PATCH 3/3] intel/blorp_blit: Add option to dump surfaces on blits

The first three are Reviewed-by: Jason Ekstrand The last one seems really clunky to me. I sort-of get why since we don't actually use blorp for gen8 HiZ ops. I think it would be better if you split it into two patches, one which merges intel_hiz_exec with

Re: [Mesa-dev] [PATCH 4/3] i965/hiz: Add debug dump for depth/hiz buffers around hiz ops

On Thu, Nov 17, 2016 at 3:27 PM, Jordan Justen wrote: > Signed-off-by: Jordan Justen > Cc: Matt Turner > --- > src/mesa/drivers/dri/i965/brw_blorp.c | 83 -- > - > 1 file changed, 66

Re: [Mesa-dev] [PATCH 3/3] intel/blorp_blit: Add option to dump surfaces on blits

On Wed, Nov 16, 2016 at 12:56 AM, Jordan Justen wrote: > Enabling this option causes the source and destination surfaces to be > dumped out to debug files. The destination is dumped both before and > after the blit operation. > > Signed-off-by: Jordan Justen

Re: [Mesa-dev] [PATCH 1/3] intel/blorp: Support map/unmap of blorp_address

On Wed, Nov 16, 2016 at 12:56 AM, Jordan Justen wrote: > Signed-off-by: Jordan Justen > --- > src/intel/blorp/blorp.h | 8 +++ > src/mesa/drivers/dri/i965/brw_blorp.c | 39 ++ > + > 2 files

Re: [Mesa-dev] [PATCH 05/13] glsl: simplifies the merge of the default in layout qualifier

On Wed, 2016-11-23 at 08:46 +1100, Timothy Arceri wrote: > On Tue, 2016-11-22 at 16:07 +0200, Andres Gomez wrote: > > On Tue, 2016-11-22 at 22:22 +1100, Timothy Arceri wrote: > > ... > > > > > > > > > Can I ask that you write a follow up patch for this series that > > > creates > > > a helper

Re: [Mesa-dev] [PATCH 2/3] intel/isl: Add support for saving surface debug info to files

On Wed, Nov 16, 2016 at 12:56 AM, Jordan Justen wrote: > Signed-off-by: Jordan Justen > --- > src/intel/Makefile.sources | 1 + > src/intel/isl/isl.h| 14 +++ > src/intel/isl/isl_dump.c | 217 ++ >

[Mesa-dev] [PATCH 2/2] i965: Add i965 plumbing for ARB_post_depth_coverage for i965 (gen9+).

This extension allows the fragment shader to control whether values in gl_SampleMaskIn[] reflect the coverage after application of the early depth and stencil tests. Signed-off-by: Plamena Manolova --- src/mesa/drivers/dri/i965/brw_compiler.h | 1 +

[Mesa-dev] [PATCH 1/2] mesa: Add GL and GLSL plumbing for ARB_post_depth_coverage for i965 (gen9+).

This extension allows the fragment shader to control whether values in gl_SampleMaskIn[] reflect the coverage after application of the early depth and stencil tests. Signed-off-by: Plamena Manolova --- src/compiler/glsl/ast.h | 5 +

Re: [Mesa-dev] [PATCH 05/13] glsl: simplifies the merge of the default in layout qualifier

On Tue, 2016-11-22 at 16:07 +0200, Andres Gomez wrote: > On Tue, 2016-11-22 at 22:22 +1100, Timothy Arceri wrote: > ... > > > > > > Can I ask that you write a follow up patch for this series that > > creates > > a helper function for each of these validations. For example: > > > > static bool >

Re: [Mesa-dev] [PATCH] i965/vec4: skip registers already marked as no_spill

On 11/11, Juan A. Suarez Romero wrote: Do not evaluate spill costs for registers that were already marked as no_spill. --- Reviewed-by: Matt Turner signature.asc Description: Digital signature ___ mesa-dev mailing list

[Mesa-dev] [PATCH] util: fix missing swizzle components in the SINT <-> UINT conversion string

Fixes tgsi error introduced in commit 3817a7a. The error complains missing swizzle component in the conversion string "UMIN TEMP[0], TEMP[0], IMM[0].x". --- src/gallium/auxiliary/util/u_simple_shaders.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [Mesa-dev] [PATCH] i965: Use 3DSTATE_CLIP's User Clip Distance Enable bitmask on Gen8+.

On 11/15, Kenneth Graunke wrote: Gen6-7.5 specify the user clip distance enable bitmask in 3DSTATE_CLIP. Gen8+ normally uses the new internal signalling mechanism to select the one specified in the last enabled shader stage (3DSTATE_VS, DS, or GS). This is a pretty good fit for Vulkan, or even

Re: [Mesa-dev] [PATCH v2] main/getteximage: Use the height argument to calculate copy size

Reviewed-by: Jason Ekstrand On Tue, Nov 22, 2016 at 10:57 AM, Eduardo Lima Mitev wrote: > In get_tex_memcpy, when copying texture data directly from source > to destination (when row strides match for both src and dst), the > copy size is currently

Re: [Mesa-dev] [PATCH v5] clover: restore support for LLVM <= 3.9

On Tue, Nov 22, 2016 at 11:25 AM, Vedran Miletić wrote: > The commit 8e430ff8b060b4e8e922bae24b3c57837da6ea77 support for LLVM > 3.9 and older versionsin Clover. This patch restores it and refactors > the support using Clover compatibility layer for LLVM. > > v2: merged

Re: [Mesa-dev] [PATCH 3/3] glsl/cache/tests: Cast cache_get result to avoid compiler warning

On 11/22, Aaron Watry wrote: disk_cache_get returns void*, but we were storing/comparing a char*. Signed-off-by: Aaron Watry --- Note that this did, and still, segfaults for me when I actually run it... Strange. It passes for me. But at least the compiler is no longer

Re: [Mesa-dev] [PATCH 1/3] compiler/glsl/tests: Fix print format when building 32-bit on 64-bit host

Patches 1 and 2 are Reviewed-by: Matt Turner signature.asc Description: Digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] main/getteximage: Take y-offset into account for memcpy size

On Nov 22, 2016 11:03, "Eduardo Lima Mitev" wrote: > > On 11/22/2016 06:43 PM, Jason Ekstrand wrote: > > On Tue, Nov 22, 2016 at 9:11 AM, Eduardo Lima Mitev > > wrote: > > > > In get_tex_memcpy, when copying texture data directly

[Mesa-dev] [PATCH 17/18] i965: Validate "Region Alignment Rules"

--- src/mesa/drivers/dri/i965/brw_eu_validate.c| 410 - src/mesa/drivers/dri/i965/test_eu_validate.cpp | 288 + 2 files changed, 697 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c

[Mesa-dev] [PATCH 16/18] i965: Validate "General Restrictions Based on Operand Types"

--- src/mesa/drivers/dri/i965/brw_eu_validate.c| 215 + src/mesa/drivers/dri/i965/test_eu_validate.cpp | 58 +++ 2 files changed, 273 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c b/src/mesa/drivers/dri/i965/brw_eu_validate.c index

[Mesa-dev] [PATCH 13/18] i965: Validate math instruction sources.

--- src/mesa/drivers/dri/i965/brw_eu_emit.c| 9 - src/mesa/drivers/dri/i965/test_eu_validate.cpp | 23 +++ 2 files changed, 23 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index

[Mesa-dev] [PATCH 07/18] i965: Add a test for the EU assembly validator.

--- src/mesa/drivers/dri/i965/Makefile.am | 7 + src/mesa/drivers/dri/i965/test_eu_validate.cpp | 169 + 2 files changed, 176 insertions(+) create mode 100644 src/mesa/drivers/dri/i965/test_eu_validate.cpp diff --git a/src/mesa/drivers/dri/i965/Makefile.am

[Mesa-dev] [PATCH 11/18] i965: Factor out send_restrictions() function.

--- src/mesa/drivers/dri/i965/brw_eu_validate.c | 34 +++-- 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c b/src/mesa/drivers/dri/i965/brw_eu_validate.c index d03ed71..8c2eb99 100644 ---

[Mesa-dev] [PATCH 15/18] i965: Validate "General Restrictions on Regioning Parameters"

--- src/mesa/drivers/dri/i965/brw_eu_validate.c| 139 src/mesa/drivers/dri/i965/test_eu_validate.cpp | 220 + 2 files changed, 359 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c b/src/mesa/drivers/dri/i965/brw_eu_validate.c

[Mesa-dev] [PATCH 14/18] i965: Replace reg_type_size[] with a function.

A function is necessary to handle immediate types. --- src/mesa/drivers/dri/i965/brw_disasm.c | 35 src/mesa/drivers/dri/i965/brw_eu_emit.c | 58 +++-- src/mesa/drivers/dri/i965/brw_reg.h | 8 + 3 files changed, 77 insertions(+), 24

[Mesa-dev] [PATCH 18/18] i965: Validate "Special Cases for Byte Operations"

Do this in general_restrictions_based_on_operand_types() because the two rules that "Special Cases for Byte Operations" relax are checked there. --- src/mesa/drivers/dri/i965/brw_eu_validate.c| 70 +--- src/mesa/drivers/dri/i965/test_eu_validate.cpp | 89

[Mesa-dev] [PATCH 12/18] i965: Claim that SEND/math has two sources.

src1 must be a descriptor (including the information to determine that the SEND is doing an extended math operation), but src0 can actually be null since it serves as the source of the implicit GRF -> MRF move. --- src/mesa/drivers/dri/i965/brw_eu_validate.c | 9 - 1 file changed, 8

[Mesa-dev] [PATCH 05/18] i965: Make ERROR_IF usable from other functions.

--- src/mesa/drivers/dri/i965/brw_eu_validate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c b/src/mesa/drivers/dri/i965/brw_eu_validate.c index fa1d67c..e23f1ec 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_validate.c +++

[Mesa-dev] [PATCH 03/18] i965/vec4: Use UW-typed operands when dest is UW.

Using a UD-typed operand makes the execution size D, and if the size of the execution type is greater than the size of the destination type, the destination must be appropriately strided. We actually just want UW-types all around. --- src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 10

[Mesa-dev] [PATCH 09/18] i965: Simplify num_sources_from_inst().

desc will always be non-NULL, because brw_validate_instructions() does not attempt to validate any instructions that fail the is_unsupported_inst() check. --- src/mesa/drivers/dri/i965/brw_eu_validate.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH 10/18] i965: Factor out sources_not_null() validation function.

--- src/mesa/drivers/dri/i965/brw_eu_validate.c | 40 + 1 file changed, 23 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c b/src/mesa/drivers/dri/i965/brw_eu_validate.c index efb1f1c..d03ed71 100644 ---

[Mesa-dev] [PATCH 08/18] i965: Structure code so unsupported inst will not generate more errors.

We want to rely on brw_opcode_desc() always returning non-NULL in other validation functions. Other validation functions will be in the else case of the block added in this patch. --- src/mesa/drivers/dri/i965/brw_eu_validate.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff

[Mesa-dev] [PATCH 04/18] i965: Mark error annotation on correct SIMD16 inst.

inst, whose assignment can be seen in the last line of context pointed to the correct instruction in the SIMD16 program, but src_offset was the offset from the beginning of the SIMD16 program. So if an instruction at offset 0x100 in the SIMD16 program was illegal, we would mark an error on the

[Mesa-dev] [PATCH 00/18] i965: More shader validation

This series adds the core "Register Region Restrictions" to the shader validator. I've added a make check test to verify that the validation checks are correct. There is still quite a bit more to do, but the next section in the PRM is "Special Requirements for Handling Double Precision Data

[Mesa-dev] [PATCH 06/18] i965: Add a CHECK macro to call more complicated validation funcs.

--- src/mesa/drivers/dri/i965/brw_eu_validate.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c b/src/mesa/drivers/dri/i965/brw_eu_validate.c index e23f1ec..3225386 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_validate.c +++

[Mesa-dev] [PATCH 02/18] i965: Use W-typed immediate in brw_F32TO16().

--- src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index cfb3fa0..3146271 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++

Re: [Mesa-dev] [PATCH 5/5] swr: color interpolation is also supposed to get perspective division

Reviewed-by: Tim Rowley > On Nov 21, 2016, at 11:52 AM, Ilia Mirkin > wrote: Signed-off-by: Ilia Mirkin > ---

Re: [Mesa-dev] [PATCH 4/5] swr: add sprite coord enable mask to fs key

Reviewed-by: Tim Rowley > On Nov 21, 2016, at 11:52 AM, Ilia Mirkin > wrote: This fixes gl-coord-replace-doesnt-eliminate-frag-tex-coords Signed-off-by: Ilia Mirkin

Re: [Mesa-dev] [PATCH 3/5] swr: rework vert <-> frag shader linkage logic

Reviewed-by: Tim Rowley > On Nov 21, 2016, at 11:52 AM, Ilia Mirkin > wrote: Fixes a few things: - sprite coords only apply to generic varyings, and are a bitmask - back color only

Re: [Mesa-dev] [PATCH 2/5] swr: flatshading makes color outputs flat, it doesn't affect others

Reviewed-by: Tim Rowley > On Nov 21, 2016, at 11:52 AM, Ilia Mirkin > wrote: We were previously not marking the "regular" flat outputs as flat when flatshading was enabled.

Re: [Mesa-dev] [PATCH 1/5] swr: only broadcast color0 value, not all color values

Reviewed-by: Tim Rowley > On Nov 21, 2016, at 11:52 AM, Ilia Mirkin > wrote: The way that dual-source blending is described for GLES2 is very odd, and we end up with a shader that

Re: [Mesa-dev] [PATCH 00/13] anv: Implement input attachments

Series Reviewed-by: Jordan Justen On 2016-11-16 11:31:32, Jason Ekstrand wrote: > This series adds input attachment support to the Intel Vulkan driver. It > applies on top of my series to implement CCS. It can be found here: > >

[Mesa-dev] [PATCH v5] clover: restore support for LLVM <= 3.9

The commit 8e430ff8b060b4e8e922bae24b3c57837da6ea77 support for LLVM 3.9 and older versionsin Clover. This patch restores it and refactors the support using Clover compatibility layer for LLVM. v2: merged #ifdef blocks v3: added support for LLVM 3.6-3.8 v4: add missing #ifdef around v5:

Re: [Mesa-dev] [PATCH] main/getteximage: Take y-offset into account for memcpy size

On 11/22/2016 06:43 PM, Jason Ekstrand wrote: > On Tue, Nov 22, 2016 at 9:11 AM, Eduardo Lima Mitev > wrote: > > In get_tex_memcpy, when copying texture data directly from source > to destination (when row strides match for both src and dst),

[Mesa-dev] [PATCH v2] main/getteximage: Use the height argument to calculate copy size

In get_tex_memcpy, when copying texture data directly from source to destination (when row strides match for both src and dst), the copy size is currently calculated using the full texture height instead of the sub-region height parameter that was passed. This can cause a read past the end of the

Re: [Mesa-dev] [PATCH 03/58] glsl: use linked_shaders bitmask to iterate stages for subroutine fields

On 20 November 2016 at 13:28, Timothy Arceri wrote: > @@ -3134,11 +3134,10 @@ check_resources(struct gl_context *ctx, struct > gl_shader_program *prog) > static void > link_calculate_subroutine_compat(struct gl_shader_program *prog) > { > - for (unsigned i =

[Mesa-dev] [PATCH 1/3] compiler/glsl/tests: Fix print format when building 32-bit on 64-bit host

Avoids three warnings. Signed-off-by: Aaron Watry --- Hope you don't mind my re-wrapping the long lines. src/compiler/glsl/tests/blob_test.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/compiler/glsl/tests/blob_test.c

[Mesa-dev] [PATCH 3/3] glsl/cache/tests: Cast cache_get result to avoid compiler warning

disk_cache_get returns void*, but we were storing/comparing a char*. Signed-off-by: Aaron Watry --- Note that this did, and still, segfaults for me when I actually run it... But at least the compiler is no longer complaining about the type mismatch.

[Mesa-dev] [PATCH 2/3] compiler/glsl/tests: Fix print format when building 32-bit on 64-bit host

Avoids two warnings. Signed-off-by: Aaron Watry --- src/compiler/glsl/tests/cache_test.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/compiler/glsl/tests/cache_test.c b/src/compiler/glsl/tests/cache_test.c index ca22605..0ef05aa 100644 ---

Re: [Mesa-dev] [PATCH 4/3] i965/hiz: Add debug dump for depth/hiz buffers around hiz ops

Acked-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] main/getteximage: Take y-offset into account for memcpy size

On Tue, Nov 22, 2016 at 9:11 AM, Eduardo Lima Mitev wrote: > In get_tex_memcpy, when copying texture data directly from source > to destination (when row strides match for both src and dst), the > block size is currently calculated as 'bytes-per-row * image-height', > ignoring

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