From: Christian Gmeiner
Based on the same model as the IMX driver, opens a Nouveau render device
in order to transparently provide acceleration on Tegra.
Signed-off-by: Christian Gmeiner
[acour...@nvidia.com: port to latest branch,
Pushed, thanks.
On Wed, Jan 11, 2017 at 2:31 AM, Grazvydas Ignotas wrote:
> These seem unlikely to be used.
> Also remove irrelevant comment about SKL.
>
> v2: forgot to rebase on master
>
> Signed-off-by: Grazvydas Ignotas
> ---
> no commit access
>
>
On Thu, 2017-01-12 at 15:39 -0800, Matt Turner wrote:
> On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez
> wrote:
> > We need to split DF instructions in two on IVB/VLV as it needs an
> > execsize 8 to process 4 DF values (one GRF in total).
> >
> > Signed-off-by:
2017-01-13 5:06 GMT+01:00 Rhys Kidd :
> Signed-off-by: Rhys Kidd
> ---
> .travis.yml | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/.travis.yml b/.travis.yml
> index 3d107aa..dfbc052 100644
> --- a/.travis.yml
> +++
On Thu, 2017-01-12 at 15:14 -0800, Matt Turner wrote:
> On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez
> wrote:
> > From: "Juan A. Suarez Romero"
> >
> > The execution data size is the biggest type size of any instruction
> > operand.
> >
>
On 13/01/17 06:45, Lionel Landwerlin wrote:
On 13/01/17 01:08, Jason Ekstrand wrote:
This lets us delete a helper from genX_pipeline.c
---
src/intel/vulkan/anv_pipeline.c | 2 +-
src/intel/vulkan/anv_private.h | 10 +-
src/intel/vulkan/genX_pipeline.c | 20
On 13/01/17 01:08, Jason Ekstrand wrote:
This lets us delete a helper from genX_pipeline.c
---
src/intel/vulkan/anv_pipeline.c | 2 +-
src/intel/vulkan/anv_private.h | 10 +-
src/intel/vulkan/genX_pipeline.c | 20
3 files changed, 10 insertions(+), 22
On 13.01.2017 07:40, Emil Velikov wrote:
> On 12 January 2017 at 10:29, Timo Aaltonen wrote:
>> On 11.01.2017 15:01, Emil Velikov wrote:
>>> On 6 December 2016 at 14:55, Marek Olšák wrote:
Hi,
I'd like to announce that this release doesn't
https://bugs.freedesktop.org/show_bug.cgi?id=97067
--- Comment #4 from Tapani Pälli ---
This test is passing on i965 with following versions:
Google Chrome 55.0.2883.87
Mesa 17.0.0-devel (git-0252ba2)
--
You are receiving this mail because:
You are the assignee for the bug.
Address loading can often end up as shl + shr + shl combinations. The
latter two are equal shifts, which get converted into an and mask.
However if the previous shl is more than the mask is trying to remove
(in terms of low bits), we can just remove the and entirely. This
reduces some large
On 12 January 2017 at 10:29, Timo Aaltonen wrote:
> On 11.01.2017 15:01, Emil Velikov wrote:
>> On 6 December 2016 at 14:55, Marek Olšák wrote:
>>> Hi,
>>>
>>> I'd like to announce that this release doesn't fix the worst GPU
>>> hangs/freezes it has. I'm
On Thu, Jan 12, 2017 at 06:26:44PM -0800, Jason Ekstrand wrote:
> Good work! Series is
>
> Reviewed-by: Jason Ekstrand
>
Thanks!
-Nanley
> On Thu, Jan 12, 2017 at 5:34 PM, Nanley Chery wrote:
>
> > v2: Simplify nested ifs (Jason Ekstrand)
> >
>
https://bugs.freedesktop.org/show_bug.cgi?id=98604
--- Comment #12 from Dieter Nützel ---
(In reply to Michel Dänzer from comment #11)
> Can you get a backtrace of a crash with gdb?
Hello Michel,
no backtrace of a crash, but I could attach gdb on running konqueror
On Thu, Jan 12, 2017 at 06:17:58PM -0800, Jason Ekstrand wrote:
> On Thu, Jan 12, 2017 at 5:33 PM, Nanley Chery wrote:
>
> > The helper doesn't provide additional functionality over the current
> > infrastructure.
> >
> > v2: Add comment to anv_image::aux_usage (Jason
Signed-off-by: Rhys Kidd
---
.travis.yml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index 3d107aa..dfbc052 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -32,7 +32,7 @@ env:
- DRI3PROTO_VERSION=dri3proto-1.0
-
On Fri, Jan 13, 2017 at 1:18 AM, Emil Velikov wrote:
> [Adding Tomasz]
>
> On 12 January 2017 at 07:14, Liu Zhiquan wrote:
>> When add config, dri_config is double or single. Should only add
>> EGL_WINDOW_BIT to surface_type for double dri_config,
On Thu, Jan 12, 2017 at 9:13 PM, Jason Ekstrand wrote:
> Unless, of course, it's controlled by the same hardware bit... Clearly, we
> can can give you abs on rsq without denorm flushing (easy shader hacks) but
> not the other way around.
OK, so somehow I missed that
Good work! Series is
Reviewed-by: Jason Ekstrand
On Thu, Jan 12, 2017 at 5:34 PM, Nanley Chery wrote:
> v2: Simplify nested ifs (Jason Ekstrand)
>
> Signed-off-by: Nanley Chery
> ---
> src/intel/vulkan/genX_cmd_buffer.c
On Thu, Jan 12, 2017 at 5:33 PM, Nanley Chery wrote:
> The helper doesn't provide additional functionality over the current
> infrastructure.
>
> v2: Add comment to anv_image::aux_usage (Jason Ekstrand)
>
> Signed-off-by: Nanley Chery
> ---
>
On Jan 12, 2017 4:56 PM, "Ilia Mirkin" wrote:
On Thu, Jan 12, 2017 at 7:46 PM, Matt Turner wrote:
> On Thu, Jan 12, 2017 at 3:20 PM, Ilia Mirkin wrote:
>> On Thu, Jan 12, 2017 at 6:04 PM, Nicolai Hähnle
wrote:
Thanks for noticing this. I actually had a patch to handle this that must have
gotten lost in my rebasing efforts. I'll send it in the v2.
My email isn't working properly, so sorry for any formatting errors.
From: Jason Ekstrand [ja...@jlekstrand.net]
Sent:
Users/tests relying on the total reset count will start seeing a smaller
number since most of the hangs can be handled by engine reset.
Note that if reset engine x, context a running on engine y will be unaware
and unaffected.
To start the discussion, include just a total engine reset count. If
v2: Simplify nested ifs (Jason Ekstrand)
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 67 --
1 file changed, 49 insertions(+), 18 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_private.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index b669d186ef..56aa6ef6e3 100644
--- a/src/intel/vulkan/anv_private.h
+++
Avoid the resolves that would be required if fast depth clears were
allowed for such buffers.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/intel/vulkan/anv_blorp.c
v2: Remove redundant x/y offset asserts (Jason Ekstrand)
Signed-off-by: Nanley Chery
---
src/intel/isl/isl_surface_state.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/src/intel/isl/isl_surface_state.c
v2: Restrict ISL_AUX_USAGE_HIZ to depth aspects
Signed-off-by: Nanley Chery
---
src/intel/vulkan/TODO| 1 -
src/intel/vulkan/anv_image.c | 20 +---
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/src/intel/vulkan/TODO
We'll be using layout transitions later on in the series which can occur
within and between subpasses. Turn this on now to simplify the change
later.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/TODO | 2 +-
src/intel/vulkan/gen8_cmd_buffer.c | 11
v2 (Jason Ekstrand):
- Add spec citation
- Drop conditional
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_image.c | 23 +++
src/intel/vulkan/genX_cmd_buffer.c | 17 +
2 files changed, 24 insertions(+), 16 deletions(-)
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 27 ---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 63f6be12a8..74369f6ba1
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 50 ++
1 file changed, 50 insertions(+)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 74369f6ba1..fff9bd37c0 100644
This is a better mapping to the Vulkan API and improves performance in
all tested workloads.
v2: Remove unnecessary image view aspect checks (Jason Ekstrand)
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 48 ++--
Store the current and requested depth stencil layouts so that we can
perform the appropriate HiZ resolves for a given transition while
recording a render pass.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_pass.c| 5 +
src/intel/vulkan/anv_private.h
Add an entry point for resolving using BLORP's gen8 HiZ op function.
v2: Manually add the aux info
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 83 ++
src/intel/vulkan/anv_private.h | 5 +++
2 files changed,
This is no longer used.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_genX.h| 3 -
src/intel/vulkan/gen7_cmd_buffer.c | 7 --
src/intel/vulkan/gen8_cmd_buffer.c | 223 -
3 files changed, 233 deletions(-)
diff
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_pass.c| 3 +++
src/intel/vulkan/anv_private.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/src/intel/vulkan/anv_pass.c b/src/intel/vulkan/anv_pass.c
index ea86fa9ff2..5df6330c6a 100644
---
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 9 +++--
src/intel/vulkan/anv_private.h | 15 +++
src/intel/vulkan/genX_cmd_buffer.c | 5 +
3 files changed, 23 insertions(+), 6 deletions(-)
diff --git
We're about to enable HiZ support for multiple subpasses. Use this field
to keep track of whether or not subpass operations should treat the
depth buffer as having an auxiliary HiZ buffer.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 6 --
1
We'll be switching to layout-transition based resolves which can occur
outside of a render pass. Add this sequence to BLORP, as using BLORP
will enable emitting depth stencil state outside of a render pass (among
other benefits). The depth buffer extent is ignored to enable eventual
usage in
Prevent assert failures that would occur in the next patch.
v2: Don't remove asserts from blorp/blit (Jason Ekstrand)
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
The helper doesn't provide additional functionality over the current
infrastructure.
v2: Add comment to anv_image::aux_usage (Jason Ekstrand)
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 2 +-
src/intel/vulkan/anv_image.c | 10 --
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 54 +++---
src/intel/vulkan/genX_cmd_buffer.c | 1 -
2 files changed, 50 insertions(+), 5 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c
Add an entry point for the optimized gen8 BLORP HiZ sequence. commit
c9eaf12de20ac4143fe79d42018bdbb5a391356f fixed a bug that was
unknowingly worked around by forcing additional clear rectangle
alignment restrictions not specified in the PRMs. Now that the bug is no
longer present, omit the
On Thu, Jan 12, 2017 at 4:56 PM, Ilia Mirkin wrote:
> On Thu, Jan 12, 2017 at 7:46 PM, Matt Turner wrote:
>> On Thu, Jan 12, 2017 at 3:20 PM, Ilia Mirkin wrote:
>>> On Thu, Jan 12, 2017 at 6:04 PM, Nicolai Hähnle
This lets us delete a helper from genX_pipeline.c
---
src/intel/vulkan/anv_pipeline.c | 2 +-
src/intel/vulkan/anv_private.h | 10 +-
src/intel/vulkan/genX_pipeline.c | 20
3 files changed, 10 insertions(+), 22 deletions(-)
diff --git
On Thu, Jan 12, 2017 at 7:46 PM, Matt Turner wrote:
> On Thu, Jan 12, 2017 at 3:20 PM, Ilia Mirkin wrote:
>> On Thu, Jan 12, 2017 at 6:04 PM, Nicolai Hähnle wrote:
>>> On 12.01.2017 23:46, Ilia Mirkin wrote:
On Thu, Jan 12,
Samuel Iglesias Gonsálvez writes:
> From: "Juan A. Suarez Romero"
>
> Previous to Broadwell, we have 8 registers for MOV_INDIRECT. But if
> IVB/VLV deal with DFs, we will duplicate the exec_size from 8 to 16.
>
> This patch limits the SIMD width to 4
On Thu, Jan 12, 2017 at 3:20 PM, Ilia Mirkin wrote:
> On Thu, Jan 12, 2017 at 6:04 PM, Nicolai Hähnle wrote:
>> On 12.01.2017 23:46, Ilia Mirkin wrote:
>>>
>>> On Thu, Jan 12, 2017 at 4:03 PM, Matteo Bruni
>>> wrote:
https://bugs.freedesktop.org/show_bug.cgi?id=94512
Matt Turner changed:
What|Removed |Added
Status|NEW |RESOLVED
On Fri, Jan 13, 2017 at 12:43 AM, Nicolai Hähnle wrote:
> On 13.01.2017 00:20, Ilia Mirkin wrote:
>>
>> On Thu, Jan 12, 2017 at 6:04 PM, Nicolai Hähnle
>> wrote:
>>>
>>> On 12.01.2017 23:46, Ilia Mirkin wrote:
On Thu, Jan 12, 2017 at 4:03
On 13.01.2017 00:47, Grazvydas Ignotas wrote:
As the branchpoint is near, can someone push it, please?
Done, thanks! (This time for real ;-))
Gražvydas
On Sun, Jan 8, 2017 at 11:22 PM, Matt Turner wrote:
On Sun, Jan 8, 2017 at 9:38 AM, Grazvydas Ignotas
On 13.01.2017 00:49, Grazvydas Ignotas wrote:
On Thu, Jan 12, 2017 at 12:26 PM, Nicolai Hähnle wrote:
On 12.01.2017 00:58, Grazvydas Ignotas wrote:
b838f642 "ac/debug: Move sid_tables.h generation to common code." moved
sid_tables.h but forgot the corresponding
On Wed, Jan 11, 2017 at 5:55 PM, Nanley Chery wrote:
> Signed-off-by: Nanley Chery
> ---
> src/intel/vulkan/genX_cmd_buffer.c | 54 +-
>
> 1 file changed, 41 insertions(+), 13 deletions(-)
>
> diff --git
On Thu, Jan 12, 2017 at 12:26 PM, Nicolai Hähnle wrote:
> On 12.01.2017 00:58, Grazvydas Ignotas wrote:
>>
>> b838f642 "ac/debug: Move sid_tables.h generation to common code." moved
>> sid_tables.h but forgot the corresponding .gitignore.
>>
>> Signed-off-by: Grazvydas Ignotas
As the branchpoint is near, can someone push it, please?
Gražvydas
On Sun, Jan 8, 2017 at 11:22 PM, Matt Turner wrote:
> On Sun, Jan 8, 2017 at 9:38 AM, Grazvydas Ignotas wrote:
>> Fixes crashes when both glx-tls and asm are enabled on x32.
>>
>> Cc:
On 13.01.2017 00:20, Ilia Mirkin wrote:
On Thu, Jan 12, 2017 at 6:04 PM, Nicolai Hähnle wrote:
On 12.01.2017 23:46, Ilia Mirkin wrote:
On Thu, Jan 12, 2017 at 4:03 PM, Matteo Bruni
wrote:
So, what would be really nice to have is a GLSL
On 12.01.2017 21:42, Marek Olšák wrote:
I commented on patches 1 & 2. Other than that, patches 1-6 are:
Reviewed-by: Marek Olšák
Thanks. I'm especially curious in hindsight how the 1.5 got dropped
again. Anyway, I used git rebase -x to double-check that each step
On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez
wrote:
> We need to split DF instructions in two on IVB/VLV as it needs an
> execsize 8 to process 4 DF values (one GRF in total).
>
> Signed-off-by: Samuel Iglesias Gonsálvez
> ---
>
On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez
wrote:
> From: "Juan A. Suarez Romero"
>
s/MOVE_INDIRECT/MOV_INDIRECT/ in the subject
> Previous to Broadwell, we have 8 registers for MOV_INDIRECT. But if
> IVB/VLV deal with DFs, we will
On Thu, Jan 12, 2017 at 6:04 PM, Nicolai Hähnle wrote:
> On 12.01.2017 23:46, Ilia Mirkin wrote:
>>
>> On Thu, Jan 12, 2017 at 4:03 PM, Matteo Bruni
>> wrote:
>>>
>>> So, what would be really nice to have is a GLSL extension for some
>>> kind of
On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez
wrote:
> From: "Juan A. Suarez Romero"
>
> When converting a DF to F, we set dst stride to 2, to fulfil alignment
> restrictions.
>
> But in IVB/VLV, this is not necessary, as each DF conversion
I made a quick comment below. With that, this patch is
Reviewed-by: Jason Ekstrand
Assuming you pulled 1 and 2 from master of the public github repo for
Khronos, they are
Acked-by: Jason Ekstrand
On Thu, Jan 12, 2017 at 1:43 PM, Lionel Landwerlin
On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez
wrote:
> From: "Juan A. Suarez Romero"
>
> The execution data size is the biggest type size of any instruction
> operand.
>
> We will use it to know if the instruction deals with DF, because in
On 12.01.2017 23:46, Ilia Mirkin wrote:
On Thu, Jan 12, 2017 at 4:03 PM, Matteo Bruni wrote:
So, what would be really nice to have is a GLSL extension for some
kind of switch to select the requested behavior WRT NaN. For example a
three-way option with "don't generate
https://bugs.freedesktop.org/show_bug.cgi?id=97067
--- Comment #3 from Luke ---
Tests still failing on 13.0 with Arch
$ uname -a
Linux arch 4.8.13-1-ARCH #1 SMP PREEMPT Fri Dec 9 07:24:34 CET 2016 x86_64
GNU/Linux
$ glxinfo |grep -i opengl
OpenGL vendor string: nouveau
2017-01-12 23:41 GMT+01:00 Axel Davy :
>> Do you refer to the d3d9 MAD or the hardware instruction? If the
>> former, just generating MUL and ADD separately should do the trick. In
>> the latter case, I guess that means the "NaN switch" should also
>> affect code generation
On Thu, Jan 12, 2017 at 4:03 PM, Matteo Bruni wrote:
> So, what would be really nice to have is a GLSL extension for some
> kind of switch to select the requested behavior WRT NaN. For example a
> three-way option with "don't generate NaN in arithmetic operations",
> "do
On 17-01-12 14:22:09, Jason Ekstrand wrote:
On Thu, Jan 12, 2017 at 10:57 AM, Daniel Stone wrote:
Hi,
On 5 January 2017 at 04:43, Ben Widawsky wrote:
> diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_
dri.c
> index
On 12/01/2017 23:09, Matteo Bruni wrote:
2017-01-12 22:54 GMT+01:00 Axel Davy :
Preventing NaN from being generated is not sufficient to fix the 0*inf = 0
issue.
For example radeonsi does convert all NaN to zeros via a hardware setting.
But 0*inf = 0 behaviour should be also
On Fri, 2017-01-13 at 08:49 +1100, Timothy Arceri wrote:
> Actually I might just try moving this to the late block as the reason
> for 'is_not_used_by_conditional' is to stop getting in the way of
> ffmas.
Ignore this that just results in the opts doing nothing. The whole
point is to avoid ffmas
Some callers would need that info to know if they should raise
INVALID_ENUM or INVALID_OPERATION. An alternative would be the caller
to check if the attachment is a GL_COLOR_ATTACHMENTm, but that seems
redundant as get_attachment is already doing that.
---
src/mesa/main/fbobject.c | 30
In most cases, if a call to get_attachment fails is because attachment
is a INVALID_ENUM. But for some specific cases, if COLOR_ATTACHMENTm
(where m >= MAX_COLOR_ATTACHMENTS) is used, it should raise an
INVALID_OPERATION exception instead.
Fixes:
On Thu, Jan 12, 2017 at 10:57 AM, Daniel Stone wrote:
> Hi,
>
> On 5 January 2017 at 04:43, Ben Widawsky wrote:
> > diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_
> dri.c
> > index c61d56b44a..f9c1afd8cb 100644
> > ---
On 2017-01-05 02:51:38, Kenneth Graunke wrote:
> According to the "Gather4 R32G32_FLOAT Bug" internal documentation
> page, the R32G32_UINT and R32G32_SINT formats are affected by the
> same bug as R32G32_FLOAT. Applying the same workarounds should be
> viable - apparently the R32G32_FLOAT_LD
On Thu, Jan 12, 2017 at 12:38 PM, Matt Turner wrote:
> On Thu, Dec 1, 2016 at 1:51 PM, Jason Ekstrand
> wrote:
> > This fixes a bug in code motion that occurred when the best block is the
> > same as the schedule early block. In this case, because
2017-01-12 22:54 GMT+01:00 Axel Davy :
>
> Preventing NaN from being generated is not sufficient to fix the 0*inf = 0
> issue.
>
> For example radeonsi does convert all NaN to zeros via a hardware setting.
>
> But 0*inf = 0 behaviour should be also in mad, and with the NaN to
2017-01-12 22:25 GMT+01:00 Roland Scheidegger :
> Is there actually a formal requirement that d3d9 hw never generates
> NaNs? I think d3d9 is very lacking in spec there - if that is specified
> somewhere I've never seen it... Maybe just everybody is expecting no
> NaNs there
On 17-01-12 14:44:33, Daniel Stone wrote:
Hi Ben,
On 3 January 2017 at 02:36, Ben Widawsky wrote:
Same as v1 with the requested fixes and tags added. v1 is here:
https://lists.freedesktop.org/archives/intel-gfx/2016-December/113639.html
I haven't yet updated kmscube to use
On 12/01/2017 22:03, Matteo Bruni wrote:
2017-01-11 19:09 GMT+01:00 Jason Ekstrand :
Another reason why I'm not a huge fan is that there is some momentum in the
industry to make GLSL better defined with respect to NaN. I don't know that
anything will ever come of it
Actually I might just try moving this to the late block as the reason
for 'is_not_used_by_conditional' is to stop getting in the way of
ffmas.
On Fri, 2017-01-13 at 08:29 +1100, Timothy Arceri wrote:
> Didn't turn out as useful as I'd hoped, but it will help alot more on
> i965 by reducing
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/Makefile.am| 15 ++--
src/intel/vulkan/anv_entrypoints_gen.py | 125 +---
2 files changed, 71 insertions(+), 69 deletions(-)
diff --git a/src/intel/vulkan/Makefile.am
Signed-off-by: Lionel Landwerlin
---
src/amd/vulkan/Makefile.am | 14 ++---
src/amd/vulkan/radv_entrypoints_gen.py | 105 -
2 files changed, 56 insertions(+), 63 deletions(-)
diff --git a/src/amd/vulkan/Makefile.am
Signed-off-by: Lionel Landwerlin
---
include/vulkan/vk_platform.h | 2 +-
include/vulkan/vulkan.h | 247 ++-
2 files changed, 244 insertions(+), 5 deletions(-)
diff --git a/include/vulkan/vk_platform.h
Hi,
We're currently generating a few vulkan entry point files by parsing
the API files using regular expressions. This is limited for a couple
of reasons :
- function pointer types might not always be declared on a single
line
- if function pointers are declared under conditional
Didn't turn out as useful as I'd hoped, but it will help alot more on
i965 by reducing regressions when we drop brw_do_channel_expressions()
and brw_do_vector_splitting().
I'm not sure how much sense 'is_not_used_by_conditional' makes on
platforms other than i965 but since this is a new opt it at
Am 12.01.2017 um 22:03 schrieb Matteo Bruni:
> 2017-01-11 19:09 GMT+01:00 Jason Ekstrand :
>> Another reason why I'm not a huge fan is that there is some momentum in the
>> industry to make GLSL better defined with respect to NaN. I don't know that
>> anything will ever come
https://bugs.freedesktop.org/show_bug.cgi?id=97102
--- Comment #11 from Bruce Cherniak ---
As Tim suggests, pruning empty nodes is probably the best solution for the
crash.
For performance, however, I'm not sure how many cores to expose in your case.
cpuinfo shows
On 17-01-09 17:03:48, Jason Ekstrand wrote:
On Mon, Jan 2, 2017 at 6:37 PM, Ben Widawsky wrote:
The idea behind modifiers like this is that the user of GBM will have
some mechanism to query what properties the hardware supports for its BO
or surface. This information is
2017-01-11 19:09 GMT+01:00 Jason Ekstrand :
> Another reason why I'm not a huge fan is that there is some momentum in the
> industry to make GLSL better defined with respect to NaN. I don't know that
> anything will ever come of it (because it may break apps) but if
V2: Don't rzalloc; we are about to rewrite the whole thing (Vladislav)
---
src/util/hash_table.c | 22 ++
src/util/hash_table.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/src/util/hash_table.c b/src/util/hash_table.c
index 9e643af8b2..603f694ccb 100644
---
Walking the whole hash table, inserting entries by hashing them first
is just a really really bad idea. We can simply memcpy the whole thing.
---
src/compiler/glsl/opt_copy_propagation.cpp | 17 -
.../glsl/opt_copy_propagation_elements.cpp | 29 --
I commented on patches 1 & 2. Other than that, patches 1-6 are:
Reviewed-by: Marek Olšák
Marek
On Thu, Jan 12, 2017 at 4:39 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Reviewed-by: Bas Nieuwenhuizen
On Thu, Jan 12, 2017 at 4:39 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> As remarked by the comment in the original code, the old algorithm fails when
> (tc + deriv) points at a different cube face. Instead, simply project the
> derivative
On Thu, Dec 1, 2016 at 1:51 PM, Jason Ekstrand wrote:
> This fixes a bug in code motion that occurred when the best block is the
> same as the schedule early block. In this case, because we're checking
> (lca != def->parent_instr->block) at the top of the loop, we never get
For the series:
Reviewed-by: Marek Olšák
Marek
On Thu, Jan 12, 2017 at 2:07 PM, Samuel Pitoiset
wrote:
> We no longer need to use lp_build_tgsi_soa_context.
>
> No regressions founds with full piglit run.
>
> Signed-off-by: Samuel Pitoiset
On Thu, Jan 12, 2017 at 4:39 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Reviewed-by: Bas Nieuwenhuizen
> ---
> src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 74
> +--
> 1 file changed,
12.01.2017 22:23, Thomas Helland пишет:
---
src/util/hash_table.c | 22 ++
src/util/hash_table.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/src/util/hash_table.c b/src/util/hash_table.c
index 9e643af8b2..702f465382 100644
--- a/src/util/hash_table.c
+++
On 17-01-12 14:33:01, Daniel Stone wrote:
On 12 January 2017 at 14:32, Daniel Stone wrote:
If allocated, this image is just leaked, along with its reference on
the BO. Same problem in gbm_dri_bo_get_handle_for_plane.
... and gbm_dri_bo_get_offset.
Cheers,
Daniel
Does
https://bugs.freedesktop.org/show_bug.cgi?id=99388
Bug ID: 99388
Summary: RHEL 7.3, Matlab 2016a Segmentation fault - glEnable
Product: Mesa
Version: 11.2
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Hi,
On 5 January 2017 at 04:43, Ben Widawsky wrote:
> diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
> index c61d56b44a..f9c1afd8cb 100644
> --- a/src/gbm/backends/dri/gbm_dri.c
> +++ b/src/gbm/backends/dri/gbm_dri.c
> @@ -622,6 +622,33 @@
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