Re: [Mesa-dev] [PATCH 05/27] i965: Replace open coded with intel_miptree_get_image_offset()

On Mon, Jan 16, 2017 at 09:13:59AM -0800, Jason Ekstrand wrote: >On Mon, Jan 16, 2017 at 1:13 AM, Topi Pohjolainen ><[1]topi.pohjolai...@gmail.com> wrote: > > Signed-off-by: Topi Pohjolainen <[2]topi.pohjolai...@intel.com> > --- >

Re: [Mesa-dev] [PATCH 4/7] i965: Make brw_cache_item structure private to brw_program_cache.c.

On 01/17/2017 08:14 AM, Kenneth Graunke wrote: > struct brw_cache_item is an implementation detail of the program cache. > We don't need to make those internals available to the entire driver. > > Signed-off-by: Kenneth Graunke > --- >

Re: [Mesa-dev] [PATCH 2/7] i965: Move program cache printing to brw_program_cache.c.

If there is no plan to use brw_print_program_cache elsewhere, I would rather keep it a static method where it is used. In general, I prefer not polluting header files. Not a big deal anyway; feel free to ignore the comment. Reviewed-by: Eduardo Lima Mitev On 01/17/2017 08:14

Re: [Mesa-dev] [PATCH 1/7] i965: Make a helper for finding an existing shader variant.

Nice one :) Reviewed-by: Eduardo Lima Mitev On 01/17/2017 08:14 AM, Kenneth Graunke wrote: > We had five copies of the same "walk the cache and look for an > existing shader variant for this program" code. Now we have one > helper function that returns the key. > >

Re: [Mesa-dev] [PATCH] radv: add support for layered clears (v2)

Reviewed-by: Bas Nieuwenhuizen On Tue, Jan 17, 2017 at 1:07 AM, Dave Airlie wrote: > From: Dave Airlie > > Just always use the layer clear pipelines, > the overhead of emitting the layer shouldn't be > too large. > > v2: Bas

[Mesa-dev] [PATCH 4/7] i965: Make brw_cache_item structure private to brw_program_cache.c.

struct brw_cache_item is an implementation detail of the program cache. We don't need to make those internals available to the entire driver. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.h | 19 ---

[Mesa-dev] [PATCH 2/7] i965: Move program cache printing to brw_program_cache.c.

It makes sense to put a function which prints out the entire contents of the program cache in the file that implements the program cache. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_program_cache.c | 46 +

[Mesa-dev] [PATCH 7/7] i965: Use persistent CPU mappings for the program cache even on non-LLC.

The non-LLC story was a horror show. We uploaded data via pwrite (drm_intel_bo_subdata), which would stall if the cache BO was in use (being read) by the GPU. Obviously, we wanted to avoid that. So, we tried to detect whether the buffer was busy, and if so, we'd allocate a new BO, map the old

[Mesa-dev] [PATCH 1/7] i965: Make a helper for finding an existing shader variant.

We had five copies of the same "walk the cache and look for an existing shader variant for this program" code. Now we have one helper function that returns the key. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_gs.c| 22

[Mesa-dev] [PATCH 6/7] i965: Copy anv_clflush_range helper to brw_context.h.

I want to do explicit clflushes in the GL driver as well. Jason and I figured this was small enough that we may as well just copy and paste it for now, as we don't have a decent common location for both drivers. Irritatingly, because we include brw_context.h in C++ code, we have to use char *

[Mesa-dev] [PATCH 3/7] i965: Don't map/unmap in brw_print_program_cache on LLC platforms.

We have a persistent mapping. Don't map it a second time or try to unmap it. Just use the pointer. This most likely would wreak havoc except that this code is unused (it's only called from an if (0) debug block). Signed-off-by: Kenneth Graunke ---

[Mesa-dev] [PATCH 5/7] i965: Use a CPU mapping for the program cache BO on LLC platforms.

In 2014 (commit 02ca66fbc3e2b272), I changed the program cache code to use a persistent mapping for the cache BO. For some reason, I used drm_intel_gem_bo_unsynchronized. This is rather pointless - we're mapping a freshly allocated, idle BO, so a regular mapping won't stall. I have no idea why

[Mesa-dev] [PATCH] nir: evaluate if condition uses inside the if branches

All helped shaders are fromm Unreal Engine 4 besides one shader from Dirt Showdown. shader-db results BDW: total instructions in shared programs: 12985186 -> 12985112 (-0.00%) instructions in affected programs: 26523 -> 26449 (-0.28%) helped: 43 HURT: 0 total cycles in shared programs:

[Mesa-dev] [Bug 93760] radeonsi vaapi mpeg2 decode slightly corrupt or asserts.

https://bugs.freedesktop.org/show_bug.cgi?id=93760 Nayan Deshmukh changed: What|Removed |Added Assignee|dri-devel@lists.freedesktop

Re: [Mesa-dev] [PATCH] gallium: add Tegra renderonly support

On 01/13/2017 11:20 PM, Grazvydas Ignotas wrote: > just out of the interest, can this be used on Tegra X1 right now? > If so, what would I need to get it to work (kernel, firmware, something else)? > I'd be interested to run mesa on the Shield TV. I recommend using my Mesa branch

[Mesa-dev] [Bug 99116] Wine program showing only a blackscreen when using mesa

https://bugs.freedesktop.org/show_bug.cgi?id=99116 Boyan Ding changed: What|Removed |Added CC||stu_...@126.com ---

[Mesa-dev] [PATCH v2 1/5] gallium: add TGSI_PROPERTY_MUL_ZERO_WINS

This will be useful for proper D3D9 emulation, where this behavior is expected by some shaders. Signed-off-by: Ilia Mirkin --- Expanded on the description for the property to include all MUL-dependent operations as well. src/gallium/auxiliary/tgsi/tgsi_strings.c | 3

[Mesa-dev] [PATCH v2 4/5] nvc0: add support for MUL_ZERO_WINS property

This sets the dnz flag on all the relevant multiplication operations. At emission time, this will only be supported by nvc0+, so nv50 will need a different solution. Signed-off-by: Ilia Mirkin --- .../drivers/nouveau/codegen/nv50_ir_driver.h | 1 +

[Mesa-dev] [PATCH v2 5/5] nv50: add support for MUL_ZERO_WINS property

This is simply keyed off the vertex shader, as that's guaranteed to be present in any pipeline. Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/nv50/nv50_program.c | 2 +- src/gallium/drivers/nouveau/nv50/nv50_program.h | 2 ++

[Mesa-dev] [PATCH v2 2/5] gallium: add PIPE_CAP_TGSI_MUL_ZERO_WINS

Signed-off-by: Ilia Mirkin --- src/gallium/docs/source/screen.rst | 2 ++ src/gallium/drivers/freedreno/freedreno_screen.c | 1 + src/gallium/drivers/i915/i915_screen.c | 1 + src/gallium/drivers/ilo/ilo_screen.c | 1 +

[Mesa-dev] [PATCH v2 3/5] st/nine: set the MUL_ZERO_WINS flag when supported

Signed-off-by: Ilia Mirkin --- v1 -> v2: make conditional on the cap being there src/gallium/state_trackers/nine/nine_shader.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/state_trackers/nine/nine_shader.c

[Mesa-dev] [PATCH] EGL/Android: Add EGL_EXT_buffer_age extension

--- src/egl/drivers/dri2/egl_dri2.h | 9 ++ src/egl/drivers/dri2/platform_android.c | 51 - 2 files changed, 59 insertions(+), 1 deletion(-) diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h index f3d09dc..992e5b3 100644

[Mesa-dev] [PATCH] nir/dominance: Better handle unreachable blocks

--- src/compiler/nir/nir.h | 9 - src/compiler/nir/nir_dominance.c | 37 ++--- 2 files changed, 38 insertions(+), 8 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 8bbc41d..f1f3d30 100644 ---

[Mesa-dev] [rfc] evergreen/cayman ARB_shader_image_load_store support

Hi everybody. Is there any update about these patches review? [1] Thanks Paulo Sérgio Travaglia (pstglia) [1] - https://lists.freedesktop.org/archives/mesa-dev/2016-March/111292.html ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

[Mesa-dev] [PATCH] radv: add support for layered clears (v2)

From: Dave Airlie Just always use the layer clear pipelines, the overhead of emitting the layer shouldn't be too large. v2: Bas suggested we always use it. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_meta_clear.c | 28

[Mesa-dev] [PATCH 3/3] gallivm: Reenable PPC VSX (v2)

Reenable the PPC64LE Vector-Scalar Extension for LLVM versions >= 3.8.1, now that LLVM bug 26775 and its corollary, 25503, are fixed. Amendment: remove extraneous spaces in macro def & invocations. Signed-off-by: Ben Crocker ---

[Mesa-dev] [PATCH 2/3] gallivm: Override getHostCPUName() "generic" w/ "pwr8" (v2)

If llvm::sys::getHostCPUName() returns "generic", override it with "pwr8" (on PPC64LE). This is a work-around for a bug in LLVM: a table entry for "POWER8NVL" is missing, resulting in (big-endian) "generic" being returned on little-endian Power8NVL systems. The result is that code that attempts

Re: [Mesa-dev] [PATCH 5/8] android: add Android.mk for llvmpipe

>> --- a/src/gallium/Android.mk >> +++ b/src/gallium/Android.mk >> @@ -34,7 +34,9 @@ SUBDIRS += auxiliary/pipe-loader >> # >> >> # swrast >> -ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),) >> +ifneq ($(filter llvmpipe,$(MESA_GPU_DRIVERS)),) >> +SUBDIRS += winsys/sw/dri drivers/llvmpipe

Re: [Mesa-dev] [PATCH] radv: add support for layered clears

Looks correct to me, but why don't we always use the layered clear? I'd think the extra VS output doesn't really matter given the low amount of geometry during clearing, and that would save some shader variants, which we have a lot of already. - Bas On Mon, Jan 16, 2017 at 11:58 PM, Dave Airlie

[Mesa-dev] [PATCH] radv: add support for layered clears

From: Dave Airlie This uses vertex layer from instance id to clear the layers. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_meta_clear.c | 150 --- src/amd/vulkan/radv_private.h| 12 ++-- 2 files changed,

Re: [Mesa-dev] [PATCH 1/2] radv/ac: switch an if to switch

Reviewed-by: Bas Nieuwenhuizen for both. On Mon, Jan 16, 2017 at 11:47 PM, Dave Airlie wrote: > From: Dave Airlie > > makes it easier to add other shader stages. > > Signed-off-by: Dave Airlie > --- >

Re: [Mesa-dev] [PATCH 1/2] radv/ac: switch an if to switch

Patches 1 & 2 are, Reviewed-by: Edward O'Callaghan On 01/17/2017 09:47 AM, Dave Airlie wrote: > From: Dave Airlie > > makes it easier to add other shader stages. > > Signed-off-by: Dave Airlie > --- >

Re: [Mesa-dev] [PATCH] radv: add support for writing layer/viewport index (v2)

On 17 January 2017 at 08:48, Bas Nieuwenhuizen wrote: > Reviewed-by: Bas Nieuwenhuizen > > btw, isn't this enough already to export layer from the VS already? > Might be useful for layered clears without GS. Yes I might submit the layered

Re: [Mesa-dev] [PATCH] radv: add support for writing layer/viewport index (v2)

Reviewed-by: Bas Nieuwenhuizen btw, isn't this enough already to export layer from the VS already? Might be useful for layered clears without GS. On Mon, Jan 16, 2017 at 11:25 PM, Dave Airlie wrote: > From: Dave Airlie > > This

[Mesa-dev] [PATCH 2/2] radv/ac: split part of llvm compile into a separate function

From: Dave Airlie This is needed to have common code for gs copy shader emission. Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 33 ++--- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git

[Mesa-dev] [PATCH 1/2] radv/ac: switch an if to switch

From: Dave Airlie makes it easier to add other shader stages. Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c

[Mesa-dev] [PATCH] radv: add support for writing layer/viewport index (v2)

From: Dave Airlie This just adds the infrastructure to allow writing layer and viewport index. It's just a first patch out of the geom shader tree, and doesn't do much on its own. v2: add missing if statement change (Bas) Signed-off-by: Dave Airlie ---

Re: [Mesa-dev] [PATCH] radv/meta: split color renderpass creation out.

Reviewed-by: Bas Nieuwenhuizen On Mon, Jan 16, 2017 at 9:44 PM, Dave Airlie wrote: > From: Dave Airlie > > This is just prep work for layered clears, it doesn't change > anything. > > Signed-off-by: Dave Airlie

Re: [Mesa-dev] [PATCH] fixup! EGL: Implement the libglvnd interface for EGL (v2)

On Thu, 2017-01-05 at 14:29 -0700, Kyle Brenneman wrote: > --- >  src/egl/generate/eglFunctionList.py | 6 -- >  1 file changed, 4 insertions(+), 2 deletions(-) Reviewed-by: Adam Jackson Is this too invasive for 13.1? - ajax ___

Re: [Mesa-dev] [PATCH] radv: add support for writing layer/viewport index

On Mon, Jan 16, 2017 at 10:07 PM, Dave Airlie wrote: > From: Dave Airlie > > This just adds the infrastructure to allow writing layer > and viewport index. It's just a first patch out of the geom > shader tree, and doesn't do much on its own. > >

[Mesa-dev] [PATCH] radv: add support for writing layer/viewport index

From: Dave Airlie This just adds the infrastructure to allow writing layer and viewport index. It's just a first patch out of the geom shader tree, and doesn't do much on its own. Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 14

Re: [Mesa-dev] [PATCH] nvc0: true up exposing of the HW_METRIC_QUERY_GROUP for maxwell

On 01/15/2017 07:21 PM, Ilia Mirkin wrote: This had been updated in one place but not the other. Signed-off-by: Ilia Mirkin --- Not sure about that first one - should it do count++ irrespectively, and then count++ again for <= GM200? Or can all that checking stuff

Re: [Mesa-dev] [PATCH] radv/ac: use ctx->voidt in more places. (v2)

Reviewed-by: Bas Nieuwenhuizen On Mon, Jan 16, 2017 at 9:49 PM, Dave Airlie wrote: > From: Dave Airlie > > Just noticed this while in the area. > > v2: one replacement was incorrect. > > Signed-off-by: Dave Airlie

Re: [Mesa-dev] [PATCH] radv/meta: consolidate the depth stencil clear renderpasses

Reviewed-by: Bas Nieuwenhuizen On Mon, Jan 16, 2017 at 9:38 PM, Dave Airlie wrote: > From: Dave Airlie > > We only need one per samples (maybe not even that), reduce > all the unneeded ones. > > Signed-off-by: Dave Airlie

[Mesa-dev] [PATCH] radv/ac: use ctx->voidt in more places. (v2)

From: Dave Airlie Just noticed this while in the area. v2: one replacement was incorrect. Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git

[Mesa-dev] [PATCH] radv/ac: use ctx->voidt in more places.

From: Dave Airlie Just noticed this while in the area. Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c

Re: [Mesa-dev] [PATCH] radv: Support multiple devices.

For the two patches: Reviewed-by: Dave Airlie ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] radv/meta: split color renderpass creation out.

From: Dave Airlie This is just prep work for layered clears, it doesn't change anything. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_meta_clear.c | 87 ++-- 1 file changed, 49 insertions(+), 38 deletions(-)

Re: [Mesa-dev] [PATCH] radv: Support multiple devices.

On 2017-01-16 03:34 PM, Bas Nieuwenhuizen wrote: On Mon, Jan 16, 2017 at 9:30 PM, Andres Rodriguez wrote: Small comments inline for a bit of extra error handling. Still digesting radv and vulkan, so the feedback might be a bit incorrect. On 2017-01-16 02:59 PM, Bas

[Mesa-dev] [PATCH v2 2/2] radv: Support multiple devices.

Pretty straightforward. Also deleted the big comment block as it is a pretty standard pattern for filling in arrays. Also removed the error message on non-existent devices, as getting 7 errors printed to the console each time you enumerate the devices is pretty confusing. v2: Add constant for

[Mesa-dev] [PATCH v2 1/2] radv: Get physical device from radv_device instead of the instance.

Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 18 +- src/amd/vulkan/radv_device.c | 15 --- src/amd/vulkan/radv_image.c | 18 +- src/amd/vulkan/radv_pipeline.c | 10 +-

[Mesa-dev] [PATCH] radv/meta: consolidate the depth stencil clear renderpasses

From: Dave Airlie We only need one per samples (maybe not even that), reduce all the unneeded ones. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_meta_clear.c | 85 ++-- src/amd/vulkan/radv_private.h| 4 +-

Re: [Mesa-dev] [PATCH] radv: Support multiple devices.

On Mon, Jan 16, 2017 at 9:30 PM, Andres Rodriguez wrote: > Small comments inline for a bit of extra error handling. Still digesting > radv and vulkan, so the feedback might be a bit incorrect. > > > > On 2017-01-16 02:59 PM, Bas Nieuwenhuizen wrote: >> >> Pretty

Re: [Mesa-dev] [PATCH] radv: Support multiple devices.

Small comments inline for a bit of extra error handling. Still digesting radv and vulkan, so the feedback might be a bit incorrect. On 2017-01-16 02:59 PM, Bas Nieuwenhuizen wrote: Pretty straightforward. Also deleted the big comment block as it is a pretty standard pattern for filling in

Re: [Mesa-dev] [PATCH] radv: Support multiple devices.

On 17 January 2017 at 05:59, Bas Nieuwenhuizen wrote: > Pretty straightforward. Also deleted the big comment block as it > is a pretty standard pattern for filling in arrays. > > Also removed the error message on non-existent devices, as getting > 7 errors printed to the

[Mesa-dev] [PATCH] ac/debug: Decrease num_dw for type 2 NOP's.

Otherwise we read past the end of the buffer. Signed-off-by: Bas Nieuwenhuizen --- src/amd/common/ac_debug.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/common/ac_debug.c b/src/amd/common/ac_debug.c index f91e448a47f..989dfda4ff9 100644 ---

[Mesa-dev] [PATCH] radv: Support multiple devices.

Pretty straightforward. Also deleted the big comment block as it is a pretty standard pattern for filling in arrays. Also removed the error message on non-existent devices, as getting 7 errors printed to the console each time you enumerate the devices is pretty confusing. Signed-off-by: Bas

Re: [Mesa-dev] [PATCH 19/22] i965/vec4: fix SIMD-with lowering for CMP/MOV instructions with conditional modifiers

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > From: "Juan A. Suarez Romero" > > When splitting a CMP/MOV instruction with NULL dest, DF sources, and > conditional modifier; we can't use directly the flag registers, as they will >

Re: [Mesa-dev] [PATCH 5/8] android: add Android.mk for llvmpipe

What's the problem with using GALLIUM_DRIVER=softpipe / GALLIUM_DRIVER=llvmpipe to select between them? On Mon, Jan 16, 2017 at 2:24 PM, Zhen Wu wrote: > Thank you for your review. Emil. It sounds like renaming swrast to softpipe > is not a good idea, Inspired by your second

Re: [Mesa-dev] [PATCH 2/4] tgsi: add DDIV instruction

Pushed. Tested that I get DDIV ops, and that I lower them properly. (And that generated_tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-op-div-dvec4-dvec4.shader_test still passes, which should be a decent indication of that.) On Mon, Jan 16, 2017 at 2:29 PM, Ilia Mirkin

Re: [Mesa-dev] [PATCH 2/4] tgsi: add DDIV instruction

Building now... want to test that the lowering we have in place works properly, as that path hasn't been used in a while apparently. On Mon, Jan 16, 2017 at 2:20 PM, Nicolai Hähnle wrote: > Thanks. I've pushed this patch, let me know when nvc0 is ready. > > Cheers, > Nicolai

Re: [Mesa-dev] [PATCH 5/8] android: add Android.mk for llvmpipe

Thank you for your review. Emil. It sounds like renaming swrast to softpipe is not a good idea, Inspired by your second question, perhaps a new MESA_ENABLE_LLVMPIPE would allow us to maintain backward compatibility and keep the ability to switch between softpipe/llvmpipe. How does this sound?

Re: [Mesa-dev] [PATCH 2/4] tgsi: add DDIV instruction

Thanks. I've pushed this patch, let me know when nvc0 is ready. Cheers, Nicolai On 16.01.2017 18:49, Ilia Mirkin wrote: Reviewed-by: Ilia Mirkin On Mon, Jan 16, 2017 at 11:20 AM, Nicolai Hähnle wrote: From: Nicolai Hähnle

Re: [Mesa-dev] [PATCH 11/19] glx/apple: automake: include builddir prior to srcdir

LGTM Reviewed-by: Jeremy Sequoia > On Jan 16, 2017, at 07:45, Emil Velikov wrote: > > From: Emil Velikov > > Analogous to previous commit. > > Cc: "12.0 13.0" > Cc: Jeremy Huddleston

Re: [Mesa-dev] [PATCH 5/8] android: add Android.mk for llvmpipe

Good catch 2017-01-10 17:15 GMT+08:00 Mauro Rossi : > 2017-01-06 18:35 GMT+01:00 Wu Zhen : > > From: WuZhen > > > > rename old swrast to softpipe, add a new driver llvmpipe > > > > Change-Id:

Re: [Mesa-dev] [PATCH 01/19] i965: automake: correctly set MKDIR_GEN

On Monday, January 16, 2017 3:45:32 PM PST Emil Velikov wrote: > From: Emil Velikov > > Otherwise we might end up w/o the respective folder (depending on > autotools version) and fail at build time. > > Fixes: bfd17c76c12 "i965: Port INTEL_PRECISE_TRIG=1 to NIR." >

Re: [Mesa-dev] [PATCH] anv: set UAV coherence required bit when needed

Thanks for fixing this! Reviewed-by: Jason Ekstrand On Mon, Jan 16, 2017 at 4:56 AM, Iago Toral Quiroga wrote: > The same we do in the OpenGL driver (comment copied from there). > > This is required to ensure that we execute the fragment shader stage

Re: [Mesa-dev] [PATCH] nir/spirv/glsl450: rewrite atan2 to deal with denorms / infinities

+curro I'm not sure what I think here. TBH, I haven't actually read it in detail yet, but here are some first impressions: 1) There are two implementations of atan2 (SPIR-V and GLSL) and they should be kept in sync. The same dEQP tests exist in both cases. 2) The atan2 tests are not in any

Re: [Mesa-dev] [PATCH 3/4] gallium: add PIPE_CAP_TGSI_DDIV capability

On 16.01.2017 18:14, Ilia Mirkin wrote: FWIW nouveau has an internal OP_DIV (which we lower to mul + rcp, but probably shouldn't). It'd be trivial to hook up DDIV to come out as OP_DIV in nv50_ir_from_tgsi.cpp. I suspect hacking something into r600_asm should be moderately easy as well. That's

Re: [Mesa-dev] [PATCH 3/4] gallium: add PIPE_CAP_TGSI_DDIV capability

Am 16.01.2017 um 18:46 schrieb Nicolai Hähnle: > On 16.01.2017 18:14, Ilia Mirkin wrote: >> FWIW nouveau has an internal OP_DIV (which we lower to mul + rcp, but >> probably shouldn't). It'd be trivial to hook up DDIV to come out as >> OP_DIV in nv50_ir_from_tgsi.cpp. I suspect hacking something

Re: [Mesa-dev] [PATCH] radeonsi: fix R600_DEBUG=nooptvariant

Oh well :) Reviewed-by: Marek Olšák Marek On Mon, Jan 16, 2017 at 5:03 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > --- > src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- > 1 file changed, 1 insertion(+), 1

Re: [Mesa-dev] [PATCH 4/4] st/glsl_to_tgsi: use DDIV if the driver requests it

For the series: Reviewed-by: Marek Olšák Marek On Mon, Jan 16, 2017 at 5:20 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > Fixes GL45-CTS.gpu_shader_fp64.built_in_functions. > --- >

Re: [Mesa-dev] [PATCH 2/4] tgsi: add DDIV instruction

Reviewed-by: Ilia Mirkin On Mon, Jan 16, 2017 at 11:20 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > Double-precision division, to allow more precision than a DRCP + DMUL > sequence. > --- >

Re: [Mesa-dev] [PATCH 3/4] gallium: add PIPE_CAP_TGSI_DDIV capability

FWIW nouveau has an internal OP_DIV (which we lower to mul + rcp, but probably shouldn't). It'd be trivial to hook up DDIV to come out as OP_DIV in nv50_ir_from_tgsi.cpp. I suspect hacking something into r600_asm should be moderately easy as well. On Mon, Jan 16, 2017 at 12:08 PM, Roland

Re: [Mesa-dev] [PATCH 05/27] i965: Replace open coded with intel_miptree_get_image_offset()

On Mon, Jan 16, 2017 at 1:13 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/intel_pixel_read.c | 16 ++-- > 1 file changed, 14 insertions(+), 2 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH] gallium/hud: avoid buffer overrun

Pushed, thanks. Marek On Sun, Jan 15, 2017 at 12:28 AM, Thomas Hindoe Paaboel Andersen wrote: > Renaming data sources was added in > e8bb97ce30051b999a4a69c9b27884daeb8d71e6 > It was possible to use a new name longer than > the name array in hud_graph of 128. This > patch

Re: [Mesa-dev] [PATCH 3/4] gallium: add PIPE_CAP_TGSI_DDIV capability

Is a cap bit actually needed here or can we require drivers to unconditionally support this (as long as they support doubles, of course...)? d3d11 has a requirement (if doubles are supported) that ddiv has an accuracy of 0.5 ULP - emulating with mul + rcp clearly isn't allowed (rcp, both the float

Re: [Mesa-dev] [PATCH 04/27] i965/gen6: Remove check for stencil format

Thanks! This has always bothered me. Reviewed-by: Jason Ekstrand On Mon, Jan 16, 2017 at 1:13 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > There are is no alternative. > > Signed-off-by: Topi Pohjolainen > --- >

Re: [Mesa-dev] [PATCH 03/27] i965: Remove check for hiz on earlier gens than SNB

Reviewed-by: Jason Ekstrand On Mon, Jan 16, 2017 at 4:07 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > Reviewed-by: Samuel Iglesias Gonsálvez > > On Mon, 2017-01-16 at 11:13 +0200, Topi Pohjolainen wrote: > > Only caller,

Re: [Mesa-dev] [PATCH 01/27] i965/meta: Remove unused brw_get_rb_for_slice()

Reviewed-by: Jason Ekstrand On Mon, Jan 16, 2017 at 1:13 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_meta_util.c | 44 > --- >

Re: [Mesa-dev] [PATCH] nouveau: remove always false argument in nouveau_fence_new()

I think there was a point in time when it was actually used. But that time is no more. Reviewed-by: Ilia Mirkin On Mon, Jan 16, 2017 at 11:25 AM, Emil Velikov wrote: > No point in having the extra argument considering that it's effectively >

Re: [Mesa-dev] [PATCH 02/19] freedreno: automake: correctly set MKDIR_GEN

On Mon, Jan 16, 2017 at 4:45 PM, Emil Velikov wrote: > From: Emil Velikov > > Analogous to previous commit. > > Fixes: 4610e5ef28e "freedreno/ir3: fix sin/cos" > Cc: "12.0 13.0" > Cc: Rob Clark

Re: [Mesa-dev] [PATCH] radeonsi: fix R600_DEBUG=nooptvariant

On 01/16/2017 05:03 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > --- > src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c >

Re: [Mesa-dev] [PATCH 02/27] i965/miptree: Remove redundant check for null texture

On Mon, Jan 16, 2017 at 1:13 AM, Topi Pohjolainen < topi.pohjolai...@gmail.com> wrote: > There exact same check earlier in brw_miptree_layout() which > intel_miptree_create_layout() in turn calls unconditionally. > > Signed-off-by: Topi Pohjolainen > --- >

Re: [Mesa-dev] [PATCH v2 4/7] gallium: add PIPE_CAP_TGSI_FS_FBFETCH

Patches 1-4: Reviewed-by: Nicolai Hähnle On 14.01.2017 22:28, Ilia Mirkin wrote: Signed-off-by: Ilia Mirkin --- v1 -> v2: remove accidental enablement in si_pipe src/gallium/docs/source/screen.rst | 2 ++

[Mesa-dev] [PATCH 3/4] graw: remove unneeded forward declaration of gallivm_state

From: Emil Velikov Signed-off-by: Emil Velikov --- src/gallium/auxiliary/draw/draw_private.h | 4 1 file changed, 4 deletions(-) diff --git a/src/gallium/auxiliary/draw/draw_private.h b/src/gallium/auxiliary/draw/draw_private.h

[Mesa-dev] [PATCH 1/4] graw: provide static inline draw_create_vs_llvm() for !HAVE_LLVM

From: Emil Velikov Allows us to drop the ifdef guard from the code and paves a way towards fixing incremental builds whist toggling the configure gallium llvm switch. Signed-off-by: Emil Velikov --- src/gallium/auxiliary/draw/draw_vs.c |

[Mesa-dev] [PATCH 4/4] graw: trivial coding style fixes

From: Emil Velikov Remove trailing whitespace and properly use brackets. Signed-off-by: Emil Velikov --- src/gallium/auxiliary/draw/draw_vs.c | 47 +++- 1 file changed, 20 insertions(+), 27 deletions(-)

[Mesa-dev] [PATCH 2/4] graw: provide static inline draw_create_with_llvm_context()

From: Emil Velikov Analogous to previous commit. Signed-off-by: Emil Velikov --- src/gallium/auxiliary/draw/draw_context.h | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/auxiliary/draw/draw_context.h

[Mesa-dev] [PATCH] nouveau: remove always false argument in nouveau_fence_new()

No point in having the extra argument considering that it's effectively unused since the function was introduced. Cc: Ilia Mirkin Signed-off-by: Emil Velikov --- src/gallium/drivers/nouveau/nouveau_fence.c| 8 ++--

[Mesa-dev] [PATCH 4/4] st/glsl_to_tgsi: use DDIV if the driver requests it

From: Nicolai Hähnle Fixes GL45-CTS.gpu_shader_fp64.built_in_functions. --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp

[Mesa-dev] [PATCH 2/4] tgsi: add DDIV instruction

From: Nicolai Hähnle Double-precision division, to allow more precision than a DRCP + DMUL sequence. --- src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c | 2 ++ src/gallium/auxiliary/tgsi/tgsi_info.c | 2 ++ src/gallium/docs/source/tgsi.rst

[Mesa-dev] [PATCH 3/4] gallium: add PIPE_CAP_TGSI_DDIV capability

From: Nicolai Hähnle For drivers to indicate that they don't want double-precision divides to be lowered into rcp+mul. --- src/gallium/docs/source/screen.rst | 2 ++ src/gallium/drivers/freedreno/freedreno_screen.c | 3 ++-

[Mesa-dev] [PATCH 0/4] radeonsi: add DDIV for double division instead of RCP+MUL

Hi all, This series fixes one of the last remaining CTS failures for radeonsi, GL45-CTS.gpu_shader_fp64.built_in_functions. Specifically, that test checks that mod(13.375, 13.375) == 0.0. As part of the lowering of modulo, we compute 13.375 / 13.375, which is of course 1.0. Unfortunately, when

[Mesa-dev] [PATCH 1/4] glsl: split DIV_TO_MUL_RCP into single- and double-precision flags

From: Nicolai Hähnle --- src/compiler/glsl/ir_optimization.h | 4 +++- src/compiler/glsl/lower_instructions.cpp | 19 +++ 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/src/compiler/glsl/ir_optimization.h

Re: [Mesa-dev] [PATCH] nv50, nvc0: disable depth offsets when there is no depth buffer

I'm pretty sure it's undefined in GL (because there's no defined minimum resolvable difference in depth buffer format), IIRC this is stated somewhere but can't remember. d3d10 has a definition which doesn't make much sense (as it still says to use the unorm formula in this case for which "r is the

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_PROPERTY_MUL_ZERO_WINS

I think you'd also want a cap bit - I don't think it's reasonable to expect all drivers to implement this (e.g. I really don't feel like doing that for llvmpipe, there is no way to do that natively obviously), and I'd think it's better that it would be the fault of the st and not the driver if the

[Mesa-dev] [PATCH] radeonsi: fix R600_DEBUG=nooptvariant

From: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 9967837..9d30b90 100644

Re: [Mesa-dev] [PATCH 2/2] configure: remove unused AC_SUBST variables

Not a build system guru, but both patches make sense to me, so: Reviewed-by: Nicolai Hähnle On 08.12.2016 18:58, Emil Velikov wrote: From: Emil Velikov Signed-off-by: Emil Velikov --- configure.ac | 10

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_PROPERTY_MUL_ZERO_WINS

Yeah, Axel also asked for a cap. I tend to agree. I just didn't want to have two outstanding changes to add caps, since they'd conflict with each other. (My advanced blend series also adds a cap for FBFETCH.) Once that lands, I can resend adding a cap for this. On Mon, Jan 16, 2017 at 10:51 AM,

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