From: "Wladimir J. van der Laan"
Add support for ETC2 compressed textures in the etnaviv driver.
One step closer towards GL ES 3 support.
For now, treat SRGB and RGB formats the same. It looks like these are
distinguished using a different bit in sampler state, and not part
On 15 July 2017 at 17:01, Andres Gomez wrote:
> On Mon, 2017-07-10 at 12:19 +0100, Emil Velikov wrote:
>> On 8 July 2017 at 20:59, Andres Gomez wrote:
>> > The LD_LIBRARY_PATH environment variable could be already defined so
>> > we extend it and restore it
On Thursday, 2017-07-13 20:04:33 +0100, Emil Velikov wrote:
> From: Emil Velikov
>
> Earlier commit refactored/split the parsing into separate hunks.
> While no functional change was intended, it did not attribute that
> different error is set when the attrib. value
On 18/07/17 05:07, Jason Ekstrand wrote:
On Mon, Jul 17, 2017 at 5:18 PM, Chad Versace
> wrote:
On Tue 18 Jul 2017, Lionel Landwerlin wrote:
> Oh dear :/
>
> Reviewed-by: Lionel Landwerlin
> h (format) {
>
> How about
>
> const struct util_format_description *desc = util_format_description(format);
> return desc->layout == UTIL_FORMAT_LAYOUT_ETC;
I intentionally exclude PIPE_FORMAT_ETC1_RGB8 here because it is
implemented on older hw and has its own feature bit
Depth buffers are always Y-tiled. In brw_miptree_choose_tiling()
driver opts to use linear buffers for small and 1D but this does
not apply for depth - GL_DEPTH_COMPONENT and GL_DEPTH_STENCIL_EXT
are considered first.
Signed-off-by: Topi Pohjolainen
---
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen7_misc_state.c | 20 +-
src/mesa/drivers/dri/i965/gen8_depth_state.c | 26 ++
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 38 ---
3 files
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 39 +++
1 file changed, 22 insertions(+), 17 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
Signed-off-by: Topi Pohjolainen
---
src/intel/isl/isl.c | 40 +++-
1 file changed, 35 insertions(+), 5 deletions(-)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 12ffe3bb51..90b36c33bc 100644
---
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_clear.c | 5 +-
src/mesa/drivers/dri/i965/gen8_depth_state.c | 3 +-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 136 +-
3 files changed, 97 insertions(+), 47
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 103 +--
1 file changed, 57 insertions(+), 46 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_tex_image.c| 20
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 8 +++-
2 files changed, 23 insertions(+), 5 deletions(-)
diff --git
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_fbo.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
b/src/mesa/drivers/dri/i965/intel_fbo.c
index 1fa40bb5c9..fee4b6fa8c 100644
---
There is a functional change: Before update_image_surface() didn't
shift the number of layers for 3D, now it does like
update_texture_image_param() did.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 +++---
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index a0b129adb4..1b8c0da80d
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 2 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +-
src/mesa/drivers/dri/i965/gen6_depth_state.c | 2 +-
src/mesa/drivers/dri/i965/gen7_misc_state.c | 4 +-
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_screen.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 8 +--
src/mesa/drivers/dri/i965/brw_tex_layout.c | 28
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 10 +--
src/mesa/drivers/dri/i965/gen6_depth_state.c |
v2: Do not concern cpp, pitch and tiling which are already
transitioned.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_blit.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git
First four patches are mechanical replacing intel_mipmap_tree native
members with equivalent found in intel_mipmap_tree::surf. This helps
to reduce back and forth churn, i.e., helps to avoid number of
"if (mt->surf.size > 0)"-conditionals that would get dropped in the
end. Assumption is that this
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_blit.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c
b/src/mesa/drivers/dri/i965/intel_blit.c
index
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.c | 3 +-
src/mesa/drivers/dri/i965/brw_tex_layout.c| 9 ++-
src/mesa/drivers/dri/i965/brw_wm.c| 2 +-
src/mesa/drivers/dri/i965/intel_fbo.c | 13 +---
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.c| 16 -
src/mesa/drivers/dri/i965/brw_context.c | 2 +-
src/mesa/drivers/dri/i965/brw_meta_util.c| 2 +-
src/mesa/drivers/dri/i965/brw_tex_layout.c |
This will significantly reduce chrun when switching remaaining
surface types to isl. After the full transition it will be easier
to calculate on-demand and drop the helper member in miptree.
Signed-off-by: Topi Pohjolainen
---
On 2017-07-17 19:21, Emil Velikov wrote:
On 13 July 2017 at 12:09, Grigori Goronzy wrote:
On 2017-07-12 15:15, Emil Velikov wrote:
As mentioned in earlier commit no_error should be device agnostic.
Hence removing the st/dri bits and adding a DRI_CONF_MESA_NO_ERROR()
line
It removes unused buffer_count variable from dri2_egl_surface.
And it polishes the assert of dri2_drm_get_buffers_with_format().
Signed-off-by: Mun Gwan-gyeong
---
src/egl/drivers/dri2/egl_dri2.h | 1 -
src/egl/drivers/dri2/platform_android.c | 5 +
Reviewed-by: Samuel Pitoiset
On 07/17/2017 11:56 PM, Marek Olšák wrote:
From: Marek Olšák
Accidentally removed in 9f320e0a387a1009c5218daf130b3b754a3c2800.
---
src/gallium/drivers/radeonsi/si_pipe.c | 3 ++-
1 file changed, 2 insertions(+),
This helps to drop dependency to miptree::total_height which is
used in brw_miptree_get_vertical_slice_pitch().
CC: Jason Ekstrand
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 2 +-
CC: Jason Ekstrand
Signed-off-by: Topi Pohjolainen
---
src/intel/isl/isl_storage_image.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/intel/isl/isl_storage_image.c
b/src/intel/isl/isl_storage_image.c
index
Commit 463b7d0332c5("gallium: Enable ARM NEON CPU detection.")
introduced CPU feature detection based Android cpufeatures library.
Unfortunately it also added an assumption that if PIPE_OS_ANDROID is
defined, the library is also available, which is not true for the
standalone build without using
On Friday, June 16, 2017 4:31:31 PM PDT Rafael Antognolli wrote:
> The code doesn't get exactly a lot simpler but at least it is in a single
> place, and we delete more than we add.
>
> Signed-off-by: Rafael Antognolli
> ---
>
On 17 July 2017 at 20:14, Alex Smith wrote:
> This looks like a regression from df301237940 ("radv: use
> ac_compute_surface"). Before that, the opt4Space addrlib flag was set
> to true unless the image has FMASK (ac_compute_surface will similarly
> only set that flag
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