Am Dienstag, den 01.08.2017, 09:32 +1000 schrieb Dave Airlie:
> From: Dave Airlie
>
> This reverts commit 3008161d28e38336ba39aba4769a2deaf9732f55,
> which caused a regression for VMWare.
>
> The initial code had some recursion in it, that I removed by accident
> trying to
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101397
---
src/egl/drivers/dri2/platform_surfaceless.c | 114 ++--
src/gallium/state_trackers/dri/drisw.c | 45 ++-
2 files changed, 148 insertions(+), 11 deletions(-)
diff --git
I wrote some crucible tests, but it seems like I never got around to
sending them out. I can put a branch up tomorrow. They're dependent on
this series that never got any attention, though:
https://lists.freedesktop.org/archives/mesa-dev/2017-June/158480.html
On Mon, Jul 31, 2017 at 10:03 PM,
On 1 August 2017 at 14:14, Dave Airlie wrote:
> From: Dave Airlie
>
> This looks like it's supported since llvm 3.9 at least,
> so switch over radeonsi and radv to using it, -pro also
> uses this. We can now drop creating lds for these operations
> as the
Out of curiosity, are there any tests for this anywhere?
--Jason
On Mon, Jul 31, 2017 at 7:24 PM, Connor Abbott
wrote:
> From: Connor Abbott
>
> ---
> src/amd/common/ac_nir_to_llvm.c | 49 ++
> +++
>
On 08/01/2017 12:17 AM, Rob Herring wrote:
On Mon, Jul 31, 2017 at 3:45 PM, Emil Velikov wrote:
On 31 July 2017 at 09:32, Tapani Pälli wrote:
Makes it possible to build Mesa on Android with -DDEBUG with
the next patch that reverts 4f695731.
From: Dave Airlie
This looks like it's supported since llvm 3.9 at least,
so switch over radeonsi and radv to using it, -pro also
uses this. We can now drop creating lds for these operations
as the ds_swizzle operation doesn't actually write to lds at all.
Signed-off-by:
On Mon, Jul 31, 2017 at 7:02 PM, Connor Abbott
wrote:
> From: Connor Abbott
>
> These are properties of the instruction that must be respected when
> moving it around, in addition to the usual SSA dominance guarantee.
> Previously, we only had
Reviewed-by: Matt Turner
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On 01/08/17 06:59, Samuel Pitoiset wrote:
This reverts commit fcbb93e860246375d03f280f927f79d3645a8988 and
also commit 7c5b204e38d8cae70f5bf26e7223da5bc448bb5c to avoid
compilation errors.
Basically, the parameter indexes look wrong when a non-bindless
sampler is declared inside a nested
From: Connor Abbott
---
src/amd/common/ac_nir_to_llvm.c | 49 +
src/amd/vulkan/radv_device.c| 8 +++
src/amd/vulkan/radv_pipeline.c | 2 ++
3 files changed, 59 insertions(+)
diff --git a/src/amd/common/ac_nir_to_llvm.c
From: Connor Abbott
For us, this will only lower subgroup mask instructions. It could do
other things in the future though.
---
src/amd/vulkan/radv_pipeline.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/amd/vulkan/radv_pipeline.c
From: Connor Abbott
Reviewed-by: Nicolai Hähnle
Reviewed-by: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 30 ++
src/amd/common/ac_llvm_build.h | 6 ++
From: Connor Abbott
Reviewed-by: Nicolai Hähnle
Reviewed-by: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 26 ++
src/amd/common/ac_llvm_build.h | 4
From: Connor Abbott
Reviewed-by: Nicolai Hähnle
Reviewed-by: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 43 ++
src/amd/common/ac_llvm_build.h | 2 ++
From: Connor Abbott
Reviewed-by: Nicolai Hähnle
Reviewed-by: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 24 ++
src/amd/common/ac_llvm_build.h | 2 ++
From: Connor Abbott
---
src/compiler/spirv/nir_spirv.h | 2 +
src/compiler/spirv/spirv_to_nir.c | 79 ++
src/compiler/spirv/vtn_variables.c | 28 ++
3 files changed, 109 insertions(+)
diff --git
From: Connor Abbott
Lower them to the GL version.
---
src/compiler/nir/nir_lower_system_values.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/compiler/nir/nir_lower_system_values.c
b/src/compiler/nir/nir_lower_system_values.c
From: Connor Abbott
For SPIR-V, Khronos decided to make the SubGroup*Mask system values
consist of 4 32-bit components rather than one 64-bit component.
Although we'll lower away the difference in nir_lower_system_values so
drivers won't have to deal with them, adding these
From: Connor Abbott
We're about to bump the number of system values above 32. The
system_values_read bitfield itself is 64 bits, but some users weren't
taking that into account. Fix the ones I could find by grepping for
"system_values_read". This prevents regressions at
From: Connor Abbott
This is mostly a re-send of my previous series [1]. I've split out the
more controversial NIR attribute stuff into a separate series, which is
now independent of this one. The main change, other than rebasing stuff,
is that we now use the NIR lowering
From: Connor Abbott
---
src/compiler/nir/nir_intrinsics.h | 35 +--
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/src/compiler/nir/nir_intrinsics.h
b/src/compiler/nir/nir_intrinsics.h
index ea51525..72c4296 100644
---
From: Connor Abbott
These optimizations happened to work with derivatives, but they won't
with upcoming shader_ballot and group_vote instructions.
v2: fixup for new convergent & uniform-control semantics
---
src/compiler/nir/nir_instr_set.c | 24
From: Connor Abbott
v2: use convergent instead of cross-thread
---
src/compiler/nir/nir_opt_gcm.c | 72 ++
1 file changed, 23 insertions(+), 49 deletions(-)
diff --git a/src/compiler/nir/nir_opt_gcm.c b/src/compiler/nir/nir_opt_gcm.c
From: Connor Abbott
This series adds some more precise semantics for instructions added by
ARB_shader_ballot and ARB_shader_group_vote, which should allow the
optimizer more freedom. I based it off my previous series [1], but
since the intrinsics have already landed in
From: Connor Abbott
These are properties of the instruction that must be respected when
moving it around, in addition to the usual SSA dominance guarantee.
Previously, we only had special handling for fddx and fddy, in a very
ad-hoc way. But with arb_shader_ballot and
On 1 August 2017 at 09:40, Marek Olšák wrote:
> Hi,
>
> This might slightly increase MRT performance. You need the amdgpu
> kernel driver if you want it for SI and CI.
>
> I've fixed a few of issues with the original code, enabled it for
> mipmapped textures, and added GFX9
From: Connor Abbott
This makes it match radeonsi. The LLVM backend itself will emit the
correct instruction, but LLVM might do incorrect optimizations since it
thinks the output is undefined when the input is 0, even though it's not
supposed to be. We really need a new
On 1 August 2017 at 09:40, Marek Olšák wrote:
> From: Marek Olšák
>
> it's useless
left over from radeon winsys I assume.
Reviewed-by: Dave Airlie
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From: Connor Abbott
This was broken thanks to a typo in b2367cf.
Cc: Nicolai Hähnle
---
src/amd/common/ac_nir_to_llvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c
On 1 August 2017 at 09:40, Marek Olšák wrote:
> From: Marek Olšák
Thanks for documenting it!
Reviewed-by: Dave Airlie
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From: Connor Abbott
The optimizations are only valid for 32-bit integers. They were
mistakenly firing for 64-bit integers as well.
Cc: mesa-sta...@lists.freedesktop.org
---
src/compiler/nir/nir_opt_algebraic.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
On 01/08/17 07:43 AM, Marek Olšák wrote:
> From: Marek Olšák
Fixes: 064550238ef0 ("radeonsi: use CLEAR_STATE to initialize some
registers")
Bugzilla: https://bugs.freedesktop.org/101969
Tested-by: Michel Dänzer
--
Earthling
On 01/08/17 07:43 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> src/gallium/drivers/radeon/r600_pipe_common.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
>
On Mon, Jul 31, 2017 at 12:43 PM, Samuel Pitoiset
wrote:
> Fixes: ddc32537d6 ("mesa: clamp viewport values only once when using
> glViewport()")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101981
> Bugzilla:
From: Marek Olšák
The tile swizzle computation was done after the whole miptree was computed,
but that was too late, because at that point AddrSurfInfoOut contained
information about the smallest miplevel, which is never 2D-tiled.
The correct way is to do the computation
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/drivers/radeon/r600_texture.c | 4 +++-
src/gallium/drivers/radeonsi/cik_sdma.c | 7 +++
src/gallium/drivers/radeonsi/si_descriptors.c | 13 -
From: Marek Olšák
---
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 12 +++-
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h | 2 ++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
From: Marek Olšák
---
src/amd/common/ac_surface.c| 6 --
src/amd/common/ac_surface.h| 2 +-
src/amd/vulkan/radv_image.c| 2 +-
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 1 +
4 files changed, 7
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_texture.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 2d58dc9..07df2d4 100644
---
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_state.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index c151a98..6e67824 100644
---
From: Marek Olšák
---
src/amd/common/ac_surface.c| 87 +-
src/amd/common/ac_surface.h| 3 +
src/gallium/drivers/radeon/r600_texture.c | 1 +
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 2 +
4 files
From: Marek Olšák
Mipmapping with tile swizzle doesn't work.
---
src/amd/common/ac_surface.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 87a8993..3716d3d 100644
---
From: Marek Olšák
---
src/amd/common/ac_surface.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 4647ce4..61b4e41 100644
--- a/src/amd/common/ac_surface.c
+++
From: Marek Olšák
Shareable textures won't use tile swizzle.
---
src/amd/common/ac_surface.h | 1 +
src/gallium/drivers/radeon/r600_texture.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_surface.h
From: Marek Olšák
it's useless
---
src/amd/common/ac_surface.h| 1 -
src/amd/vulkan/radv_image.c| 1 -
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c | 3 ---
3 files changed, 5 deletions(-)
diff --git
From: Marek Olšák
---
src/amd/common/ac_surface.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 68700f4..1eff4e5 100644
--- a/src/amd/common/ac_surface.c
+++
Hi,
This might slightly increase MRT performance. You need the amdgpu
kernel driver if you want it for SI and CI.
I've fixed a few of issues with the original code, enabled it for
mipmapped textures, and added GFX9 support. I wasn't able to make it
work with mipmapping on SI. There is also a
From: Marek Olšák
Note that dcc_alignment = pipe_interleave_bytes * num_pipes * num_banks,
which is greater than the previous open-coded alignment.
---
src/amd/common/ac_surface.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git
From: Marek Olšák
Gfx9 will use it too.
---
src/amd/common/ac_surface.c | 5 -
src/amd/common/ac_surface.h | 16 +++-
src/amd/vulkan/radv_device.c | 6 +++---
src/amd/vulkan/radv_image.c | 6 +++---
4 files changed, 25 insertions(+), 8 deletions(-)
From: Dave Airlie
This reverts commit 3008161d28e38336ba39aba4769a2deaf9732f55,
which caused a regression for VMWare.
The initial code had some recursion in it, that I removed by accident
trying to add back the recursion broke lots of things, take the high
road and revert
On 2017-07-31 16:08:51, Bas Nieuwenhuizen wrote:
> On Tue, Aug 1, 2017 at 12:32 AM, Jordan Justen
> > +Vulkan 1.0 -- all DONE: anv
>
> So while we don't have conformance, we have at several times had local
> conformance suite runs pass all tests, so I think we can write up radv
> as all done here
On Tue, Aug 1, 2017 at 12:32 AM, Jordan Justen
wrote:
> To get the extension list:
>
> $ git grep -hE "extension name=\"VK_(EXT|KHR|KHX)" src/vulkan/registry/vk.xml
> | \
> grep -v disabled | awk '{print $2}' | sed -E 's/(name=)?"//g' | sort
>
> To find anv(il) and
Marek Olšák writes:
> From: Marek Olšák
>
> which are MSAA and depth/stencil buffers.
Reviewed-by: Eric Anholt
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Am 31.07.2017 um 21:43 schrieb Samuel Pitoiset:
> Fixes: ddc32537d6 ("mesa: clamp viewport values only once when using
> glViewport()")
Reviewed-by: Roland Scheidegger
FWIW there's quite some bogus function commens where the indicated
callers no longer match (e.g. "Usually
Am 01.08.2017 um 00:29 schrieb Nicolai Hähnle:
> On 01.08.2017 00:25, Roland Scheidegger wrote:
>> FWIW while this works with the windows build, it still does not with a
>> scons linux build here:
>>Compiling src/mesa/drivers/dri/common/dri_util.c ...
>> In file included from
From: Marek Olšák
---
src/gallium/drivers/r600/r600_hw_context.c| 2 +-
src/gallium/drivers/radeon/r600_pipe_common.c | 7 +--
src/gallium/drivers/radeon/r600_pipe_common.h | 2 +-
src/gallium/drivers/radeonsi/si_debug.c | 14 --
From: Marek Olšák
which are MSAA and depth/stencil buffers.
---
src/gallium/state_trackers/dri/dri2.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/state_trackers/dri/dri2.c
b/src/gallium/state_trackers/dri/dri2.c
index
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_debug.c | 3 +++
src/gallium/drivers/radeonsi/si_descriptors.c | 7 ++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_debug.c
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_state.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 7dadc4a..c151a98 100644
---
From: Marek Olšák
I don't know the condition for the flush, but we better turn this off.
The sL1 flush is used when CE dumps stuff into a ring buffer and the ring
buffer wraps.
---
src/gallium/drivers/radeonsi/si_state_draw.c | 6 +++---
1 file changed, 3 insertions(+), 3
On Mon, Jul 31, 2017 at 3:32 PM, Jordan Justen
wrote:
> To get the extension list:
>
> $ git grep -hE "extension name=\"VK_(EXT|KHR|KHX)" src/vulkan/registry/vk.xml
> | \
> grep -v disabled | awk '{print $2}' | sed -E 's/(name=)?"//g' | sort
>
> To find anv(il) and
From: Marek Olšák
Compression isn't enabled with non-zero levels.
---
src/gallium/drivers/radeonsi/si_descriptors.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_pipe_common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index c58048f..e9402f8 100644
---
On 01.08.2017 00:25, Roland Scheidegger wrote:
FWIW while this works with the windows build, it still does not with a
scons linux build here:
Compiling src/mesa/drivers/dri/common/dri_util.c ...
In file included from src/mesa/drivers/dri/common/dri_util.c:45:0:
src/util/xmlpool.h:103:29:
Am 31.07.2017 um 18:36 schrieb Nicolai Hähnle:
> From: Nicolai Hähnle
>
> v2: rename cap to PIPE_CAP_QUERY_SO_OVERFLOW and be a bit more explicit
> in the documentation
> ---
>
> I decided to keep the query names as they were, to avoid any possibility
> of
To get the extension list:
$ git grep -hE "extension name=\"VK_(EXT|KHR|KHX)" src/vulkan/registry/vk.xml |
\
grep -v disabled | awk '{print $2}' | sed -E 's/(name=)?"//g' | sort
To find anv(il) and radv supported extensions:
$ git grep -hE "'VK_([A-Z]+)_[a-z]" src/intel/
$ git grep -hE
FWIW while this works with the windows build, it still does not with a
scons linux build here:
Compiling src/mesa/drivers/dri/common/dri_util.c ...
In file included from src/mesa/drivers/dri/common/dri_util.c:45:0:
src/util/xmlpool.h:103:29: fatal error: xmlpool/options.h: No such file
or
On 31.07.2017 21:02, Marek Olšák wrote:
Does the rest of the series need to be rebased? I wonder if this is
the time to review it.
There are only trivial changes where the cap was renamed. It's ready as
far as I'm concerned -- I've pushed the latest version to
Quoting Chris Wilson (2017-07-31 22:51:25)
> Luminance/Intensity when converted to RGB should be replicated to fill
> the RGB channels, but they differ on how the alpha channel is filled, as
> luminance is set to 1 (unless alpha is supplied) and intensity is
> replicated into alpha as well.
>
>
Luminance/Intensity when converted to RGB should be replicated to fill
the RGB channels, but they differ on how the alpha channel is filled, as
luminance is set to 1 (unless alpha is supplied) and intensity is
replicated into alpha as well.
https://www.khronos.org/opengl/wiki/Image_Format:
Yep, seems like a good idea.
Reviewed-by: Matt Turner
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Luminance/Intensity when converted to RGBA should be replicated to fill
the RGB channels.
Fixes:5038d839b8e4 ("mesa: use _mesa_format_convert to implement glReadPixels.")
Cc: Iago Toral Quiroga
Cc: Jason Ekstrand
---
src/mesa/main/readpix.c | 8
On Mon, Jul 31, 2017 at 3:45 PM, Emil Velikov wrote:
> On 31 July 2017 at 09:32, Tapani Pälli wrote:
>> Makes it possible to build Mesa on Android with -DDEBUG with
>> the next patch that reverts 4f695731.
>>
>> Signed-off-by: Tapani Pälli
Both are
Reviewed-by: Matt Turner
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This reverts commit fcbb93e860246375d03f280f927f79d3645a8988 and
also commit 7c5b204e38d8cae70f5bf26e7223da5bc448bb5c to avoid
compilation errors.
Basically, the parameter indexes look wrong when a non-bindless
sampler is declared inside a nested struct (because it is skipped).
I think it's
Hi Tim,
Some of the inline functions seem unused.
Very quick search showed the following:
InterpolateComponent
_simd128_abs_ps
_simd_abs_ps
Might be worth cleaning things up, first?
-Emil
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On Mon, Jul 31, 2017 at 1:28 PM, Nanley Chery wrote:
> On Mon, Jul 31, 2017 at 01:03:38PM -0700, Jason Ekstrand wrote:
> > On Mon, Jul 31, 2017 at 12:11 PM, Nanley Chery
> > wrote:
> >
> > > On Sat, Jul 22, 2017 at 04:54:24PM -0700, Jason Ekstrand
Hi Tim,
> If the Cray flags are for wrapper scripts, why do we need specific flags
> for that instead of using the underlying compiler flags?
>
Sort answer: It's the "Cray" way of doing things.
Long answer: The target-cpu flag sometimes just controlls the -march flags
(or equiv) but it can
On 31 July 2017 at 09:32, Tapani Pälli wrote:
> this change reverts commit 4f695731, we want to be able to build
> with -DDEBUG and gen_decoder on Android.
>
> Signed-off-by: Tapani Pälli
> ---
> src/intel/Makefile.common.am | 2 +-
>
On 31 July 2017 at 09:32, Tapani Pälli wrote:
> Makes it possible to build Mesa on Android with -DDEBUG with
> the next patch that reverts 4f695731.
>
> Signed-off-by: Tapani Pälli
> ---
> src/intel/Android.common.mk | 5 +
> 1 file changed, 5
On 31 July 2017 at 16:46, Rob Herring wrote:
> Commit 601093f95ddf ("xmlconfig: move into src/util") broke the Android
> build due to missing libexpat dependency:
>
> external/mesa3d/src/util/xmlconfig.c:34:10: fatal error: 'expat.h' file not
> found
>
> Fixes: 601093f95ddf
On Mon, 2017-07-31 at 13:05 -0700, Matt Turner wrote:
> > @@ -221,6 +221,20 @@ GL 4.5, GLSL 4.50 -- all DONE: nvc0, radeonsi
> >GL_KHR_robustness DONE (i965)
> >GL_EXT_shader_integer_mix DONE (all drivers
> > that support
On Mon, Jul 31, 2017 at 01:03:38PM -0700, Jason Ekstrand wrote:
> On Mon, Jul 31, 2017 at 12:11 PM, Nanley Chery
> wrote:
>
> > On Sat, Jul 22, 2017 at 04:54:24PM -0700, Jason Ekstrand wrote:
> > > It may technically be possible to enable some sort of fast-clear support
>
On 31 July 2017 at 20:57, Bas Nieuwenhuizen wrote:
> Signed-off-by: Bas Nieuwenhuizen
> Fixes: 601093f95dd "xmlconfig: move into src/util"
> Cc: Nicolai Hähnle
I forgot that nine is a bit different than the rest. Thanks for
Hi Tim,
What's the goal behind the split. Please add a couple of words in the
commit message.
On 31 July 2017 at 20:40, Tim Rowley wrote:
> ---
> src/gallium/drivers/swr/Makefile.am| 3 +-
> src/gallium/drivers/swr/SConscript | 4
If the Cray flags are for wrapper scripts, why do we need specific flags for
that instead of using the underlying compiler flags?
I’m guessing you intend this for the 17.2 branch as well?
-Tim
> On Jul 31, 2017, at 2:53 PM, Chuck Atkins wrote:
>
> Note that the Cray
On Mon, Jul 31, 2017 at 9:43 AM, Adam Jackson wrote:
> ARB_polygon_offset_clamp and ARB_texture_filter_anisotropic look like
> they'd be pretty trivial to wire up.
>
> Signed-off-by: Adam Jackson
> ---
> docs/features.txt | 22 ++
> 1 file
On Mon, Jul 31, 2017 at 12:11 PM, Nanley Chery
wrote:
> On Sat, Jul 22, 2017 at 04:54:24PM -0700, Jason Ekstrand wrote:
> > It may technically be possible to enable some sort of fast-clear support
> > for at least the base slice of a 2D array texture on gen7. However,
> >
Note that the Cray flags (-target-cpu=) need to come first since the
cray programming environment uses wappers around other compilers. By
checking the wrapper flags first, you can be sure to match the wrapper
flag instead of the underlying compiler (gcc, intel, pgi, etc.) flags.
Signed-off-by:
Signed-off-by: Bas Nieuwenhuizen
Fixes: 601093f95dd "xmlconfig: move into src/util"
Cc: Nicolai Hähnle
---
src/gallium/targets/d3dadapter9/Makefile.am | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/targets/d3dadapter9/Makefile.am
Eric Engestrom writes:
> From: Eric Engestrom
>
> CID: 1415909
> Fixes: 7a34a0e8903249c41fae "ra: Add a callback for selecting a register
> from what's available."
> Signed-off-by: Eric Engestrom
On 07/31/2017 06:43 PM, Adam Jackson wrote:
ARB_polygon_offset_clamp and ARB_texture_filter_anisotropic look like
they'd be pretty trivial to wire up.
And KHR_no_error is mostly done as well. :)
Reviewed-by: Samuel Pitoiset
Signed-off-by: Adam Jackson
https://bugs.freedesktop.org/show_bug.cgi?id=101981
--- Comment #3 from Samuel Pitoiset ---
Yeah, I have just sent a fix
https://lists.freedesktop.org/archives/mesa-dev/2017-July/164829.html
--
You are receiving this mail because:
You are the assignee for the bug.
Fixes: ddc32537d6 ("mesa: clamp viewport values only once when using
glViewport()")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101981
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101989
Signed-off-by: Samuel Pitoiset
---
src/mesa/main/viewport.c
---
src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512.inl | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512.inl
b/src/gallium/drivers/swr/rasterizer/common/simdlib_512_avx512.inl
index
Move AVX512BW specific intrinics to be Core-only.
Move some AVX512F intrinsics back to common implementation file.
---
.../drivers/swr/rasterizer/common/simdlib.hpp | 2 +
.../swr/rasterizer/common/simdlib_512_avx512.inl | 53 +
Rename to reflect global nature.
---
src/gallium/drivers/swr/rasterizer/core/frontend.cpp | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp
b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp
index
---
src/gallium/drivers/swr/Makefile.am| 2 +-
src/gallium/drivers/swr/Makefile.sources | 8 +
.../drivers/swr/rasterizer/common/simdlib.hpp | 21 ++-
.../swr/rasterizer/common/simdlib_128_avx512.inl | 108 +++-
Work in progress, disabled by default.
---
.../drivers/swr/rasterizer/core/frontend.cpp | 33
src/gallium/drivers/swr/rasterizer/core/knobs.h| 1 +
src/gallium/drivers/swr/rasterizer/core/state.h| 10 ++
.../drivers/swr/rasterizer/jitter/JitManager.cpp | 16 ++
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