On October 29, 2017 21:34:01 Timothy Arceri wrote:
On 29/10/17 12:58, Jason Ekstrand wrote:
On Sat, Oct 28, 2017 at 11:36 AM, Jason Ekstrand > wrote:
This series adds support for cross-stage optimizations in anv.
On 29/10/17 12:58, Jason Ekstrand wrote:
On Sat, Oct 28, 2017 at 11:36 AM, Jason Ekstrand > wrote:
This series adds support for cross-stage optimizations in anv.
There are a
few patches from Jordan's shader cache series in here
SaschaWillems Vulkan demo tessellation:
~4000fps -> ~4600fps
Reviewed-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_pipeline.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index
v2: update shader info input/output masks when pack components
Reviewed-by: Bas Nieuwenhuizen (v1)
---
src/compiler/nir/nir.h | 2 +
src/compiler/nir/nir_linking_helpers.c | 272 +
2 files changed, 274 insertions(+)
We can just call it once. Also a following patch will also introduce
link time component packing which modifies the outputs_written
bit mask, we want to avoid calling update_xfb_info() until after
packing is completed.
---
src/mesa/drivers/dri/i965/brw_link.cpp | 7 +--
1 file changed, 5
---
src/compiler/Makefile.sources | 1 +
src/compiler/nir/meson.build | 1 +
src/compiler/nir/nir.h | 1 +
src/compiler/nir/nir_lower_io_arrays_to_elements.c | 371 +
4 files changed, 374
---
src/amd/vulkan/radv_pipeline.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index c25642c9667..322cd7951b2 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1666,6 +1666,9 @@
shader-db results BDW:
total instructions in shared programs: 13192895 -> 13182437 (-0.08%)
instructions in affected programs: 827145 -> 816687 (-1.26%)
helped: 5199
HURT: 116
total cycles in shared programs: 539249342 -> 539156566 (-0.02%)
cycles in affected programs: 21894552 -> 21801776
This series adds a varying array splitting pass to the previous component
packing
series I sent out previously. This allows avoiding the workaround of calling
gather shader info twice since we can more easily keep the input/output bitmasks
in sync now that we don't need to worry about partial
---
src/compiler/nir/nir_linking_helpers.c | 61 +++---
1 file changed, 42 insertions(+), 19 deletions(-)
diff --git a/src/compiler/nir/nir_linking_helpers.c
b/src/compiler/nir/nir_linking_helpers.c
index 54ba1c85e58..4d709c1b3c5 100644
---
total instructions in shared programs: 13210579 -> 13199325 (-0.09%)
instructions in affected programs: 89043 -> 77789 (-12.64%)
helped: 430
HURT: 0
total cycles in shared programs: 539530190 -> 539493750 (-0.01%)
cycles in affected programs: 584860 -> 548420 (-6.23%)
helped: 437
HURT: 110
total
This will allow dead components of varyings to be removed.
BDW shader-db results:
total instructions in shared programs: 13190730 -> 13108459 (-0.62%)
instructions in affected programs: 2110903 -> 2028632 (-3.90%)
helped: 14043
HURT: 486
total cycles in shared programs: 541148990 -> 540544072
On Sun, Oct 22, 2017 at 9:07 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> The driver uses (and must use) the flushed flag of queries as a hint that
> it does not have to check for synchronization with currently queued up
> commands. Deferred
Rb
On October 29, 2017 3:06:28 PM PDT, Eric Engestrom wrote:
>I missed this part in my conversion, the old stream redirection meant
>the file was always created.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103496
>Fixes: 7088622e5fb506b64c90 "buildsys: move file
On 2017-10-29 01:11:32, Kenneth Graunke wrote:
> On Sunday, October 22, 2017 1:01:36 PM PDT Jordan Justen wrote:
> > If the i965 gen program cannot be loaded from the cache, then we
> > fallback to using a serialized nir program.
> >
> > This is based on "i965: add cache fallback support" by
https://bugs.freedesktop.org/show_bug.cgi?id=103505
--- Comment #3 from Matias N. Goldberg ---
Sounds similar to this bug 99591:
https://bugs.freedesktop.org/show_bug.cgi?id=99591
Try export LD_BIND_NOW=1 before running the Vulkan application. If that doesn't
work,
On 29/10/17 19:55, Pohjolainen, Topi wrote:
> On Thu, Oct 12, 2017 at 08:38:08PM +0200, Jose Maria Casanova Crespo wrote:
>> We enable the use of 16-bit values in push constants
>> modifying the assign_constant_locations function to work
>> with 16-bit types.
>>
>> The API to access buffers in
I missed this part in my conversion, the old stream redirection meant
the file was always created.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103496
Fixes: 7088622e5fb506b64c90 "buildsys: move file regeneration logic to
the script itself"
Signed-off-by: Eric Engestrom
https://bugs.freedesktop.org/show_bug.cgi?id=102573
--- Comment #10 from Matt Turner ---
(In reply to Bernd Kuhls from comment #9)
Open a new bug
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Good point. I'll drop this patch.
On October 29, 2017 05:10:01 Bas Nieuwenhuizen wrote:
Doesn't the old behavior also lower compact arrays even with modes = 0?
On Sat, Oct 28, 2017 at 8:36 PM, Jason Ekstrand wrote:
There's no point in
https://bugs.freedesktop.org/show_bug.cgi?id=103507
Felix Schwarz changed:
What|Removed |Added
CC|
https://bugs.freedesktop.org/show_bug.cgi?id=103507
--- Comment #3 from Felix Schwarz ---
bug 98832 might be a similar issue – that one is about the Radeon HD 6450. (You
have a slightly different model so it might make sense to keep both bugs.)
Maybe you can try to
On Thu, Oct 12, 2017 at 08:38:08PM +0200, Jose Maria Casanova Crespo wrote:
> We enable the use of 16-bit values in push constants
> modifying the assign_constant_locations function to work
> with 16-bit types.
>
> The API to access buffers in Vulkan use multiples of 4-byte for
> offsets and
https://bugs.freedesktop.org/show_bug.cgi?id=103505
--- Comment #2 from Valentin Novikov ---
(In reply to Bas Nieuwenhuizen from comment #1)
> So this seems like mesa 17.2.2?
>
> Can you get Vulka-Demos (https://github.com/SaschaWillems/Vulkan) and get a
> backtrace of one
https://bugs.freedesktop.org/show_bug.cgi?id=103507
--- Comment #2 from andre35...@yahoo.com ---
Created attachment 135155
--> https://bugs.freedesktop.org/attachment.cgi?id=135155=edit
dmesg output
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You are the
https://bugs.freedesktop.org/show_bug.cgi?id=103507
--- Comment #1 from andre35...@yahoo.com ---
Created attachment 135154
--> https://bugs.freedesktop.org/attachment.cgi?id=135154=edit
Picture of issue/monitor
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https://bugs.freedesktop.org/show_bug.cgi?id=103507
andre35...@yahoo.com changed:
What|Removed |Added
Summary|RGB colors across wake from |Wrong colors on screen when
https://bugs.freedesktop.org/show_bug.cgi?id=103507
Bug ID: 103507
Summary: RGB colors across wake from suspend
Product: Mesa
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=103506
Ilia Mirkin changed:
What|Removed |Added
Component|Other
https://bugs.freedesktop.org/show_bug.cgi?id=103506
Bug ID: 103506
Summary: Max core profile version: 0.0 in the
"Drivers/DRI/r300" component of the "Mesa"
Product: Mesa
Version: unspecified
Hardware: Other
https://bugs.freedesktop.org/show_bug.cgi?id=103505
Bas Nieuwenhuizen changed:
What|Removed |Added
Component|Mesa core
https://bugs.freedesktop.org/show_bug.cgi?id=103505
Bug ID: 103505
Summary: RX 480, newest mesa, VULKAN Does not start
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=102573
--- Comment #9 from Bernd Kuhls ---
Hi,
this patch breaks building mesa3d 17.2.3 with
Target: powerpc-ctng_e500v2-linux-gnuspe
gcc version 4.7.3 (crosstool-NG hg+-c65fcf8a34b7)
as reported by buildroot autobuilders:
Doesn't the old behavior also lower compact arrays even with modes = 0?
On Sat, Oct 28, 2017 at 8:36 PM, Jason Ekstrand wrote:
> There's no point in walking the program if 100% if we're never going to
> actually lower anything.
> ---
>
On Sunday, October 22, 2017 1:01:21 PM PDT Jordan Justen wrote:
> v3:
> * Rename serialized_nir* to driver_cache_blob*. (Tim)
>
> Signed-off-by: Jordan Justen
> Reviewed-by: Timothy Arceri
> ---
> src/compiler/glsl/shader_cache.cpp | 16
On Sunday, October 22, 2017 1:01:36 PM PDT Jordan Justen wrote:
> If the i965 gen program cannot be loaded from the cache, then we
> fallback to using a serialized nir program.
>
> This is based on "i965: add cache fallback support" by Timothy Arceri
> . Tim's
On Sunday, October 22, 2017 1:01:30 PM PDT Jordan Justen wrote:
> From: Timothy Arceri
>
> This enables the cache on vertex and fragment shaders only.
>
> v2:
> * Use MAYBE_UNUSED. (Matt)
>
> [jordan.l.jus...@intel.com: reword subject]
>
On Sunday, October 22, 2017 1:01:29 PM PDT Jordan Justen wrote:
> From: Timothy Arceri
>
> This uses the recently-added disk_cache.c to write out the final
> linked binary for vertex and fragment shader programs.
>
> This is based off the initial implementation
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