Re: [Mesa-dev] [PATCH] radv: drop assert on bindingDescriptorCount > 0

2018-03-08 Thread Samuel Pitoiset
Yeah, noticed that CTS fail this morning too. :) Reviewed-by: Samuel Pitoiset On 03/08/2018 01:16 AM, Dave Airlie wrote: From: Dave Airlie The spec is pretty clear that this can be 0, and that it operates as a reserved binding. Fixes: dEQP-VK.binding_model.descriptor_update.empty_descriptor

[Mesa-dev] [PATCH 00/11] Initial gl_spirv support in Mesa and i965

2018-03-08 Thread Alejandro Piñeiro
Hi, This is the 5rd version of the series adding initial support for ARB_gl_spirv. Although the development branch is bigger (more that 80 patches), as mentioned, we prefer to send small, self-contained series, to make the review process easier. This series is mostly equal to v4 except: * New v

[Mesa-dev] [PATCH 02/11] i965: initialize SPIR-V capabilities

2018-03-08 Thread Alejandro Piñeiro
Needed for ARB_gl_spirv. Right now those are the same that the intel vulkan driver, but those are not shared. From the ARB_spirv_extensions spec: "3. If a new GL extension is added that includes SPIR-V support via a new SPIR-V extension does it's SPIR-V extension also get enumerated by th

[Mesa-dev] [PATCH 04/11] nir/spirv: add gl_spirv_validation method

2018-03-08 Thread Alejandro Piñeiro
ARB_gl_spirv adds the ability to use SPIR-V binaries, and a new method, glSpecializeShader. From OpenGL 4.6 spec, section 7.2.1 "Shader Specialization", error table: INVALID_VALUE is generated if does not name a valid entry point for . INVALID_VALUE is generated if any element

[Mesa-dev] [PATCH 01/11] mesa: add gl_constants::SpirVCapabilities

2018-03-08 Thread Alejandro Piñeiro
From: Nicolai Hähnle For drivers to declare which SPIR-V features they support. v2: Don't use a pointer (Ian Romanick) --- src/mesa/main/mtypes.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index 2df2288899d..463c2696c38 100644 --- a/sr

[Mesa-dev] [PATCH 03/11] spirv: add vtn_builder_create

2018-03-08 Thread Alejandro Piñeiro
Refactored from spirv_to_nir, in order to be reused later. --- src/compiler/spirv/spirv_to_nir.c | 48 ++- src/compiler/spirv/vtn_private.h | 4 2 files changed, 36 insertions(+), 16 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/comp

[Mesa-dev] [PATCH 05/11] mesa: Implement glSpecializeShaderARB

2018-03-08 Thread Alejandro Piñeiro
From: Nicolai Hähnle v2: * Use gl_spirv_validation instead of spirv_to_nir. This method just validates the shader. The conversion to NIR will happen later, during linking. (Alejandro Piñeiro) * Use gl_shader_spirv_data struct to store the SPIR-V data. (Eduardo Lima) * Use the '

[Mesa-dev] [PATCH 09/11] mesa/glspirv: Add a _mesa_spirv_to_nir() function

2018-03-08 Thread Alejandro Piñeiro
From: Eduardo Lima Mitev This is basically a wrapper around spirv_to_nir() that includes arguments setup and post-conversion validation. v2: * Rebase update (SpirVCapabilities not a pointer anymore, spirv_to_nir_options added, and others). * Code-style improvements and remove debug hunk.

[Mesa-dev] [PATCH 11/11] i965: Don't call process_glsl_ir() for SPIR-V shaders

2018-03-08 Thread Alejandro Piñeiro
From: Eduardo Lima Mitev v2: Use 'spirv_data' from gl_linked_shader instead, to check if shader is SPIR-V. (Timothy Arceri) Reviewed-by: Timothy Arceri --- src/mesa/drivers/dri/i965/brw_link.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/

[Mesa-dev] [PATCH 06/11] mesa: Add a reference to gl_shader_spirv_data to gl_linked_shader

2018-03-08 Thread Alejandro Piñeiro
From: Eduardo Lima Mitev This is a reference to the spirv_data object stored in gl_shader, which stores shader SPIR-V data that is needed during linking too. Reviewed-by: Timothy Arceri --- src/mesa/main/mtypes.h| 8 src/mesa/main/shaderobj.c | 1 + 2 files changed, 9 insertions(+

[Mesa-dev] [PATCH 10/11] i965: Call spirv_to_nir() instead of glsl_to_nir() for SPIR-V shaders

2018-03-08 Thread Alejandro Piñeiro
From: Eduardo Lima Mitev This is the main fork of the shader compilation code-path, where a NIR shader is obtained by calling spirv_to_nir() or glsl_to_nir(), depending on its nature.. v2: Use 'spirv_data' member from gl_linked_shader to know which method to call. (Timothy Arceri) Reviewed-b

[Mesa-dev] [PATCH 08/11] mesa/program: Link SPIR-V shaders using the SPIR-V code-path

2018-03-08 Thread Alejandro Piñeiro
From: Eduardo Lima Mitev --- src/mesa/program/ir_to_mesa.cpp | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 74089605029..4d45b0a4cd5 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/progr

[Mesa-dev] [PATCH 07/11] mesa/glspirv: Add _mesa_spirv_link_shaders() function

2018-03-08 Thread Alejandro Piñeiro
From: Eduardo Lima Mitev This is the equivalent to link_shaders() from src/compiler/glsl/linker.cpp, but for SPIR-V programs. It just creates the program and its gl_linked_shader objects, giving drivers the opportunity to implement any linking of SPIR-V shaders they choose, at a later stage. v2:

[Mesa-dev] [PATCH] radv: don't lower indirects until after opts have run

2018-03-08 Thread Timothy Arceri
Noticed while passing by. nNot sure if it impacts anything, but likely to impact GFX9 more than anything else since we lower inputs, outputs and locals there. --- src/amd/vulkan/radv_shader.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_shader.c

Re: [Mesa-dev] [PATCH] radv: don't lower indirects until after opts have run

2018-03-08 Thread Bas Nieuwenhuizen
On Thu, Mar 8, 2018 at 9:37 AM, Timothy Arceri wrote: > Noticed while passing by. nNot sure if it impacts anything, but > likely to impact GFX9 more than anything else since we lower > inputs, outputs and locals there. > --- > src/amd/vulkan/radv_shader.c | 10 +- > 1 file changed, 9 inse

Re: [Mesa-dev] [PATCH 00/56] anv: Add support for Vulkan 1.1

2018-03-08 Thread Iago Toral
Thanks for the kind words Jason, this is a superb achievement and we are very proud to had the chance to work on this with you! Iago On Wed, 2018-03-07 at 15:08 -0800, Jason Ekstrand wrote: > Hi all, > > I just wanted to give a shout out and a huge "Thank You!" to all of > the people who made this

Re: [Mesa-dev] [PATCH 1/2] etnaviv: add query_group_info for sw counters

2018-03-08 Thread Lucas Stach
Am Montag, den 05.03.2018, 23:26 +0100 schrieb Christian Gmeiner: > Signed-off-by: Christian Gmeiner Reviewed-by: Lucas Stach > --- >  src/gallium/drivers/etnaviv/etnaviv_query_sw.c | 30 > -- >  src/gallium/drivers/etnaviv/etnaviv_query_sw.h |  5 + >  2 files change

Re: [Mesa-dev] [PATCH 2/2] etnaviv: add get_driver_query_group_info(..)

2018-03-08 Thread Lucas Stach
Am Montag, den 05.03.2018, 23:26 +0100 schrieb Christian Gmeiner: > This enables AMD_performance_monitor extension. > > Signed-off-by: Christian Gmeiner Reviewed-by: Lucas Stach > --- >  src/gallium/drivers/etnaviv/etnaviv_query.c | 13 + >  1 file changed, 13 insertions(+) > > dif

[Mesa-dev] [PATCH] etnaviv: allow mixing different bit depths for color and depth surfaces

2018-03-08 Thread Lucas Stach
Vivante hardware supports this just fine. There is no reason why this shouldn't be advertised as a valid combination. Signed-off-by: Lucas Stach --- src/gallium/drivers/etnaviv/etnaviv_screen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/etnaviv/etnavi

Re: [Mesa-dev] [PATCH 1/5] radeonsi: align command buffer starting address to fix some Raven hangs

2018-03-08 Thread Christian König
Am 07.03.2018 um 21:34 schrieb Marek Olšák: From: Marek Olšák Cc: 17.3 18.0 Reviewed-by: Christian König . --- src/amd/common/ac_gpu_info.c | 21 - src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_pm4.c

Re: [Mesa-dev] [PATCH 3/5] winsys/amdgpu: pad compute rings

2018-03-08 Thread Christian König
Am 07.03.2018 um 21:34 schrieb Marek Olšák: From: Marek Olšák --- src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index d9a95c0..9cd3343 100644 --- a/src/g

Re: [Mesa-dev] [PATCH 2/5] radeonsi: expand constbuf 0 address correctly to fix Vega10 hangs

2018-03-08 Thread Christian König
Am 07.03.2018 um 21:34 schrieb Marek Olšák: From: Marek Olšák This is only required with the latest libdrm. This fixes 32-bit support with high addresses. (and possibly 64-bit support too because the high bits need to be masked out) Acked-by: Christian König --- src/gallium/drivers/rade

Re: [Mesa-dev] [PATCH v4 04/20] clover: Remove the TGSI backend as unused

2018-03-08 Thread Karol Herbst
Reviewed-by: Karol Herbst On Thu, Mar 8, 2018 at 1:21 AM, Pierre Moreau wrote: > Signed-off-by: Pierre Moreau > --- > src/gallium/state_trackers/clover/Makefile.am | 11 +- > src/gallium/state_trackers/clover/Makefile.sources | 4 - > src/gallium/state_trackers/clover/core/program.cpp

Re: [Mesa-dev] [PATCH v4 05/20] clover: Add an helper for checking if an IR is supported

2018-03-08 Thread Karol Herbst
Reviewed-by: Karol Herbst On Thu, Mar 8, 2018 at 1:21 AM, Pierre Moreau wrote: > Reviewed-by: Aaron Watry > Signed-off-by: Pierre Moreau > --- > > Notes: > v3: > * Dropped supported_irs() (Francisco Jerez) > * Changed supports_ir() argument type to `enum pipe_shader_ir` (Francisco

Re: [Mesa-dev] [PATCH v4 06/20] clover/device: Replace usage of "1 << PIPE_SHADER_IR_*" with supports_ir

2018-03-08 Thread Karol Herbst
Reviewed-by: Karol Herbst On Thu, Mar 8, 2018 at 1:21 AM, Pierre Moreau wrote: > Reviewed-by: Aaron Watry > Signed-off-by: Pierre Moreau > --- > src/gallium/state_trackers/clover/core/device.cpp | 6 +- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/src/gallium/state_tr

Re: [Mesa-dev] [PATCH v4 13/20] configure.ac, meson: Check for SPIRV-Tools and llvm-spirv

2018-03-08 Thread Karol Herbst
I think it would be valuable to put some comment on what kind of llvm-spirv we really need. I know the situation isn't perfect. Link to your branch or something should be good enough. With that: Reviewed-by: Karol Herbst On Thu, Mar 8, 2018 at 1:21 AM, Pierre Moreau wrote: > Signed-off-by: Pie

Re: [Mesa-dev] [PATCH v4 18/20] clover/api: Implement CL_DEVICE_IL_VERSION

2018-03-08 Thread Karol Herbst
Reviewed-by: Karol Herbst On Thu, Mar 8, 2018 at 1:21 AM, Pierre Moreau wrote: > Signed-off-by: Pierre Moreau > --- > > Notes: > Changes in v4: Use the core define instead of the extension one (Karol > Herbst) > > v3: Throw an exception if the cl_khr_il_program extension is not support

Re: [Mesa-dev] [PATCH v4 20/20] clover: Implement clCreateProgramWithIL from OpenCL 2.1

2018-03-08 Thread Karol Herbst
Reviewed-by: Karol Herbst On Thu, Mar 8, 2018 at 1:21 AM, Pierre Moreau wrote: > Signed-off-by: Pierre Moreau > --- > > Notes: > v3: Remove the const from the length argument of clCreateProgramWithIL > > src/gallium/state_trackers/clover/api/dispatch.cpp | 2 +- > src/gallium/state_tracker

Re: [Mesa-dev] [PATCH v4 19/20] clover: Advertise cl_khr_il_program

2018-03-08 Thread Karol Herbst
Reviewed-by: Karol Herbst On Thu, Mar 8, 2018 at 1:21 AM, Pierre Moreau wrote: > Signed-off-by: Pierre Moreau > --- > > Notes: > Changes in v4: do not advertise SPIR-V support if CLOVER_ALLOW_SPIRV is > not defined > > v3: Advertise cl_khr_il_program if if the device support NATIVE as

Re: [Mesa-dev] [PATCH 00/56] anv: Add support for Vulkan 1.1

2018-03-08 Thread Lionel Landwerlin
Many thanks to you Jason! On Wed, Mar 7, 2018 at 11:08 PM, Jason Ekstrand wrote: > Hi all, > > I just wanted to give a shout out and a huge "Thank You!" to all of the > people who made this release possible. There were a large number of > features packed into the 1.1 release and implementing it

[Mesa-dev] [Bug 105171] performance regression (3x slower) running glamor with PutImage workload (radeonsi)

2018-03-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=105171 --- Comment #6 from Clemens Eisserer --- Strange, after tinkering around with my system, I cannot reproduce the issue anymore. Even with Mesa-17.3.x x11perf -shnmput10 is now at ~70-80kOps/s - so maybe it was a configuration issue that was someh

[Mesa-dev] [Bug 105171] performance regression (3x slower) running glamor with PutImage workload (radeonsi)

2018-03-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=105171 --- Comment #7 from Michel Dänzer --- (In reply to Clemens Eisserer from comment #6) > This still leaves the question to be answered, how/why the nvidia blob can > be magnitudes faster for XPutImage based workloads. If somebody wants to improve

Re: [Mesa-dev] [PATCH mesa 01/21] vulkan: Add KHR_display extension using DRM [v4]

2018-03-08 Thread Eric Engestrom
On Wednesday, 2018-03-07 23:24:59 -0800, Keith Packard wrote: > This adds support for the KHR_display extension support to the vulkan > WSI layer. Driver support will be added separately. > > v2: > * fix double ;; in wsi_common_display.c > > * Move mode list from wsi_display to wsi_di

[Mesa-dev] [Bug 105171] performance regression (3x slower) running glamor with PutImage workload (radeonsi)

2018-03-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=105171 --- Comment #8 from Clemens Eisserer --- > If somebody wants to improve this, > the place to start is probably glamor rather than the drivers. I wonder, what could glamor do better (especially for small uploads) than call into glTexSubImage2D?

[Mesa-dev] [Bug 105396] tc compatible htile sets depth of htiles of discarded fragments to 1.0

2018-03-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=105396 Bug ID: 105396 Summary: tc compatible htile sets depth of htiles of discarded fragments to 1.0 Product: Mesa Version: git Hardware: Other OS: All

[Mesa-dev] [Bug 105396] tc compatible htile sets depth of htiles of discarded fragments to 1.0

2018-03-08 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=105396 --- Comment #1 from James Legg --- Created attachment 137888 --> https://bugs.freedesktop.org/attachment.cgi?id=137888&action=edit Source for application used in RenderDoc frame capture -- You are receiving this mail because: You are the QA

Re: [Mesa-dev] [PATCH] glx/apple: Ship meson build file in tarball

2018-03-08 Thread Thierry Reding
On Wed, Mar 07, 2018 at 10:08:59AM -0800, Dylan Baker wrote: > Quoting Thierry Reding (2018-03-07 07:55:37) > > From: Thierry Reding > > > > The meson build file for Apple GLX is not listed in the EXTRA_DIST make > > variable and therefore isn't shipped as part of the release tarball, so > > meso

Re: [Mesa-dev] [Mesa-stable] [PATCH] [RFC] gallivm: Use new LLVM fast-math-flags API

2018-03-08 Thread Emil Velikov
[Adding Andres, Juan since they'll be doing the next 17.3] On 7 March 2018 at 16:35, Marek Olšák wrote: > I can test piglit+CTS+deqp on the GPU that I have. (currently Polaris12) > Yes please - that sounds great. If we have more than one device that would be amazing. FTR the Lunarg team seems to

Re: [Mesa-dev] [PATCH 00/56] anv: Add support for Vulkan 1.1

2018-03-08 Thread Samuel Iglesias Gonsálvez
Thanks a lot Jason! As Iago said, we are pleased to had the opportunity to work with you on this :-D Sam On 08/03/18 00:08, Jason Ekstrand wrote: > Hi all, > > I just wanted to give a shout out and a huge "Thank You!" to all of > the people who made this release possible.  There were a large num

Re: [Mesa-dev] [PATCH v4 4/6] nouveau: Add framebuffer modifier support

2018-03-08 Thread Thierry Reding
On Wed, Mar 07, 2018 at 01:15:35PM -0500, Ilia Mirkin wrote: > On Wed, Mar 7, 2018 at 10:53 AM, Thierry Reding > wrote: > > From: Thierry Reding > > > > This adds support for framebuffer modifiers to Nouveau. This will be > > used by the Tegra driver to share metadata about the format of buffers

Re: [Mesa-dev] [Mesa-stable] [PATCH] program: Don't reset SamplersValidated when restoring from shader cache

2018-03-08 Thread Juan A. Suarez Romero
On Tue, 2018-02-20 at 13:47 -0800, Jordan Justen wrote: > On 2018-02-20 06:46:24, Andres Gomez wrote: > > Jordan, this looks like a good candidate to nominate for inclusion in > > the 17.3 stable queue. > > > > What do you think? > > I saw this on i965, which does not have shader cache support in

[Mesa-dev] [PATCH] radv: Unset ZRANGE_PRECISION when depth was zeroed

2018-03-08 Thread James Legg
This avoids bug 105396 somehow. I suspect it is a VI and GFX9 hardware bug which PAL calls WaTcCompatZRange, but I don't know for sure. In the VK_FORMAT_D32_SFLOAT case, TILE_STENCIL_DISABLE is not set for tc compatible image formats regardless of not having a stencil aspect. If TILE_STENCIL_DISAB

Re: [Mesa-dev] [Mesa-stable] [PATCH] i965/vec4: use a temp register to compute offsets for pull loads

2018-03-08 Thread Juan A. Suarez Romero
On Wed, 2018-02-21 at 08:40 +0100, Iago Toral wrote: > Yes, I agree, thanks for bringing it up. > > Iago > Thanks. I'm including it in next 17.3 release. BTW, this patch was also included in 17.2.8. J.A. > On Tue, 2018-02-20 at 16:38 +0200, Andres Gomez wrote: > > Iago, this looks l

Re: [Mesa-dev] [PATCH 07/16] radv: Implement VK_KHR_maintenance3.

2018-03-08 Thread Emil Velikov
On 7 March 2018 at 19:56, Emil Velikov wrote: > On 7 March 2018 at 18:32, Bas Nieuwenhuizen wrote: > >>> >>> Missing break? >> >> So much for the tests ... >> > Speaking of tests, I hope they check that both KHR and non KHR > annotated functions (the ones changed in 04/16) are tested. > We don't

[Mesa-dev] [PATCH v4 1/3] i965: define astx5x5 workaround infrastructure

2018-03-08 Thread kevin . rogovin
From: Kevin Rogovin Gen9 GPU's suffer from a HW bug where the GPU will hang if the GPU accesses a texture with a an auxilary buffer and an ASTC5x5 texture without having a pipeline cs stall (and texture cache flush) between such accesses. This patch creates the infrastucture to track such potenti

[Mesa-dev] [PATCH v4 3/3] i965: ASTC5x5 workaround logic for blorp

2018-03-08 Thread kevin . rogovin
From: Kevin Rogovin Signed-off-by: Kevin Rogovin --- src/intel/blorp/blorp.c | 16 src/intel/blorp/blorp.h | 6 ++ src/mesa/drivers/dri/i965/genX_blorp_exec.c | 9 + 3 files changed, 31 insertions(+) diff --git a/src/intel/

[Mesa-dev] [PATCH v4 0/3] i965: ASTC5x5 workaround

2018-03-08 Thread kevin . rogovin
From: Kevin Rogovin This patch series implements a needed workaround for Gen9 for ASTC5x5 sampler reads. The crux of the work around is to make sure that the sampler does not read an ASTC5x5 texture and a surface with an auxilary buffer without having a texture cache invalidate and command stream

[Mesa-dev] [PATCH v4 2/3] i965: prevent using auxilary buffers when an astc5x5 texture is present

2018-03-08 Thread kevin . rogovin
From: Kevin Rogovin If ASTC5x5 textures are present, resolve all textures that the sampler accesses so that auxilary buffer is unneeded when the astc5x5 workaround is needed and also program the sampler state to not use the auxilary buffer as well. Signed-off-by: Kevin Rogovin --- src/mesa/dri

[Mesa-dev] [PATCH v5 3/6] nouveau/nvc0: Extract common tile mode macro

2018-03-08 Thread Thierry Reding
From: Thierry Reding Add a new macro that can be used to extract the tiling mode from a tile_mode value. This is will be used to determine the number of GOBs used in block linear mode. Acked-by: Emil Velikov Tested-by: Andre Heider Signed-off-by: Thierry Reding --- src/gallium/drivers/nouvea

[Mesa-dev] [PATCH v5 2/6] drm/tegra: Sanitize format modifiers

2018-03-08 Thread Thierry Reding
From: Thierry Reding The existing format modifier definitions were merged prematurely, and recent work has unveiled that the definitions are suboptimal in several ways: - The format specifiers, except for one, are not Tegra specific, but the names don't reflect that. - The number space i

[Mesa-dev] [PATCH v5 1/6] drm/fourcc: Fix fourcc_mod_code() definition

2018-03-08 Thread Thierry Reding
From: Thierry Reding Avoid a compiler warnings when the val parameter is an expression. This is based on commit 5843f4e02fbe86a59981e35adc6cabebee46fdc0 from Linux v4.16-rc1. Acked-by: Emil Velikov Tested-by: Andre Heider Signed-off-by: Thierry Reding --- include/drm-uapi/drm_fourcc.h | 2 +

[Mesa-dev] [PATCH v5 4/6] nouveau: Add framebuffer modifier support

2018-03-08 Thread Thierry Reding
From: Thierry Reding This adds support for framebuffer modifiers to Nouveau. This will be used by the Tegra driver to share metadata about the format of buffers (such as the tiling mode or compression). Changes in v2: - remove unused parameters to nouveau_buffer_create() - move format modifier q

[Mesa-dev] [PATCH v5 0/6] NVIDIA Tegra support

2018-03-08 Thread Thierry Reding
From: Thierry Reding This series of patches implements initial support for Tegra. The first two patches import DRM UAPI from v4.16-rc1 that provides framebuffer modifiers that can be used to specify buffers shared between Nouveau and the Tegra DRM driver. Patches 3 and 4 add support for framebuf

[Mesa-dev] [PATCH v5 5/6] tegra: Initial support

2018-03-08 Thread Thierry Reding
Tegra K1 and later use a GPU that can be driven by the Nouveau driver. But the GPU is a pure render node and has no display engine, hence the scanout needs to happen on the Tegra display hardware. The GPU and the display engine each have a separate DRM device node exposed by the kernel. To make th

[Mesa-dev] [PATCH v5 6/6] autotools: Add tegra to AM_DISTCHECK_CONFIGURE_FLAGS

2018-03-08 Thread Thierry Reding
From: Thierry Reding This allows the driver to be built on a make distcheck and makes sure that it properly builds when a distribution tarball is made. Suggested-by: Emil Velikov Signed-off-by: Thierry Reding --- Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/

Re: [Mesa-dev] [RFC 0/6] Remove stubbed GLX_SGIX_swap_{barrier, group}

2018-03-08 Thread Emil Velikov
On 5 March 2018 at 19:08, Ian Romanick wrote: > On 03/05/2018 10:48 AM, Emil Velikov wrote: >> Hi all, >> >> It seems like these two extensions were never implemented or advertised. >> Be that in: >> - glx/dri >> - glx/apple >> - classic xlib-glx >> - gallium xlib-glx >> >> Yet, the entry poin

[Mesa-dev] [RFC PATCH 1/9] ac/shader: scan input interp mode and location

2018-03-08 Thread Samuel Pitoiset
Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 9 ++--- src/amd/common/ac_shader_info.c | 12 src/amd/common/ac_shader_info.h | 2 ++ 3 files changed, 16 insertions(+), 7 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to

[Mesa-dev] [RFC PATCH 6/9] ac/shader: scan if shaders use discard (or kill) instructions

2018-03-08 Thread Samuel Pitoiset
Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_shader_info.c | 4 src/amd/common/ac_shader_info.h | 1 + 2 files changed, 5 insertions(+) diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c index fad4245986..c495879280 100644 --- a/src/amd/common/ac_shader_i

[Mesa-dev] [RFC PATCH 3/9] ac/shader: count the number of input PS interp

2018-03-08 Thread Samuel Pitoiset
This adds a new level of gathering ("post-analysis") because we have to bump the number of interp when the layer is needed. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 1 - src/amd/common/ac_nir_to_llvm.h | 1 - src/amd/common/ac_shader_info.c | 35

[Mesa-dev] [RFC PATCH 2/9] ac/shader: scan uses_persp_{centroid, center}

2018-03-08 Thread Samuel Pitoiset
This allows us to remove one nir_foreach_variable loop. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 16 ++-- src/amd/common/ac_shader_info.c | 11 --- src/amd/common/ac_shader_info.h | 2 ++ 3 files changed, 12 insertions(+), 17 deletions(-) diff --

[Mesa-dev] [RFC PATCH 7/9] ac/shader: scan if shaders use derivatives texture instructions

2018-03-08 Thread Samuel Pitoiset
Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_shader_info.c | 30 ++ src/amd/common/ac_shader_info.h | 1 + 2 files changed, 31 insertions(+) diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c index c495879280..55b87cb96a 100644 ---

[Mesa-dev] [RFC PATCH 9/9] ac/nir: do not always preload PS inputs at beginning

2018-03-08 Thread Samuel Pitoiset
RadeonSI does something similar, the VGPRs decrease is a win but not sure if we really want to implement that. Polaris10: Totals from affected shaders: SGPRS: 116376 -> 116768 (0.34 %) VGPRS: 76556 -> 74868 (-2.20 %) Spilled SGPRs: 10347 -> 10466 (1.15 %) Code Size: 072 -> 5569024 (0.25 %) byt

[Mesa-dev] [RFC PATCH 5/9] ac/shader: scan flat_shaded_mask

2018-03-08 Thread Samuel Pitoiset
This changes how we index flat_shaded_mask for generic varyings, now it's based on location and not on ps_offset. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 2 -- src/amd/common/ac_nir_to_llvm.h | 1 - src/amd/common/ac_shader_info.c | 5 + src/amd/common/ac_shader_

[Mesa-dev] [RFC PATCH 4/9] ac/shader: scan the input fragment shader masks

2018-03-08 Thread Samuel Pitoiset
Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 9 + src/amd/common/ac_nir_to_llvm.h | 1 - src/amd/common/ac_shader_info.c | 5 + src/amd/common/ac_shader_info.h | 2 ++ src/amd/vulkan/radv_pipeline.c | 4 ++-- 5 files changed, 10 insertions(+), 11 deletions(-)

[Mesa-dev] [RFC PATCH 8/9] ac/nir: rework handling of the interpolation parameters

2018-03-08 Thread Samuel Pitoiset
Using the input_interp_{mode,loc} arrays which are filled in ac_shader_info. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 23 --- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_

Re: [Mesa-dev] [RFC 0/6] Remove stubbed GLX_SGIX_swap_{barrier, group}

2018-03-08 Thread Emil Velikov
On 5 March 2018 at 21:05, Brian Paul wrote: > > I'm fine with removing them too. If someone really complains, they can > always be restored. > Seriously doubt it'll happen, yet I fully agree. Small correction: only the Xlib based libGLs expose the API. I'll add a note in the release notes, just

[Mesa-dev] [PATCH 1/2] nir: add nir_opt_move_load_ubo() optimization pass

2018-03-08 Thread Samuel Pitoiset
This pass moves load UBO operations just before their first use, loosely based on nir_opt_move_comparisons. Signed-off-by: Samuel Pitoiset --- src/compiler/Makefile.sources| 1 + src/compiler/nir/meson.build | 1 + src/compiler/nir/nir.h | 2 + src

[Mesa-dev] [PATCH 2/2] radv: run nir_opt_move_load_ubo

2018-03-08 Thread Samuel Pitoiset
Polaris10: Totals from affected shaders: SGPRS: 106656 -> 105952 (-0.66 %) VGPRS: 73464 -> 73400 (-0.09 %) Spilled SGPRs: 7121 -> 6861 (-3.65 %) Code Size: 4157792 -> 4158716 (0.02 %) bytes Max Waves: 9316 -> 9330 (0.15 %) Vega10: Totals from affected shaders: SGPRS: 106720 -> 106032 (-0.64 %) VGP

[Mesa-dev] [v4 PATCH 1/6] spirv_extensions: add GL_ARB_spirv_extensions boilerplate

2018-03-08 Thread Alejandro Piñeiro
v2: * Mention extension gap at gl_API.xml (Emil Velikov) * Bail with INVALID_ENUM if extension not available on getStringi (Emil Velikov) * Use EXTRA_EXT macro when defining the extension at get.c/get_hash_params.py (Emil Velikov) * Rename source files (spirvextensions.[ch] -> spirv_ex

[Mesa-dev] [PATCH 2/6] spirv/radv: add AMD_gcn_shader capability, remove current extensions

2018-03-08 Thread Alejandro Piñeiro
So now, during spirv_to_nir, it uses the capability instead of the extension. Note that we are really doing here is treating SPV_AMD_gcn_shader as other supported extensions. SPV_AMD_gcn_shader is not the first SPV extension supported. For example, the capability draw_parameters infers if the exten

[Mesa-dev] [v5 PATCH 0/6] ARB_spirv_extensions support in Mesa and i965

2018-03-08 Thread Alejandro Piñeiro
Hi, This series is the latest version of the support for ARB_spirv_extensions on i965. The patches are basically the same that v4 series we sent some time ago. This is rebased against master and updated due the changes for the support of SPV_AMD_gcn_shader (sorry for missing that one). So it inclu

[Mesa-dev] [v4 PATCH 3/6] spirv_extensions: add list of extensions and to_string method

2018-03-08 Thread Alejandro Piñeiro
Ideally this should be generated somehow. One option would be gather all the extension dependencies listed on the core grammar, but there would be the possibility of not including some of the extensions. Note that spirv-tools is doing it just slightly better, as it has a hardcoded list of extensio

[Mesa-dev] [v4 PATCH 4/6] spirv_extensions: define spirv_extensions_supported

2018-03-08 Thread Alejandro Piñeiro
Add a struct to maintain which SPIR-V extensions are supported, and an utility method to initialize it based on nir_spirv_supported_capabilities. v2: * Fixing code style (Ian Romanick) * Adding a prefix (spirv) to fill_supported_spirv_extensions (Ian Romanick) v3: rebase update (nir_spirv_sup

[Mesa-dev] [v2 PATCH 5/6] spirv_extensions: add spirv_supported_extensions on gl_constants

2018-03-08 Thread Alejandro Piñeiro
We can use it to get real values for ARB_spirv_extensions methods. v2: Rebase update after changes on previous patches. --- src/mesa/main/mtypes.h | 3 +++ src/mesa/main/spirv_extensions.c | 20 +++- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/src/mes

[Mesa-dev] [v2 PATCH 6/6] spirv_extensions: i965: initialize SPIR-V extensions

2018-03-08 Thread Alejandro Piñeiro
v2: Rebase update after changes on previous patches. --- src/mesa/drivers/dri/i965/brw_context.c | 10 +- src/mesa/main/context.c | 2 ++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw

[Mesa-dev] [PATCH v2 00/18] nir/vtn/compiler: first batch of compute support

2018-03-08 Thread Karol Herbst
first series here: https://lists.freedesktop.org/archives/mesa-dev/2018-February/187275.html change summery since v1: * removed 64 bit shift patch * reworked new intrinsics * fixed some int8/uint8 issues * add handling for CL types * add support for lowering loading kernel args in nir_lower_i

[Mesa-dev] [PATCH v2 02/18] nir/vtn: Use imov where we might have 8 bit types

2018-03-08 Thread Karol Herbst
From: Rob Clark Otherwise nir_validate may complain about 8 bit floats, which do not exist. Signed-off-by: Karol Herbst --- src/compiler/spirv/spirv_to_nir.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to

[Mesa-dev] [PATCH v2 05/18] nir: add load/store_global intrinsics

2018-03-08 Thread Karol Herbst
OpenCL kernels have raw pointers to global memory, so we need instructions to load/store in order to dereference these pointers. In some ways similar to other load/store intrinsics, but rather than taking an offset as a src argument, they take a raw pointer value (which can be 32b or 64b depending

[Mesa-dev] [PATCH v2 03/18] vtn: handle SpvExecutionModelKernel

2018-03-08 Thread Karol Herbst
Signed-off-by: Karol Herbst --- src/compiler/spirv/spirv_to_nir.c | 3 +++ src/compiler/spirv/vtn_private.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 48ade2c1ca..c5c4da853e 100644 --- a/src/compiler/spirv/s

[Mesa-dev] [PATCH v2 04/18] nir: kernel entrypoints can have arguments

2018-03-08 Thread Karol Herbst
From: Rob Clark This assert is not valid for OpenCL kernels. TODO can we somehow conditionally assert based on glsl vs cl?? Signed-off-by: Rob Clark Signed-off-by: Karol Herbst --- src/compiler/nir/nir.h | 1 - 1 file changed, 1 deletion(-) diff --git a/src/compiler/nir/nir.h b/src/compiler

[Mesa-dev] [PATCH v2 01/18] compiler: int8/uint8 support

2018-03-08 Thread Karol Herbst
OpenCL kernels also have int8/uint8. v2: remove changes in nir_search as Jason posted a patch for that Reviewed-by: Jason Ekstrand Signed-off-by: Rob Clark Signed-off-by: Karol Herbst --- src/compiler/builtin_type_macros.h | 10 src/compiler/glsl/ast_to_hir.cpp

[Mesa-dev] [PATCH v2 07/18] nir/vtn: handle WorkGroupSize for kernels

2018-03-08 Thread Karol Herbst
From: Rob Clark Unlike glsl/vk compute shaders, this isn't a builtin constant. Signed-off-by: Rob Clark Signed-off-by: Karol Herbst --- src/compiler/spirv/vtn_variables.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/compiler/spirv/vtn_variables.c b/src/compil

[Mesa-dev] [PATCH v2 08/18] nir/vtn: add OpLifetime*

2018-03-08 Thread Karol Herbst
From: Rob Clark These are just hints so we can ignore them. Signed-off-by: Rob Clark Signed-off-by: Karol Herbst --- src/compiler/spirv/spirv_to_nir.c | 4 1 file changed, 4 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index c5c4da853

[Mesa-dev] [PATCH v2 10/18] nir/vtn: print extension name in fail msg

2018-03-08 Thread Karol Herbst
From: Rob Clark Signed-off-by: Rob Clark Signed-off-by: Karol Herbst --- src/compiler/spirv/spirv_to_nir.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 6c4d28cddc..2e74e634eb 100644 --- a/s

[Mesa-dev] [PATCH v2 11/18] nir/vtn: implement BuiltInGlobalSize

2018-03-08 Thread Karol Herbst
Signed-off-by: Rob Clark Signed-off-by: Karol Herbst --- src/compiler/nir/nir_lower_system_values.c | 8 src/compiler/shader_enums.c| 1 + src/compiler/shader_enums.h| 2 ++ src/compiler/spirv/vtn_variables.c | 4 4 files changed, 15 insertio

[Mesa-dev] [PATCH v2 13/18] RFC: nir/vtn: "raw" pointer support

2018-03-08 Thread Karol Herbst
From: Rob Clark An attempt to add physical pointer support to vtn. I'm not totally happy about the handling of logical pointers vs physical pointers. So this is really more of an RFS (request for suggestions) v2: treat vec3 types as vec4 when dereferencing Signed-off-by: Karol Herbst --- src

[Mesa-dev] [PATCH v2 09/18] nir/vtn: add OpConvertPtrToU

2018-03-08 Thread Karol Herbst
From: Rob Clark Signed-off-by: Rob Clark Signed-off-by: Karol Herbst --- src/compiler/spirv/vtn_alu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c index d0c9e31693..9397240912 100644 --- a/src/compiler/spirv/vtn_alu.c +++ b/src

[Mesa-dev] [PATCH v2 14/18] glsl: add packed for struct types

2018-03-08 Thread Karol Herbst
We need this for OpenCL kernels because we have to apply C rules for alignment and padding inside structs and for this we also have to know if a struct is packed or not. Signed-off-by: Karol Herbst --- src/compiler/glsl_types.cpp | 17 +++-- src/compiler/glsl_types.h |

[Mesa-dev] [PATCH v2 17/18] nir: add load_kernel_param

2018-03-08 Thread Karol Herbst
OpenCL kernels have parameters (see pipe_grid_info::input), and so we need a way to access them. The offset source is the offset of the parameter to load in the kernel input buffer. v2: improve commit message remove BASE split lower_io changes into separate commit Signed-off-by: Karol He

[Mesa-dev] [PATCH v2 16/18] RFC glsl: add cl_size and cl_alignment

2018-03-08 Thread Karol Herbst
Signed-off-by: Karol Herbst --- src/compiler/glsl_types.cpp | 48 + src/compiler/glsl_types.h | 10 ++ src/compiler/nir_types.cpp | 12 src/compiler/nir_types.h| 4 4 files changed, 74 insertions(+) diff --git a/src/co

[Mesa-dev] [PATCH v2 12/18] nir: use load_local_group_size

2018-03-08 Thread Karol Herbst
From: Rob Clark If local_size is not known at compile time, which is the case with clover, use the load_local_group_size intrinsic instead. Signed-off-by: Karol Herbst --- src/compiler/nir/nir_lower_system_values.c | 23 --- 1 file changed, 16 insertions(+), 7 deletions(-)

[Mesa-dev] [PATCH v2 15/18] glsl: add glsl_base_get_byte_size

2018-03-08 Thread Karol Herbst
Signed-off-by: Karol Herbst --- src/compiler/glsl_types.h | 34 ++ src/compiler/nir_types.h | 30 +- 2 files changed, 35 insertions(+), 29 deletions(-) diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h index 34d03505ae

[Mesa-dev] [PATCH v2 06/18] nir/vtn: implement SpvOpCopyMemorySized

2018-03-08 Thread Karol Herbst
From: Rob Clark I think a new intrinsic is the easiest way to do this. We can lower this to a sequence of load/stores after vtn. Signed-off-by: Rob Clark Signed-off-by: Karol Herbst --- src/compiler/nir/nir_intrinsics.h | 2 ++ src/compiler/spirv/vtn_variables.c | 17 - 2 f

[Mesa-dev] [PATCH v2 18/18] RFC nir/lower_io: lower kernel entry param load_vars to load_kernel_param

2018-03-08 Thread Karol Herbst
For OpenCL kernels we have an input buffer where most of the parameters are stored. For this we have to keep track of alignment and padding rules to correctly identify the offset of each parameter inside that buffer. For this we can just rely on the new cl_size and cl_alignment glsl_type functions

[Mesa-dev] [PATCH 03/11] i965: perf: store sysfs device entry into context

2018-03-08 Thread Lionel Landwerlin
We want to reuse it later on. Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_context.h | 3 + src/mesa/drivers/dri/i965/brw_performance_query.c | 146 +++--- 2 files changed, 73 insertions(+), 76 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 04/11] i965: perf: reuse timescale base function from query

2018-03-08 Thread Lionel Landwerlin
We already have the same function in brw_queryobj.c Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 13 ++--- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/

[Mesa-dev] [PATCH 08/11] i965: perf: snapshot RPSTAT1 register

2018-03-08 Thread Lionel Landwerlin
This register contains the frequency of the GT, it's one of the value GPA would like to have as part of their queries. Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_defines.h | 10 + src/mesa/drivers/dri/i965/brw_performance_query.c | 45 +++

[Mesa-dev] [PATCH 00/11] i965: enable GPA

2018-03-08 Thread Lionel Landwerlin
Hi all, One of the tool that Intel provides as part of a suite called GPA [1] is a frame analyzer. This provides a way to look at per draw call or frame workloads on the GPU through the OA hardware. This tool relies on another library called MDAPI which requires a somewhat specific format of data

[Mesa-dev] [PATCH 11/11] i965: perf: enable GPA query statistics

2018-03-08 Thread Lionel Landwerlin
The combinaison of GPA/MDAPI components expects a particular name & layout for their pipeline statistics query. Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 1 + .../drivers/dri/i965/brw_performance_query_mdapi.c | 60 ++ .../driv

[Mesa-dev] [PATCH 09/11] i965: perf: read slice/unslice frequencies from OA reports

2018-03-08 Thread Lionel Landwerlin
Signed-off-by: Lionel Landwerlin --- src/mesa/drivers/dri/i965/brw_performance_query.c | 37 +++ src/mesa/drivers/dri/i965/brw_performance_query.h | 12 2 files changed, 49 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drive

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