Series:
Reviewed-by: Timothy Arceri
On 17/07/18 15:58, Marek Olšák wrote:
From: Marek Olšák
This should only contain functions not set in vtxfmt.c.
---
src/mesa/main/api_loopback.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/src/mesa/main/api_loopback.c b/src/mes
From: Marek Olšák
---
src/gallium/auxiliary/util/u_vbuf.c | 189
1 file changed, 165 insertions(+), 24 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_vbuf.c
b/src/gallium/auxiliary/util/u_vbuf.c
index 87b159ec1bf..b0b92f7e966 100644
--- a/src/gallium/auxili
From: Marek Olšák
---
src/mesa/state_tracker/st_draw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index dee69783ada..eb52d9505b6 100644
--- a/src/mesa/state_tracker/st_draw.c
+++ b/src/mesa/state_tracker/st_draw.c
@@ -2
Hi,
This series fixes u_vbuf to handle indirect multidraws.
Please review.
Thanks,
Marek
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From: Marek Olšák
This will be used by indirect multidraws.
---
src/gallium/auxiliary/util/u_vbuf.c | 54 +
1 file changed, 31 insertions(+), 23 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_vbuf.c
b/src/gallium/auxiliary/util/u_vbuf.c
index 76a1d143d91..87
From: Marek Olšák
no changes needed for GL compat
---
src/mesa/main/extensions_table.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index 98d1f381b0e..157e7e57c31 100644
--- a/src/mesa/main/extensions_tabl
From: Marek Olšák
---
src/mesa/vbo/vbo_exec_array.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index 58bba208db1..9d3e894c164 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++ b/src/mesa/vbo/vbo_exec_array.c
From: Marek Olšák
---
src/mesa/main/extensions_table.h | 2 +-
src/mesa/vbo/vbo_exec_array.c| 11 ---
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index 157e7e57c31..9d08d2d5531 100644
--- a/src/me
From: Marek Olšák
This should only contain functions not set in vtxfmt.c.
---
src/mesa/main/api_loopback.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/src/mesa/main/api_loopback.c b/src/mesa/main/api_loopback.c
index 4eab8118c78..c03c33ee339 100644
--- a/src/mesa/main/a
From: Marek Olšák
no changes needed for GL compat
---
src/mesa/main/extensions_table.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index e24287b8581..98d1f381b0e 100644
--- a/src/mesa/main/extensions_tabl
This patch is
Reviewed-by: Thomas Helland
Den tir. 17. jul. 2018, 01:40 skrev Caio Marcelo de Oliveira Filho <
caio.olive...@intel.com>:
> And also specify the maximum size when writing to static buffers. The
> warning below refers to the case where "str5" could be larger than
> "str5 - str4",
From: Dave Airlie
We do need width/height for things, remove the outdated
comment.
---
src/gallium/include/pipe/p_state.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/include/pipe/p_state.h
b/src/gallium/include/pipe/p_state.h
index 809aa087ce0..b55624d698d 100644
--- a/src/ga
The current code is buggy: if there are only 12 dwords left in cbuf,
we emit a zero data length command which will be rejected by virglrenderer.
Fix it by calling flush in this case.
---
src/gallium/drivers/virgl/virgl_encode.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sr
On Mon, Jul 16, 2018 at 3:38 PM Caio Marcelo de Oliveira Filho
wrote:
>
> Fixes warning:
>
> ../../src/compiler/spirv/vtn_variables.c: In function ‘var_decoration_cb’:
> ../../src/compiler/spirv/vtn_variables.c:1400:12: warning: ‘is_vertex_input’
> may be used uninitialized in this function [-Wma
Rendering to a linear depth buffer on gen4 is causing a GPU hang in the
CI system. Until a better explanation is found, assume that errata is
applicable to all gen4 platforms.
Fixes fbe01625f6bf2cef6742e1ff0d3d44a2afec003e
("i965/miptree: Share tiling_flags in miptree_create").
Reported-by: Mark
Make the 3D engine aware of the depth/stencil surface's tiling before
doing any render operations.
Fixes fbe01625f6bf2cef6742e1ff0d3d44a2afec003e
("i965/miptree: Share tiling_flags in miptree_create").
Reported-by: Mark Janes
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 4 +++-
1 file chang
On Mon, Jul 16, 2018 at 7:51 PM, Eric Anholt wrote:
> Ilia Mirkin writes:
>
>> Perhaps use state->es_shader instead of is_version(0, 100)? [Just a
>> drive-by comment, not a real review, sorry]
>
> That doesn't respect the version overrides and such that is_version
> handles.
Under what circumst
Ilia Mirkin writes:
> Perhaps use state->es_shader instead of is_version(0, 100)? [Just a
> drive-by comment, not a real review, sorry]
That doesn't respect the version overrides and such that is_version
handles.
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Jason Ekstrand writes:
> Yes please! Assuming it builds (i.e., those are actually in drm_fourcc.h),
It does. The delta to upstream is at:
https://patchwork.freedesktop.org/patch/236876/
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mesa-dev mailing
Yes please! Assuming it builds (i.e., those are actually in drm_fourcc.h),
Reviewed-by: Jason Ekstrand
On Mon, Jul 16, 2018 at 4:00 PM Eric Anholt wrote:
> We should only use a #define locally once it's been upstreamed, and at
> that point you should just update our drm_fourcc.h.
> ---
> src
We should only use a #define locally once it's been upstreamed, and at
that point you should just update our drm_fourcc.h.
---
src/egl/Android.mk | 1 +
src/egl/Makefile.am | 1 +
src/egl/SConscript | 1 +
src/egl/drivers/dri2/egl_dr
strncpy() doesn't guarantee the terminator NUL, so we would need to
set ourselves. Just use snprintf() instead.
Fixes the warnings
../../src/intel/common/gen_decoder.c: In function ‘iter_decode_field’:
../../src/intel/common/gen_decoder.c:897:7: warning: ‘strncpy’ specified bound
128 equals dest
Compiler doesn't pick up that level and start_layer will be defined,
so do as was done for num_layers in 4d8b476fa9a "intel/blorp: Fix
compiler warning about num_layers." and always set it.
Fixes warning
../../src/mesa/drivers/dri/i965/brw_blorp.c: In function
‘brw_blorp_clear_depth_stencil’:
..
Code assumes that all the necessary fields will exist, but compiler
doesn't know about this. Provide zero as default values, like in other
decoding functions.
Fixes warnings
../../src/intel/common/gen_batch_decoder.c: In function
‘handle_media_interface_descriptor_load’:
../../src/intel/common/g
When one of the cases is not part of the enum, the compilar complains:
../../src/intel/vulkan/anv_formats.c: In function
‘anv_GetPhysicalDeviceFormatProperties2’:
../../src/intel/vulkan/anv_formats.c:728:7: warning: case value ‘101004’
not in enumerated type ‘VkStructureType’ {aka ‘enum VkSt
And also specify the maximum size when writing to static buffers. The
warning below refers to the case where "str5" could be larger than
"str5 - str4", then the strcat would have overlapping dst and src.
Compiler doesn't pick up the bound from the snprintf above, so we make
clear the bounds of str
Fixes warning:
../../src/compiler/spirv/vtn_variables.c: In function ‘var_decoration_cb’:
../../src/compiler/spirv/vtn_variables.c:1400:12: warning: ‘is_vertex_input’
may be used uninitialized in this function [-Wmaybe-uninitialized]
bool is_vertex_input;
^~~
The c
GCC 8.1.1 is having a hard time identifying that the values are
properly initialized when used. In the 'memset_value' case, we pass
the uninitialized value to another function (that will use only if the
conditions match the initialization).
Just give enough hint to the compiler to figure things ou
The error buffer is limited to 256, but the report contains the
filename and possibly other data. So give it more space.
Avoids the warnings
../../src/intel/vulkan/anv_util.c: In function ‘__anv_perf_warn’:
../../src/intel/vulkan/anv_util.c:66:42: warning: ‘%s’ directive output may be
truncated
G++ 8.1.1 suggests we shouldn't be setting and copying value from
instances of classes directly, so make clear this is what we want to
do.
---
I had mixed feelings about this fix. An alternative would be to
improve how fs_inst, fs_reg and other values are created and copied,
but it didn't seem wo
Explicitly convert to signed integer. Conversion is valid since is the
same (implicitly) used to initialize the loop. Avoids the warning:
../../src/intel/compiler/brw_fs.cpp: In member function ‘bool
fs_visitor::lower_simd_width()’:
../../src/intel/compiler/brw_fs.cpp:5761:45: warning: comparison
The "__inst" will contain the name used for the variable of type
"__type *". Parenthesis is not necessary as the name itself shouldn't
be an expression.
Fixes warning:
In file included from ../../src/mesa/main/mtypes.h:49,
from ../../src/intel/compiler/brw_compiler.h:30,
On 17/07/18 03:41, Eric Anholt wrote:
Timothy Arceri writes:
This makes this opt behave more like the GLSL IR opt
lower_if_to_cond_assign(). With this we can disable that GLSL IR
opt on drivers with a NIR backend without causing spill
regressions.
shader-db results for radeonsi (RX580):
To
On 2018-07-16 04:01 PM, Marek Olšák wrote:
From: Marek Olšák
Dependencies between rings are inserted correctly if a buffer is
represented by only one unique amdgpu_winsys_bo instance.
Use a hash table keyed by amdgpu_bo_handle to have exactly one
amdgpu_winsys_bo per amdgpu_bo_handle.
The se
Perhaps use state->es_shader instead of is_version(0, 100)? [Just a
drive-by comment, not a real review, sorry]
On Mon, Jul 16, 2018 at 5:46 PM, Eric Anholt wrote:
> This fixes dEQP case:
>
> dEQP-GLES2.functional.shaders.scoping.valid.local_variable_hides_function_parameter_fragment
>
> without
This fixes dEQP case:
dEQP-GLES2.functional.shaders.scoping.valid.local_variable_hides_function_parameter_fragment
without breaking
dEQP-GLES3.functional.shaders.scoping.invalid.local_variable_hides_function_parameter_fragment
---
src/compiler/glsl/ast_to_hir.cpp | 9 +
1 file changed,
From: Marek Olšák
Dependencies between rings are inserted correctly if a buffer is
represented by only one unique amdgpu_winsys_bo instance.
Use a hash table keyed by amdgpu_bo_handle to have exactly one
amdgpu_winsys_bo per amdgpu_bo_handle.
v2: return offset and stride properly
---
src/galliu
On Thursday, July 12, 2018 5:47:48 AM PDT Sergii Romantsov wrote:
> SNB doesn't have a definition of 3DSTATE_CONSTANT_BODY, thats
> why we got segmentation fault when used INTEL_DEBUG=bat.
> Fixed by adding of 3DSTATE_CONSTANT_BODY into 3DSTATE_CONSTANT
> of VS, GS and PS structures.
>
> v2: added
On Mon, Jul 16, 2018 at 4:26 AM, Gert Wollny wrote:
> From: Gert Wollny
>
> The added function evaluates the array index according to the function
>
> idx = floor(ai + 0.5);
>
> Signed-off-by: Gert Wollny
> ---
> src/gallium/drivers/r600/r600_shader.c | 34
> +++
Build mesa 8305 completed
Commit b3474645d4 by Roland Scheidegger on 7/14/2018 2:49 AM:
nir: fix msvc build\n\nEmpty initializer braces aren't valid c (it's a gnu extension, and\nit's valid in c++).\nHopefully fixes appveyor / msvc build...\n\nFixes a3150c1d06a
On Mon, Jul 16, 2018 at 12:06 PM, Michel Dänzer wrote:
> On 2018-07-13 08:35 PM, Marek Olšák wrote:
>> https://pastebin.com/raw/itNDpPv0
>>
>> Cleanups only: +10.85%
>> Total: +11.8%
>
> Thanks, that's more useful.
>
> If you pass all 3 data files to a single ministat -s invocation, it
> combines
Build mesa 8304 failed
Commit f378fa94b2 by Jason Ekstrand on 7/4/2018 2:18 AM:
nir/worklist: Rework the foreach macro\n\nThis makes the arguments match the (thing, container) pattern used in\nother nir_foreach macros and also renames it to make that a bit more
Jason Ekstrand writes:
> This makes the arguments match the (thing, container) pattern used in
> other nir_foreach macros and also renames it to make that a bit more
> clear.
Yay, consistency!
Reviewed-by: Eric Anholt
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_
Timothy Arceri writes:
> This makes this opt behave more like the GLSL IR opt
> lower_if_to_cond_assign(). With this we can disable that GLSL IR
> opt on drivers with a NIR backend without causing spill
> regressions.
>
> shader-db results for radeonsi (RX580):
>
> Totals from affected shaders:
>
From: Marek Olšák
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index eba8d6e8b3d..94210ab3df6 100644
--- a/src/gallium/
From: Marek Olšák
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 36 ++-
1 file changed, 16 insertions(+), 20 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
index 94210ab3df6..b7f49a1159f 100644
--- a/src/gal
From: Marek Olšák
---
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index cca6a3cc25b..db7a4d7033c 100644
--- a/src/gal
From: Marek Olšák
Dependencies between rings are inserted correctly if a buffer is
represented by only one unique amdgpu_winsys_bo instance.
Use a hash table keyed by amdgpu_bo_handle to have exactly one
amdgpu_winsys_bo per amdgpu_bo_handle.
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 2
On Mon, Jul 16, 2018 at 5:54 PM, Rhys Perry wrote:
> The instructions should probably be marked as fixed so they aren't CSE'd.
>
mhh, but then also prevents us from doing DCE :/ I guess we can depend
on nir eliminating such high level instructions, but with TGSI we also
mark that as fixed, so I g
On 2018-07-13 08:35 PM, Marek Olšák wrote:
> https://pastebin.com/raw/itNDpPv0
>
> Cleanups only: +10.85%
> Total: +11.8%
Thanks, that's more useful.
If you pass all 3 data files to a single ministat -s invocation, it
combines all of them in a single graph, and prints information about
whether o
The instructions should probably be marked as fixed so they aren't CSE'd.
On Fri, Jun 29, 2018 at 11:32 PM, Karol Herbst wrote:
> Signed-off-by: Karol Herbst
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/src/gal
On Mon, Jul 16, 2018 at 7:29 AM Karol Herbst wrote:
> With OpenCL the size of some system value depends on the Physical model
> choosen, so we need a way to load any system value as 32 or 64 bit.
>
> We could probably be a lot smarter and specify which system values might
> be valid as 32 and/or
On Mon, Jul 16, 2018 at 8:32 AM Karol Herbst wrote:
> On Mon, Jul 16, 2018 at 5:24 PM, Jason Ekstrand
> wrote:
> > Do we need to do something similar for specialization constants?
> >
>
> I don't think so. The problem here wasn't constants, but simply that
> we can end up with non 32 bit shift v
On Mon, Jul 16, 2018 at 5:24 PM, Jason Ekstrand wrote:
> Do we need to do something similar for specialization constants?
>
I don't think so. The problem here wasn't constants, but simply that
we can end up with non 32 bit shift values inside the SPIR-V, but we
only support 32 bit shifts in nir.
On Mon, Jul 16, 2018 at 7:29 AM Karol Herbst wrote:
> From: Rob Clark
>
> v2 (Karol Herbst ):
>make compatible with 64 bit floats
>fix isfinite
>
> Signed-off-by: Karol Herbst
> ---
> src/compiler/spirv/vtn_alu.c | 32
> 1 file changed, 32 insertions(+)
Do we need to do something similar for specialization constants?
On Mon, Jul 16, 2018 at 7:28 AM Karol Herbst wrote:
> Signed-off-by: Karol Herbst
> ---
> src/compiler/spirv/vtn_alu.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compil
Reviewed-by: Jason Ekstrand
On Mon, Jul 16, 2018 at 7:29 AM Karol Herbst wrote:
> Signed-off-by: Karol Herbst
> ---
> src/compiler/spirv/vtn_alu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
> index 0ec02
On Mon, Jul 16, 2018 at 7:30 AM Karol Herbst wrote:
> without this we might end up looping inside the dominator analysis
> infinitly. Hit by some 64 bit int div OpenCL CTS test.
>
> Signed-off-by: Karol Herbst
> ---
> src/compiler/nir/nir_lower_int64.c | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Jason Ekstrand
On Mon, Jul 16, 2018 at 7:29 AM Karol Herbst wrote:
> From: Rob Clark
>
> Lightly edited to be valid 'C' code.
>
> Is there a bug open to fix this upstream?
>
> Signed-off-by: Karol Herbst
> ---
> src/compiler/spirv/OpenCL.std.h | 211
https://bugs.freedesktop.org/show_bug.cgi?id=107098
--- Comment #2 from Jan Palus ---
Patch sent to mailing list, maybe this way it will get any attention:
https://lists.freedesktop.org/archives/mesa-dev/2018-July/200199.html
--
You are receiving this mail because:
You are the assignee for the
Reviewed-by: Jason Ekstrand
On Mon, Jul 16, 2018 at 7:29 AM Karol Herbst wrote:
> OpenCL knows vector of size 8 and 16.
>
> v2: rebased on master (nir_swizzle rework)
> rework more declarations with nir_component_mask_t
> adjust print_var_decl
>
> Reviewed-by: Jason Ekstrand
> Signed-o
On Mon, Jul 16, 2018 at 7:28 AM Karol Herbst wrote:
> also move some of the GLSL builtins over we will need for implementing
> some OpenCL builtins
>
> v2: replace NIR_IMM_FP by nir_imm_floatN_t in ported code
> fix up changes caused by swizzle rework
>
> Signed-off-by: Karol Herbst
> ---
>
Hey,
On 2018-07-09 13:01, Robert Foss wrote:
NOTE: This series has not been tested successfully, and I'm seeing a segfault
during the boot process. Which I'm currently looking into.
Tracking down the segfault I've been seeing through mesa and aosp and
bootanimation. It occurs when ioc
without this we might end up looping inside the dominator analysis
infinitly. Hit by some 64 bit int div OpenCL CTS test.
Signed-off-by: Karol Herbst
---
src/compiler/nir/nir_lower_int64.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/compiler/nir/nir_lower_int64.c
b/src/compiler/ni
With OpenCL the size of some system value depends on the Physical model
choosen, so we need a way to load any system value as 32 or 64 bit.
We could probably be a lot smarter and specify which system values might
be valid as 32 and/or 64 bit, but I get the feeling it isn't really worth
the effort
Not complete, mostly just adding things as I encounter them in CTS. But
not getting far enough yet to hit most of the OpenCL.std instructions.
Anyway, this is better than nothing and covers the most common builtins.
Signed-off-by: Karol Herbst
---
src/compiler/nir/meson.build | 1 +
Signed-off-by: Karol Herbst
---
src/compiler/spirv/vtn_alu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index 0ec0234f531..5a0347989e9 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
From: Rob Clark
v2 (Karol Herbst ):
make compatible with 64 bit floats
fix isfinite
Signed-off-by: Karol Herbst
---
src/compiler/spirv/vtn_alu.c | 32
1 file changed, 32 insertions(+)
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu
Signed-off-by: Karol Herbst
---
src/compiler/spirv/vtn_alu.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index 5db6c7f0a87..d6f149d12e9 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
@@ -
From: Rob Clark
Lightly edited to be valid 'C' code.
Is there a bug open to fix this upstream?
Signed-off-by: Karol Herbst
---
src/compiler/spirv/OpenCL.std.h | 211
1 file changed, 211 insertions(+)
create mode 100644 src/compiler/spirv/OpenCL.std.h
diff --
This time there are actually some OpenCL patches like adding support for
the OpenCL SPIR-V extensions or a few opcodes we don't hit with vulkan
or glsl.
Also some of the glsl builtins are moved into a new file so that we can
start sharing builtin implementations across multiple SPIR-V extensions.
OpenCL knows vector of size 8 and 16.
v2: rebased on master (nir_swizzle rework)
rework more declarations with nir_component_mask_t
adjust print_var_decl
Reviewed-by: Jason Ekstrand
Signed-off-by: Karol Herbst
---
src/compiler/nir/nir.c| 14
src/compile
also move some of the GLSL builtins over we will need for implementing
some OpenCL builtins
v2: replace NIR_IMM_FP by nir_imm_floatN_t in ported code
fix up changes caused by swizzle rework
Signed-off-by: Karol Herbst
---
src/compiler/Makefile.sources | 2 +
src/compiler/nir/meson
Reviewed-by: Jason Ekstrand
On Sun, Jul 15, 2018 at 10:19 PM Timothy Arceri
wrote:
> One of these was seen in a Deus Ex shader.
>
> V2: make opts more generic.
>
> Cc: Jason Ekstrand
> ---
> src/compiler/nir/nir_opt_algebraic.py | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/src/
Seems to be about two times faster at the cost of being larger, using and
clobbering one more register and being a little more difficult to read.
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/codegen/lib/gm107.asm | 92 ++---
.../drivers/nouveau/codegen/lib/gm107.asm
On 16. juli 2018 13:34, Gert Wollny wrote:
Am Montag, den 16.07.2018, 12:23 +0200 schrieb Erik Faye-Lund:
virglrenderer's virgl_hw.h doesn't contain these, and it's the
virgl winsys that cares about these, so let's move them there.
This reduces the diff between the two different versions of
vir
As you said, patch 2/3 will need rebasing now. With that
patches 2 and 3 are
Reviewed-By: Gert Wollny
Am Montag, den 16.07.2018, 12:23 +0200 schrieb Erik Faye-Lund:
> This just makes sure we're currently up-to-date with what
> virglrenderer has.
>
> Signed-off-by: Erik Faye-Lund
> ---
> sr
Am Montag, den 16.07.2018, 12:23 +0200 schrieb Erik Faye-Lund:
> virglrenderer's virgl_hw.h doesn't contain these, and it's the
> virgl winsys that cares about these, so let's move them there.
>
> This reduces the diff between the two different versions of
> virgl_hw.h, and should make it easier t
Am Montag, den 16.07.2018, 12:11 +0200 schrieb Erik Faye-Lund:
> On 13. juli 2018 14:46, Gert Wollny wrote:
> > Fixes: 91f48cdfe5c817158c533a8f67c60e9aabbe4479
> > virgl: Add support for glGetMultisample
> > Signed-off-by: Gert Wollny
> > ---
> > src/gallium/drivers/virgl/virgl_context.c
This allows us to implement glMinSampleShading correctly, which up
until now just got ignored.
Signed-off-by: Erik Faye-Lund
---
This implements the mesa-side of VIRGL_CCMD_SET_MIN_SAMPLES, which
is already in the master-branch of virglre...
src/gallium/drivers/virgl/virgl_context.c | 12
Just a heads-up, this patch conflicts with this one:
https://patchwork.freedesktop.org/patch/239169/
Your were sent out first, so I'll be happy to rebase mine when this has
landed...
On 13. juli 2018 14:46, Gert Wollny wrote:
Fixes: 91f48cdfe5c817158c533a8f67c60e9aabbe4479
virgl: Add
This matches what this field is called in virglrenderer's copy of
this.
While we're at it, fixup the indentation.
This reduces the diff between the two different versions of
virgl_hw.h, and should make it easier to upgrade the file in
the future.
Signed-off-by: Erik Faye-Lund
---
src/gallium/d
This just makes sure we're currently up-to-date with what
virglrenderer has.
Signed-off-by: Erik Faye-Lund
---
src/gallium/drivers/virgl/virgl_hw.h | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/virgl/virgl_hw.h
b/src/gallium/drivers/
virglrenderer's virgl_hw.h doesn't contain these, and it's the
virgl winsys that cares about these, so let's move them there.
This reduces the diff between the two different versions of
virgl_hw.h, and should make it easier to upgrade the file in
the future.
Signed-off-by: Erik Faye-Lund
---
sr
Here's a few patches to get the delta between our copy of virgl_hw.h and the
copy in the virglrenderer repository as small as possible.
The goal is to make it easier to track this file in the future by simply
copying the new version of the file on top of the old.
I've left out one new cap that cu
On 13. juli 2018 14:46, Gert Wollny wrote:
Fixes: 91f48cdfe5c817158c533a8f67c60e9aabbe4479
virgl: Add support for glGetMultisample
Signed-off-by: Gert Wollny
---
src/gallium/drivers/virgl/virgl_context.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gal
From: Gert Wollny
The added function evaluates the array index according to the function
idx = floor(ai + 0.5);
Signed-off-by: Gert Wollny
---
src/gallium/drivers/r600/r600_shader.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/src/gallium/drivers
From: Gert Wollny
The array index needs to be corrected and it must be insured that its
value is non-negative before it is combined with the face id.
Fixes 182 from android/cts/master/gles31-master.txt:
dEQP-GLES31.functional.texture.filtering.cube_array.formats.*
dEQP-GLES31.functional.text
From: Gert Wollny
Correct the array index for TEXTURE_*1D_ARRAY, and TEXTURE_*2D_ARRAY
v2: - Don't apply texture offset correction for GATHER*O (corrects piglit
failures reported by Dave Airlie)
- unconditionally set the texture offset to 1 (=0.5) because the shader
can't set an
From: Gert Wollny
Gradients used in texture lookups and the offsets must reside in the
same fetch clause (the first is imposed by the hardware and the second
is expected by sb). In order to ensure that no ALU clause is inserted
between emission and use of these, delay the emission of these
instru
From: Gert Wollny
Hello Roland, Dave, and everybody else,
this is a 90% rewrite of the earlier series.
- I removed the changes to the texture state and handle everything in the
shader. Since this was needed for cube arrays anyway, and also taking Rolands
concern into account I thought it
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107098
Signed-off-by: Jan Palus
---
src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
b/src/gallium/winsys/sw/
[ 29.524770] radeon :04:00.0: WB enabled
[ 29.524773] radeon :04:00.0: fence driver on ring 0 use gpu addr
0x8c00 and cpu addr 0x5bfa1c58
[ 29.524774] radeon :04:00.0: fence driver on ring 1 use gpu addr
0x8c04 and cpu addr 0xabfa2b51
[ 29
On Sun, Jul 15, 2018 at 7:26 PM, Timothy Arceri wrote:
> Noticed in a unigine shader.
> ---
> src/compiler/nir/nir_opt_algebraic.py | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/compiler/nir/nir_opt_algebraic.py
> b/src/compiler/nir/nir_opt_algebraic.py
> index 5e07d662b07..0986dd
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