This is OK but the code also needs to compile with Visual C++.
Marek
On Wed, Jul 18, 2018 at 4:34 PM, David Riley wrote:
> Without this change, dlopen()/dlclose() of any driver results in memory
> being leaked which becomes problematic if things are being reinitialized
> repeatedly (eg from a fu
On Thu, Jul 19, 2018 at 10:24 AM, Timothy Arceri wrote:
> On 19/07/18 12:02, Connor Abbott wrote:
>>
>> Why not do the more general thing, and evaluate the condition in every
>> block dominated by the then and else blocks? That should handle the
>> loop and non-loop cases.
>
>
> Can you explain wh
On 2 July 2018 at 03:32, Gert Wollny wrote:
> Below tests would fail with an error message
> "Vertex format (R4G4B4A4|R5G5B5A1) not supported."
> Add the formate to the translation routine to enable these formats.
>
> Fixes:
> dEQP-GLES3.functional.texture.specification.teximage2d_pbo.rgba4_2d
On 19 July 2018 at 15:07, Dave Airlie wrote:
> On 2 July 2018 at 03:32, Gert Wollny wrote:
>> Below tests would fail with an error message
>> "Vertex format (R4G4B4A4|R5G5B5A1) not supported."
>> Add the formate to the translation routine to enable these formats.
>>
>> Fixes:
>> dEQP-GLES3.fu
Also,
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107275
On Wed, Jul 18, 2018 at 9:16 PM Jason Ekstrand wrote:
> On Sat, Jul 14, 2018 at 4:26 PM Bas Nieuwenhuizen
> wrote:
>
>> Reinserting code directly before a jump means the block gets split
>> and merged, removing the original bl
Oh man... I was also recently looking at that same compute shader, and I
wrote nearly identical patches the early part of last week. The bcsel
patches caused a bit of pain for i965. I came up with a different way
to handle that particular problem... either way, I eventually abandoned
the whole ap
Inherited commands buffers are not supported.
v3: - restore previous conditional rendering user state for fast clears
v2: - disable predication for blit and copy commands
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 37 +++
src/amd/vulkan/ra
Signed-off-by: Danylo Piliaiev
---
src/amd/vulkan/radv_shader.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 1399005998..aac5b8a21a 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shad
Reviewed-by: Samuel Pitoiset
On 07/18/2018 10:47 AM, Danylo Piliaiev wrote:
Signed-off-by: Danylo Piliaiev
---
src/amd/vulkan/radv_shader.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 1399005998..a
Signed-off-by: Danylo Piliaiev
---
src/compiler/glsl/ast_to_hir.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/compiler/glsl/ast_to_hir.cpp
index dd60a2a87f..8a4cc56511 100644
--- a/src/compiler/glsl/ast_to_hir.cpp
+++ b/src/compiler
Signed-off-by: Danylo Piliaiev
---
src/mesa/main/context.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index 4243e03c5c..0ef8fe32a6 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -742,7 +742,7 @@ _mes
Thanks Brian!
On 2018-07-17 16:18, Brian Paul wrote:
On 07/17/2018 04:32 AM, Robert Foss wrote:
This failure mode is a bit tricky to debug and manifests itself
later as a null pointer dereference, for which finding the origin
is needlessly tricky.
Signed-off-by: Robert Foss
---
Changes since
Hi,
I was running cppcheck on Mesa and found the issue mentioned here:
This can't possibly work. The function immediately dereferences
fragcoord, so it can't legally be NULL. Which then begs the question,
how on earth did it work before? It would just read a non-existent
variable out of the
Reviewed-by: Bas Nieuwenhuizen
Thanks for the improvements!
On Wed, Jul 18, 2018 at 10:47 AM, Samuel Pitoiset
wrote:
> Inherited commands buffers are not supported.
>
> v3: - restore previous conditional rendering user state for fast clears
> v2: - disable predication for blit and copy commands
On 18/07/18 00:05, Jason Ekstrand wrote:
For large buffers which span an entire l1 page table, we got the range
calculations wrong. In this case, we end up with an l1_start which is
the first byte represented by the given l1 table and an l1_end which is
the first byte after the range represented
The IOCTLs doesn't pass this along, so computing them in the first
place is kinda pointless.
Signed-off-by: Erik Faye-Lund
---
This is just a cleanup I noticed based on some discussion with Gert.
A question is, what code here expects this stride to be respected? The
call-sites in virgl_*_transf
This does two things:
1. Allows cross shader optimisations to be preformed on SSO
programs that contain more than one stage (seems like I
don't have any of these in my shader-db collection).
2. Allows us to write compilation errors to stderr. With this
change I discovered a Deus Ex: MD s
https://bugs.freedesktop.org/show_bug.cgi?id=107275
Bug ID: 107275
Summary: NIR segfaults after spirv-opt
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority:
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