[Mesa-dev] [PATCH v2 10/11] nir: Add an array copy optimization

This peephole optimization looks for a series of load/store_deref or copy_deref instructions that copy an array from one variable to another and turns it into a copy_deref that copies the entire array. The pattern it looks for is extremely specific but it's good enough to pick up on the input

[Mesa-dev] [PATCH v2 11/11] intel/nir: Enable nir_opt_find_array_copies

We have to be a bit careful with this one because we want it to run in the optimization loop but only in the first brw_nir_optimize call. Later calls assume that we've lowered away copy_deref instructions and we don't want to introduce any more. Shader-db results on Kaby Lake: total

[Mesa-dev] [PATCH v2 02/11] nir: Take if uses into account in ssa_def_components_read

Fixes: d800b7daa5440 "nir: Add a helper for figuring out what..." Reviewed-by: Caio Marcelo de Oliveira Filho --- src/compiler/nir/nir.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index bc7f05b3e86..a849664134f 100644 ---

[Mesa-dev] [PATCH v2 04/11] nir/types: Add array_or_matrix helpers

Reviewed-by: Thomas Helland --- src/compiler/nir_types.cpp | 15 +++ src/compiler/nir_types.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp index 3a3864414f3..c6f30368c95 100644 --- a/src/compiler/nir_types.cpp +++

[Mesa-dev] [PATCH v2 05/11] nir: Add a structure splitting pass

This pass doesn't really do much now because nir_lower_vars_to_ssa can already see through structures and considers them to be "split". This pass exists to help other passes more easily see through structure variables. If a back-end does implement arrays using scratch or indirects on registers,

[Mesa-dev] [PATCH v2 07/11] intel/nir: Use the new structure and array splitting passes

Shader-db results on Kaby Lake: total instructions in shared programs: 15177605 -> 15177605 (0.00%) instructions in affected programs: 0 -> 0 helped: 0 HURT: 0 This is unsurprising because nir_lower_vars_to_ssa already effectively does structure and array splitting internally.

[Mesa-dev] [PATCH v2 01/11] util/list: Make some helpers take const lists

They're all just querying things about the list and not mutating anything. Reviewed-by: Thomas Helland --- src/util/list.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/util/list.h b/src/util/list.h index 6edb7501109..09d1b4cae64 100644 --- a/src/util/list.h +++

[Mesa-dev] [PATCH v2 06/11] nir: Add an array splitting pass

This pass looks for array variables where at least one level of the array is never indirected and splits it into multiple smaller variables. This pass doesn't really do much now because nir_lower_vars_to_ssa can already see through arrays of arrays and can detect indirects on just one level or

[Mesa-dev] [PATCH v2 03/11] nir/instr_set: Fix nir_instrs_equal for derefs

We weren't returning at the end of the nir_isntr_type_deref case in nir_instrs_equal and it was falling through to the default of false. While we're at it, make the default unreachable because all statements in the switch now have their own returns. Had we done that before, we would have caught

[Mesa-dev] [PATCH v2 09/11] intel/nir: Use nir_shrink_vec_array_vars

Shader-db results on Kaby Lake: total instructions in shared programs: 15177605 -> 15176765 (<.01%) instructions in affected programs: 4259 -> 3419 (-19.72%) helped: 1 HURT: 0 total spills in shared programs: 10954 -> 10855 (-0.90%) spills in affected programs: 295 -> 196

[Mesa-dev] [PATCH v2 08/11] nir: Add a array-of-vector variable shrinking pass

This pass looks for variables with vector or array-of-vector types and narrows the type to only the components used. --- src/compiler/nir/nir.h| 1 + src/compiler/nir/nir_split_vars.c | 694 ++ 2 files changed, 695 insertions(+) diff --git

[Mesa-dev] [PATCH v2 00/11] nir: Add some optimizations on variables

This is the second version of my optimization series for variables. The first version, including the very descriptive cover letter can be found here: https://patchwork.freedesktop.org/series/47295/ This second version contains changes to the array splitting and vector narrowing passes. The

Re: [Mesa-dev] [PATCH 07/12] nir: Add an array splitting pass

On Fri, Jul 27, 2018 at 4:17 PM Timothy Arceri wrote: > On 27/07/18 02:00, Jason Ekstrand wrote: > > This pass looks for array variables where at least one level of the > > array is never indirected and splits it into multiple smaller variables. > > --- > > src/compiler/nir/nir.h|

Re: [Mesa-dev] [PATCH 07/12] nir: Add an array splitting pass

On Thu, Jul 26, 2018 at 4:53 PM Caio Marcelo de Oliveira Filho < caio.olive...@intel.com> wrote: > Hi, > > A few comments and questions. I still haven't finished reading > emit_split_copies(), though. > > > On Thu, Jul 26, 2018 at 09:00:03AM -0700, Jason Ekstrand wrote: > > This pass looks for

Re: [Mesa-dev] [PATCH 1/6] configure: bump libdrm for AMDGPU to 2.4.92

Hello Samuel, any progress on this? Greetings, Dieter Am 04.07.2018 15:06, schrieb Samuel Pitoiset: This will allow us to submit more IBs at once because the limit has been removed in libdrm 2.4.92. Signed-off-by: Samuel Pitoiset --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1

Re: [Mesa-dev] [PATCH 0/5] Gallium & RadeonSI: EQAA (mixed samples & storage sample counts)

For the series Tested-by: Dieter Nützel on RX 580 Dieter Am 19.07.2018 06:18, schrieb Marek Olšák: Hi, This implements the Gallium part of EQAA. I'd rather get this merged sooner than later because of the amount of trivial but vast changes in Gallium. Please review. Thanks, Marek

Re: [Mesa-dev] [PATCH] gallium/swr: Enable support bptc format.

Hi Bruce, Thank you, could you please merge commits? (I don't have commit rights.) On Fri, Jul 27, 2018 at 11:02 PM Cherniak, Bruce wrote: > Reviewed-by: Bruce Cherniak > > > On Jul 27, 2018, at 1:45 PM, Denis Pauk wrote: > > > > Reuse Code from: > > f69bc797e1 gallium/auxiliary: Add helper

Re: [Mesa-dev] [PATCH 0/7] ASTC texture compression for all Gallium drivers

For the series Tested-by: Dieter Nützel on RX 580 Dieter Am 24.07.2018 01:52, schrieb Marek Olšák: Hi, This series enables ASTC texture compression for all Gallium drivers that don't support it in hardware. The works the same as the ETC2 fallback, i.e. it decompresses ASTC inside

[Mesa-dev] Xorg EVOC

Hello Xorg Team , i want to know if Xorg EVOC is on ? Currently i am looking at Unit and performance tests for VA-API and Piglit for VA-API. There are no potential mentors listed for these projects. so can you help me and point me to right direction , where should i look into or where to get

[Mesa-dev] [PATCH] radv: Allow ETC2 on RAVEN and VEGA10 instead of all GFX9.

Follow radeonsi. Fixes: 3665f66ef26 "radv: Add support for ETC2 textures." --- src/amd/vulkan/radv_formats.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c index f23ebfb2ad7..f0cc0fc5f95 100644 ---