Re: [Mesa-dev] [PATCH 12/15] anv: introduce helper to resolve vk_format from anv_format

On 11/6/18 3:01 PM, Lionel Landwerlin wrote: We could touch the macros in anv_formats.c to include VkFormat in anv_format if that makes your life easier. Yep, this makes sense. I'll add VkFormat there. On 30/10/2018 05:26, Tapani Pälli wrote: Signed-off-by: Tapani Pälli ---   src/intel/vu

Re: [Mesa-dev] [radeonsi] Blender/vsraytrace/fsraytrace/gsraytrace - GPUShader: compile error

SR#648671 On Tue, 13 Nov 2018, Dieter Nützel wrote: > GREAT hint Tim! > > Yes, of course. > > /home/dieter> gcc --version > gcc (SUSE Linux) 8.2.1 20181025 [gcc-8-branch revision 265488] > > So I have to ping SUSE to push the fix, too. > > Thanks a lot. > > Dieter > > Am 12.11.2018 08:28,

Re: [Mesa-dev] [PATCH 2/2] util/ralloc: Make sizeof(linear_header) a multiple of 8

Wt., 13 lis 2018, 06:03: Matt Turner napisał(a): > On Mon, Nov 12, 2018 at 3:07 PM Eric Anholt wrote: > > > > Matt Turner writes: > > > > > Prior to this patch sizeof(linear_header) was 20 bytes in a > > > non-debug build on 32-bit platforms. We do some pointer arithmetic to > > > calculate the

Re: [Mesa-dev] [PATCH 2/3] radv: make use of nir_move_out_const_to_consumer()

Reviewed-by: Samuel Pitoiset On 11/7/18 5:20 AM, Timothy Arceri wrote: vkpipeline-db results: Totals from affected shaders: SGPRS: 28400 -> 28576 (0.62 %) VGPRS: 27916 -> 27692 (-0.80 %) Spilled SGPRs: 140 -> 138 (-1.43 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Sc

Re: [Mesa-dev] [PATCH 16/28] Replace IROUND_POS with _mesa_roundevenf

On Mon, 2018-11-12 at 09:22 -0800, Dylan Baker wrote: > Quoting Erik Faye-Lund (2018-11-12 04:51:47) > > On Fri, 2018-11-09 at 10:40 -0800, Dylan Baker wrote: > > > Which has the same behavior. > > > > Does it? I'm not so sure... IROUND_POS seems to round to nearest > > integer depending on the FP

Re: [Mesa-dev] [PATCH 1/3 v2] glsl: prevent qualifiers modification of predeclared variables

Hello, Thanks a lot for review. Regards, Andrii. On Sat, Nov 10, 2018 at 5:38 AM Timothy Arceri wrote: > Nice! Series is: > > Reviewed-by: Timothy Arceri > > On 10/10/18 9:07 am, Ian Romanick wrote: > > From: Ian Romanick > > > > Section 3.7 (Identifiers) of the GLSL spec says: > > > >

Re: [Mesa-dev] [PATCH v4 01/10] intel/genxml: Add engine definition to render engine instructions (gen4)

For all the xml changes : Reviewed-by: Lionel Landwerlin ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3] intel/decoder: tools: Use engine for decoding batch instructions

I forgot that aubinator_viewer_decoder.cpp needs to be updated too. But updated locally and will push with the fix. Thanks! - Lionel On 08/11/2018 10:36, Lionel Landwerlin wrote: Reviewed-by: Lionel Landwerlin On 07/11/2018 14:50, Toni Lönnberg wrote: The engine to which the batch was sent t

[Mesa-dev] [Bug 107822] Just Cause 3 Flickering Textures with AMD RADV

https://bugs.freedesktop.org/show_bug.cgi?id=107822 --- Comment #6 from Alexander --- I already have tested that. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.___ mesa-dev mailing list me

Re: [Mesa-dev] [PATCH v2 3/4] dri: add AYUV format

I think this chunk (or the whole patch) should be cherry picked to stable. Otherwise we get a BAD_ATTRIBUTE error for trying to create an AYUV EGLImage. We should have BAD_MATCH instead. - Lionel On 09/11/2018 10:55, Lionel Landwerlin wrote: diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/

Re: [Mesa-dev] [PATCH v3] virgl: Add command and flags to initiate debugging on the host (v2)

The host side has now landed, but because I re-worked the guest side since Erik gave his R-B, I thought I'd ask you to take another look, Best, Gert Am Mittwoch, den 12.09.2018, 11:59 +0200 schrieb Gert Wollny: > From: Gert Wollny > > On the host VREND_DEBUG=guestallow must be set to let the

Re: [Mesa-dev] [PATCH v2 3/4] dri: add AYUV format

On 11/13/18 1:43 PM, Lionel Landwerlin wrote: I think this chunk (or the whole patch) should be cherry picked to stable. Otherwise we get a BAD_ATTRIBUTE error for trying to create an AYUV EGLImage. We should have BAD_MATCH instead. Or should we change the reported error code in places where

[Mesa-dev] [PATCH v2 1/5] intel/tools: avoid 'unused variable' warnings

From: Andrii Simiklit 1. tools/aub_read.c:271:31: warning: unused variable ‘end’ const uint32_t *p = data, *end = data + data_len, *next; 2. tools/aub_mem.c:292:13: warning: unused variable ‘res’ void *res = mmap((uint8_t *)bo.map + map_offset, 4096, PROT_READ, tools/aub_mem.c:357:

[Mesa-dev] [PATCH v2 5/5] intel/tools: avoid 'ignoring return value'

From: Andrii Simiklit 1. tools/i965_disasm.c:58:4: warning: ignoring return value of ‘fread’, declared with attribute warn_unused_result fread(assembly, *end, 1, fp); v2: - Fixed incorrect return value check. ( Eric Engestrom ) Signed-off-by: Andrii Simiklit --- src/int

[Mesa-dev] [PATCH v2 4/5] main: avoid 'may be used uninitialized' warnings

From: Andrii Simiklit 1. main/texcompress_etc.c:1314:12: warning: ‘*((void *)&dst+2)’ may be used uninitialized in this function 2. main/texcompress_etc.c:1354:12: warning: ‘*((void *)&dst+2)’ may be used uninitialized in this function 3. main/texcompress_etc.c:1293:12: warning: ‘dst’

[Mesa-dev] [PATCH v2 2/5] compiler: avoid 'unused variable'

From: Andrii Simiklit 1. nir/nir_lower_vars_to_ssa.c:691:21: warning: unused variable ‘var’ nir_variable *var = path->path[0]->var; v2: Changes for some part of 'may be used uninitialized' warnings were removed, seems like it is a compiler issue. ( Eric Engestrom )

[Mesa-dev] [PATCH v2 3/5] i965: avoid 'unused variable'

From: Andrii Simiklit 1. brw_pipe_control.c:311:34: warning: unused variable ‘devinfo’ 2. brw_program_binary.c:209:19: warning: unused variable ‘gen_size’ 3. brw_program_binary.c:216:19: warning: unused variable ‘nir_size’ v2: Changes for unreproducible issues were removed Signed-of

[Mesa-dev] [PATCH v2 0/5] mesa: fix against several compilation warnings

From: Andrii Simiklit Fixes several compilation warnings for a release configuration v2: the patch '1/4' was separated to '1/5' and '5/5' ( Eric Engestrom ) Andrii Simiklit (5): intel/tools: avoid 'unused variable' warnings compiler: avoid 'unused variable' i965: avoid 'unused var

Re: [Mesa-dev] [PATCH 6/7] RFC: nir/xfb_info: arrays of basic types adds just one varying

Hi Jason, just one thing here. Although I appreciate your interest to understand how varyings are enumerated, I think that we are diverting here, as in the end that would be something that I would need to solve. I just wanted to know for the way to go. The main question here is if we are really in

Re: [Mesa-dev] [PATCH v3] i965: Fix calculation of layers array length for isl_view

Hello, Could anyone look at the patch? Thanks! On 10/24/18 2:22 PM, Danylo Piliaiev wrote: I have made a Piglit test that exercises the issue: https://patchwork.freedesktop.org/patch/258180/ - Danil On 9/10/18 6:21 PM, Danylo Piliaiev wrote: Handle all cases in calculation of layers count f

Re: [Mesa-dev] [PATCH v2 3/4] dri: add AYUV format

On 13/11/2018 12:04, Tapani Pälli wrote: On 11/13/18 1:43 PM, Lionel Landwerlin wrote: I think this chunk (or the whole patch) should be cherry picked to stable. Otherwise we get a BAD_ATTRIBUTE error for trying to create an AYUV EGLImage. We should have BAD_MATCH instead. Or should we chan

Re: [Mesa-dev] [PATCH v3] virgl: Add command and flags to initiate debugging on the host (v2)

On Wed, 2018-09-12 at 11:59 +0200, Gert Wollny wrote: > From: Gert Wollny > > On the host VREND_DEBUG=guestallow must be set to let the guest > override > the debug flags. > > v2: Send flag string instead of flags, this avoids the need to keep > the flags in sync. > v3: Only request host log

Re: [Mesa-dev] [PATCH mesa] xmlpool: update translation po files

On Mon, 12 Nov 2018 at 18:14, Dylan Baker wrote: > > Quoting Eric Engestrom (2018-11-12 09:47:22) > > On Monday, 2018-11-12 16:56:32 +, Emil Velikov wrote: > > > On Mon, 12 Nov 2018 at 14:24, Eric Engestrom > > > wrote: > > > > > > > > These files are close to 4 years out of date; a lot's ch

[Mesa-dev] [Bug 32211] [GLSL] lower_jumps with continue-statements in for-loops prevents loop unrolling

https://bugs.freedesktop.org/show_bug.cgi?id=32211 Danylo changed: What|Removed |Added CC||danylo.pilia...@gmail.com --- Comment #12 from

Re: [Mesa-dev] [PATCH v3] virgl: native fence fd support

[This time with mesa-dev@ in the list, and less typos] Hi Rob, On Mon, 12 Nov 2018 at 15:14, Robert Foss wrote: > +++ b/src/gallium/drivers/virgl/virgl_screen.c > @@ -340,7 +340,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap > param) > case PIPE_CAP_VIDEO_MEMORY: >r

[Mesa-dev] [PATCH] egl/dri: fix error value with unknown drm format

According to the EGL_EXT_image_dma_buf_import spec, creating an EGL image with a DRM format not supported should yield the BAD_MATCH error : " * If is EGL_LINUX_DMA_BUF_EXT, and the EGL_LINUX_DRM_FOURCC_EXT attribute is set to a format not supported by the EGL, EGL_BAD_MATCH

Re: [Mesa-dev] [PATCH 2/3] nir: combine fmul and fadd across ffma operations

The brw_nir_opt_peephole_ffma pass is only doing what the fuse_ffma option already does. It produces the same result as the fuse_ffma option, which is not optimal. This is what I get: vec4 32 ssa_7 = fmul ssa_6, ssa_1. vec4 32 ssa_8 = ffma ssa_5, ssa_1., ssa_7 vec4 32 ssa_10 =

Re: [Mesa-dev] [PATCH] egl/dri: fix error value with unknown drm format

On Tue, 13 Nov 2018 at 14:11, Lionel Landwerlin wrote: > > According to the EGL_EXT_image_dma_buf_import spec, creating an EGL > image with a DRM format not supported should yield the BAD_MATCH > error : > > " >* If is EGL_LINUX_DMA_BUF_EXT, and the > EGL_LINUX_DRM_FOURCC_EXT >

[Mesa-dev] [PATCH 02/22] nir: replace nir_load_system_value calls with appropiate builder functions

this helps reduce the overall code changes when a bit_size parameter is added to nir_load_system_value Reviewed-by: Jason Ekstrand Reviewed-by: Eric Anholt Signed-off-by: Karol Herbst --- src/amd/vulkan/radv_meta_buffer.c| 8 src/amd/vulkan/radv_meta_bufimage.c

[Mesa-dev] [PATCH 01/22] nir: add const_index parameters to system value builder function

this allows to replace some nir_load_system_value calls with the specific system value constructor Reviewed-by: Jason Ekstrand Reviewed-by: Eric Anholt Signed-off-by: Karol Herbst --- src/compiler/nir/nir_builder_opcodes_h.py | 21 +++-- 1 file changed, 19 insertions(+), 2 dele

[Mesa-dev] [PATCH 00/22] nir/spirv: support for CL kernel

some of those patches are already reviewed, but not pushed. Just wanted to post the patches to show the most current approach and to start discussion on what we might want to handle differently. There are some things I am not so happy about as well, like that bit_size handling for system values or

[Mesa-dev] [PATCH 16/22] nir+vtn: vec8+vec16 support

This introduces new vec8 and vec16 instructions (which are the only instructions taking more than 4 sources), in order to construct 8 and 16 component vectors. In order to avoid fixing up the non-autogenerated nir_build_alu() sites and making them pass 16 src args for the benefit of the two instru

[Mesa-dev] [PATCH 08/22] glsl: add glsl_base_get_byte_size

Signed-off-by: Karol Herbst --- src/compiler/glsl_types.h | 34 ++ src/compiler/nir_types.h | 30 +- 2 files changed, 35 insertions(+), 29 deletions(-) diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h index f216372861

[Mesa-dev] [PATCH 06/22] vtn: handle SpvExecutionModelKernel

Signed-off-by: Karol Herbst --- src/compiler/spirv/spirv_to_nir.c | 3 +++ src/compiler/spirv/vtn_private.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 2c214324774..650eb6a977c 100644 --- a/src/compiler/spirv

[Mesa-dev] [PATCH 11/22] nir: simplify get_io_offset() parameters

From: Rob Clark For pointers we'll need to add another caller, plus in addition a type_align() fxn ptr. So just simplify things and pass the lower_io_state to get_io_offset(). Signed-off-by: Karol Herbst --- src/compiler/nir/nir_lower_io.c | 12 ++-- 1 file changed, 6 insertions(+),

[Mesa-dev] [PATCH 18/22] nir/spirv: handle SpvStorageClassCrossWorkgroup

Signed-off-by: Karol Herbst --- src/compiler/nir/nir.c | 4 src/compiler/nir/nir.h | 1 + src/compiler/nir/nir_print.c | 2 ++ src/compiler/spirv/vtn_private.h | 1 + src/compiler/spirv/vtn_variables.c | 4 5 files changed, 12 insertions(+) diff --git a/

[Mesa-dev] [PATCH 05/22] nir/spirv: cast shift operand to u32

v2: fix for specialization constants as well Signed-off-by: Karol Herbst --- src/compiler/spirv/spirv_to_nir.c | 20 src/compiler/spirv/vtn_alu.c | 11 +++ 2 files changed, 31 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/sp

[Mesa-dev] [PATCH 21/22] spirv/cl: support vload/vstore

Signed-off-by: Karol Herbst --- src/compiler/spirv/vtn_opencl.c | 59 + 1 file changed, 59 insertions(+) diff --git a/src/compiler/spirv/vtn_opencl.c b/src/compiler/spirv/vtn_opencl.c index 089e6168fd8..ecaca4c17bc 100644 --- a/src/compiler/spirv/vtn_opencl.c +++

[Mesa-dev] [PATCH 09/22] glsl: add cl_size and cl_alignment

Signed-off-by: Karol Herbst --- src/compiler/glsl_types.cpp | 48 + src/compiler/glsl_types.h | 10 src/compiler/nir_types.cpp | 12 ++ src/compiler/nir_types.h| 4 4 files changed, 74 insertions(+) diff --git a/src/compiler/glsl_

[Mesa-dev] [PATCH 07/22] glsl: add packed for struct types

We need this for OpenCL kernels because we have to apply C rules for alignment and padding inside structs and for this we also have to know if a struct is packed or not. Signed-off-by: Karol Herbst --- src/compiler/glsl_types.cpp | 17 +++-- src/compiler/glsl_types.h |

[Mesa-dev] [PATCH 13/22] nir/spirv: parse memory model

Signed-off-by: Karol Herbst --- src/compiler/nir/nir.h| 8 src/compiler/nir/nir_clone.c | 1 + src/compiler/nir/nir_serialize.c | 2 ++ src/compiler/spirv/spirv_to_nir.c | 15 +-- 4 files changed, 24 insertions(+), 2 deletions(-) diff --git a/src/compile

[Mesa-dev] [PATCH 03/22] nir/spirv: initial handling of OpenCL.std extension opcodes

Not complete, mostly just adding things as I encounter them in CTS. But not getting far enough yet to hit most of the OpenCL.std instructions. Anyway, this is better than nothing and covers the most common builtins. Signed-off-by: Karol Herbst --- src/compiler/nir/meson.build | 1 +

[Mesa-dev] [PATCH 12/22] nir: add type alignment support to lower_io

From: Rob Clark For cl we can have structs with 8/16/32/64 bit scalar types (as well as, ofc, arrays/structs/etc), which are padded according to 'C' rules. So for lowering struct deref's we need to not just consider a field's size, but also it's alignment. Signed-off-by: Karol Herbst --- src/

[Mesa-dev] [PATCH 17/22] nir: rename global to private memory

the naming is a bit confusing no matter how you look at it. Within OpenCL "global" memory is memory accessible from all threads. glsl "global" memory normally refers to shader thread private memory declared at global scope. As we already use "shared" for memory shared across all thrads of a work gr

[Mesa-dev] [PATCH 04/22] nir/spirv: add OpIsFinite and OpIsNormal

From: Rob Clark changes by Karol: v2: make compatible with 64 bit floats fix isfinite v3: use snake_case. Signed-off-by: Karol Herbst --- src/compiler/spirv/vtn_alu.c | 32 1 file changed, 32 insertions(+) diff --git a/src/compiler/spirv/vtn_alu.c b/src/co

[Mesa-dev] [PATCH 10/22] nir/vtn: add caps for some cl related capabilities

From: Rob Clark vtn supports these, so don't squalk if user is happy with enabling these. Signed-off-by: Karol Herbst --- src/compiler/shader_info.h | 3 +++ src/compiler/spirv/spirv_to_nir.c | 16 +--- src/compiler/spirv/vtn_variables.c | 6 -- 3 files changed, 20 i

[Mesa-dev] [PATCH 15/22] nir: add support for address bit sized system values

Signed-off-by: Karol Herbst --- src/amd/vulkan/radv_meta_buffer.c | 8 ++-- src/amd/vulkan/radv_meta_bufimage.c | 16 src/amd/vulkan/radv_meta_fast_clear.c | 4 +- src/amd/vulkan/radv_meta_resolve_cs.c | 4 +- src/amd/vulkan/radv_query.c

[Mesa-dev] [PATCH 14/22] nir: add legal bit_sizes to intrinsics

With OpenCL some system values match the address bits, but in GLSL we also have some system values being 64 bit. With this it is possible to adjust the builder functions so that depending on the bit_sizes the correct bit_size is used or an additional argument is added in case of multiple possible

[Mesa-dev] [PATCH 20/22] nir/spirv: physical pointer support

this adds support for pointers from CL kernels. The basic idea here is to be able to start a deref chain from a random ssa value and vice versa. changes summed up: 1. derefs can start from a deref_cast 2. new ptr_as_array deref type to offset a pointer 3. derefs can end with a ssa_from_deref intri

[Mesa-dev] [PATCH 19/22] nir/spirv: handle kernel function parameters

the idea here is to generate an entry point stub function wrapping around the actual kernel function and turn all parameters into shader inputs with byte addressing instead of vec4. This gives us several advantages: 1. calling kernel functions doesn't differ from calling any other function 2. CL i

Re: [Mesa-dev] [PATCH] egl/dri: fix error value with unknown drm format

On 13/11/2018 15:43, Emil Velikov wrote: On Tue, 13 Nov 2018 at 14:11, Lionel Landwerlin wrote: According to the EGL_EXT_image_dma_buf_import spec, creating an EGL image with a DRM format not supported should yield the BAD_MATCH error : " * If is EGL_LINUX_DMA_BUF_EXT, and the EGL_LIN

[Mesa-dev] [PATCH 22/22] nir/spirv: handle OpBitcasts for pointers

Signed-off-by: Karol Herbst --- src/compiler/spirv/spirv_to_nir.c | 5 +- src/compiler/spirv/vtn_alu.c | 187 +- src/compiler/spirv/vtn_private.h | 3 + 3 files changed, 115 insertions(+), 80 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src

Re: [Mesa-dev] [PATCH v2 3/5] i965: avoid 'unused variable'

On Tuesday, 2018-11-13 14:19:30 +0200, asimiklit.w...@gmail.com wrote: > From: Andrii Simiklit > > 1. brw_pipe_control.c:311:34: warning: > unused variable ‘devinfo’ > 2. brw_program_binary.c:209:19: warning: > unused variable ‘gen_size’ > 3. brw_program_binary.c:216:19: warning: > un

[Mesa-dev] [Bug 108734] Regression: [bisected] dEQP-GLES31.functional.tessellation.invariance.* start failing on r600

https://bugs.freedesktop.org/show_bug.cgi?id=108734 Bug ID: 108734 Summary: Regression: [bisected] dEQP-GLES31.functional.tessellation.invariance.* start failing on r600 Product: Mesa Version: git Hardwa

Re: [Mesa-dev] [PATCH v2 4/5] main: avoid 'may be used uninitialized' warnings

On Tuesday, 2018-11-13 14:19:31 +0200, asimiklit.w...@gmail.com wrote: > From: Andrii Simiklit > > 1. main/texcompress_etc.c:1314:12: > warning: ‘*((void *)&dst+2)’ may be used uninitialized in this function > 2. main/texcompress_etc.c:1354:12: > warning: ‘*((void *)&dst+2)’ may be used u

Re: [Mesa-dev] [PATCH 16/28] Replace IROUND_POS with _mesa_roundevenf

Quoting Erik Faye-Lund (2018-11-13 01:34:53) > On Mon, 2018-11-12 at 09:22 -0800, Dylan Baker wrote: > > Quoting Erik Faye-Lund (2018-11-12 04:51:47) > > > On Fri, 2018-11-09 at 10:40 -0800, Dylan Baker wrote: > > > > Which has the same behavior. > > > > > > Does it? I'm not so sure... IROUND_POS

Re: [Mesa-dev] [PATCH v2 5/5] intel/tools: avoid 'ignoring return value'

On Tuesday, 2018-11-13 14:19:32 +0200, asimiklit.w...@gmail.com wrote: > From: Andrii Simiklit > > 1. tools/i965_disasm.c:58:4: warning: > ignoring return value of ‘fread’, > declared with attribute warn_unused_result > fread(assembly, *end, 1, fp); > > v2: - Fixed incorrect retur

Re: [Mesa-dev] [PATCH mesa] xmlpool: update translation po files

On Tuesday, 2018-11-13 13:37:14 +, Emil Velikov wrote: > On Mon, 12 Nov 2018 at 18:14, Dylan Baker wrote: > > > > Quoting Eric Engestrom (2018-11-12 09:47:22) > > > On Monday, 2018-11-12 16:56:32 +, Emil Velikov wrote: > > > > On Mon, 12 Nov 2018 at 14:24, Eric Engestrom > > > > wrote: >

[Mesa-dev] [RFC PATCH 0/8] Add and enable extension EXT_sRGB_write_control (reworked)

From: Gert Wollny Dear all, based on the feedback given by Ilia I've completely reworked the series to add internal support for EXT_sRGB as a stepstone to implement EXT_sRGB_write_control and expose GLES 3.0 properly. Since the series has been reworked thoroughly, most of the original patches

[Mesa-dev] [RFC PATCH 1/8] Gallium: Add new CAPS to indicate whether a driver can switch SRGB write

From: Gert Wollny Add a new cap that indicates whether the drivers supports enabling/disabling the conversion from linear space to sRGB for a framebuffer attachment. Signed-off-by: Gert Wollny --- src/gallium/auxiliary/util/u_screen.c | 3 +++ src/gallium/docs/source/screen.rst| 3 +++ src

[Mesa-dev] [RFC PATCH 4/8] mesa/main/version: Lower the requirements for GLES 3.0

From: Gert Wollny GLES 3.0 does not actually require support for EXT_framebuffer_sRGB, it only needs support for sRGB attachments to framebuffers. Signed-off-by: Gert Wollny --- src/mesa/main/version.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mesa/main/versi

[Mesa-dev] [RFC PATCH 2/8] virgl: Set sRGB write control CAP based on host capabilities

From: Gert Wollny Signed-off-by: Gert Wollny --- src/gallium/drivers/virgl/virgl_hw.h | 1 + src/gallium/drivers/virgl/virgl_screen.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/src/gallium/drivers/virgl/virgl_hw.h b/src/gallium/drivers/virgl/virgl_hw.h index e682c750e7..7b4c063

[Mesa-dev] [RFC PATCH 7/8] mesa/main: Remove now superfluos tests for both EXT_sRGB and EXT_framebuffer_sRGB

From: Gert Wollny Signed-off-by: Gert Wollny --- src/mesa/main/fbobject.c | 2 +- src/mesa/main/teximage.c | 3 +-- src/mesa/main/version.c | 5 ++--- 3 files changed, 4 insertions(+), 6 deletions(-) diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c index ca3f3f7f76..7d45ce43f4

[Mesa-dev] [RFC PATCH 8/8] mesa/main: Expose EXT_sRGB_write_control

From: Gert Wollny Use EXT_framebuffer_sRGB to expose EXT_sRGB_write_control on GLES. Remove the checks for desktion GL in the enable calls, since EXT_framebuffer_sRGB now also indicates support for switching the linear-sRGB color space conversion on GLES. Thanks to Ilia Mirkin for all the helpfu

[Mesa-dev] [RFC PATCH 6/8] i965: Set flag for EXT_sRGB

From: Gert Wollny Signed-off-by: Gert Wollny --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index d7e02efb54..ca369e39f2 100644 --- a/src/mesa/drive

[Mesa-dev] [RFC PATCH 5/8] mesa/st: rework support for sRGB framebuffer attachements

From: Gert Wollny For GLES sRGB framebuffer attachemnt support is provided in two steps: sRGB attachments like described in EXT_sRGB and GLES 3.0 that enable linear to sRGB color space transformation automatically, and sRGB write control that brings GLES on par with EXT_framebuffer_sRGB. Set the

[Mesa-dev] [RFC PATCH 3/8] mesa/main: Add flag for EXT_sRGB and use it parallel with EXT_framebuffer_sRGB

From: Gert Wollny EXT_sRGB is an (incomplete) GLES extension that provides support for sRGB framebuffer attachments, hence it can be used to check for this support as an alternative to EXT_framebuffer_sRGB that provies the same functionality but also sRGB write control support. All drivers that

Re: [Mesa-dev] [RFC PATCH 1/8] Gallium: Add new CAPS to indicate whether a driver can switch SRGB write

On Tue, Nov 13, 2018 at 12:28 PM Gert Wollny wrote: > > From: Gert Wollny > > Add a new cap that indicates whether the drivers supports > enabling/disabling the conversion from linear space to sRGB > for a framebuffer attachment. > > Signed-off-by: Gert Wollny > --- > src/gallium/auxiliary/util

Re: [Mesa-dev] [PATCH 2/2] util/ralloc: Make sizeof(linear_header) a multiple of 8

Hi Matt, On Mon, 12 Nov 2018 at 21:26, Matt Turner wrote: > > Prior to this patch sizeof(linear_header) was 20 bytes in a > non-debug build on 32-bit platforms. We do some pointer arithmetic to > calculate the next available location with > >ptr = (linear_size_chunk *)((char *)&latest[1] + la

Re: [Mesa-dev] [PATCH 2/2] util/ralloc: Make sizeof(linear_header) a multiple of 8

On Tue, Nov 13, 2018 at 9:43 AM Emil Velikov wrote: > > Hi Matt, > > On Mon, 12 Nov 2018 at 21:26, Matt Turner wrote: > > > > Prior to this patch sizeof(linear_header) was 20 bytes in a > > non-debug build on 32-bit platforms. We do some pointer arithmetic to > > calculate the next available loca

Re: [Mesa-dev] [RFC PATCH 4/8] mesa/main/version: Lower the requirements for GLES 3.0

Is ARB_framebuffer_object really needed? IIRC one of the sticking points is that it allows differently-sized render targets. Does ES3 allow that? If so, this is fine. On Tue, Nov 13, 2018 at 12:28 PM Gert Wollny wrote: > > From: Gert Wollny > > GLES 3.0 does not actually require support for EXT_

[Mesa-dev] [PATCH 2/3] st/xa: Minor renderer cleanups

constify function arguments to clean up the code a bit. Reported-by: Brian Paul Signed-off-by: Thomas Hellstrom Reviewed-by: Brian Paul --- src/gallium/state_trackers/xa/xa_renderer.c | 24 ++--- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/gallium/state_

Re: [Mesa-dev] [RFC PATCH 7/8] mesa/main: Remove now superfluos tests for both EXT_sRGB and EXT_framebuffer_sRGB

Why not order the series such that this commit is not needed? On Tue, Nov 13, 2018 at 12:28 PM Gert Wollny wrote: > > From: Gert Wollny > > Signed-off-by: Gert Wollny > --- > src/mesa/main/fbobject.c | 2 +- > src/mesa/main/teximage.c | 3 +-- > src/mesa/main/version.c | 5 ++--- > 3 files cha

[Mesa-dev] [PATCH 1/3] st/xa: Fix transformations when we have both source and mask samplers

In the case when we had both source and mask samplers, transformations were typically not applied correctly. Signed-off-by: Thomas Hellstrom Reviewed-by: Brian Paul --- src/gallium/state_trackers/xa/xa_renderer.c | 117 1 file changed, 49 insertions(+), 68 deletions(-) dif

[Mesa-dev] [PATCH 3/3] st/xa: Support Component Alpha with trivial blending

Support Component Alpha for those composite operations that do not require per-channel alpha blending. Signed-off-by: Thomas Hellstrom Reviewed-by: Brian Paul --- src/gallium/state_trackers/xa/xa_composite.c | 33 src/gallium/state_trackers/xa/xa_priv.h | 1 + src/gal

[Mesa-dev] [PATCH] mesa/st: swap order of clear() and clear_with_quad()

If we can't clear all the buffers with pctx->clear() (say, for example, because of ColorMask), push the buffers we *can* clear with pctx->clear() first. Tilers want to see clears coming before draws to enable fast- paths, and clearing one of the attachments with a quad-draw first confuses that log

Re: [Mesa-dev] [PATCH 06/13] anv: move helper function internally

Thanks, pushed 1-6 for now. On 08/11/2018 22:42, Jason Ekstrand wrote: I left a nit on 3.  Otherwise, 1-6 are Reviewed-by: Jason Ekstrand > On Mon, Nov 5, 2018 at 9:36 AM Lionel Landwerlin mailto:lionel.g.landwer...@intel.com>> wrote: It's only used in anv

[Mesa-dev] [RFC] mesa/st: better colormask check for clear fallback

For RGB surfaces (for example) we don't really care that the colormask is 0x7 instead of 0xf. This should not trigger clear_with_quad() slowpath. Signed-off-by: Rob Clark --- This avoids some mem->gmem for webgl and probably other things using a RGB surface. This should be ok for 24b packed RGB

[Mesa-dev] [PATCH 1/9] freedreno: a2xx: fd2_draw update for a20x

Signed-off-by: Jonathan Marek --- src/gallium/drivers/freedreno/a2xx/fd2_draw.c | 97 --- .../drivers/freedreno/freedreno_batch.c | 1 + .../drivers/freedreno/freedreno_batch.h | 1 + .../drivers/freedreno/freedreno_draw.c| 2 + .../drivers/freedreno/freedre

[Mesa-dev] [PATCH 3/9] freedreno: add missing a20x ids

200: 256KiB GMEM A200 (imx53) 201: 128KiB GMEM A200 (imx51) Signed-off-by: Jonathan Marek --- src/gallium/drivers/freedreno/freedreno_screen.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.

[Mesa-dev] [PATCH 5/9] a2xx: Compute depth base in gmem correctly

Note: it needs rnndb update Signed-off-by: Marek Vasut Signed-off-by: Jonathan Marek --- src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c b/src/gallium/drivers/freedreno/

[Mesa-dev] [PATCH 8/9] freedreno: implement a20x hw binning

Not in this patch: emitting the hw binning variant and filling the "draw_patches". That is part of the ir2 patch. Signed-off-by: Jonathan Marek --- src/gallium/drivers/freedreno/a2xx/fd2_draw.c | 47 +-- src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 8 +- src/gallium/drivers/freedreno/a

[Mesa-dev] [PATCH 6/9] freedreno: a2xx texture update

Adds all missing texture related logic. For everything to work it also needs changes to ir2/fd2_program, which are part of the ir2 update patch. Note: it needs rnndb update Signed-off-by: Jonathan Marek --- .../drivers/freedreno/Makefile.sources| 2 + src/gallium/drivers/freedreno/a2xx

[Mesa-dev] [PATCH 2/9] freedreno: a2xx: fix POINT_MINMAX_MAX overflow

As it stands, it overflows to zero. Signed-off-by: Jonathan Marek --- src/gallium/drivers/freedreno/a2xx/fd2_rasterizer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_rasterizer.c b/src/gallium/drivers/freedreno/a2xx/fd2_rasterizer.c

[Mesa-dev] [PATCH 4/9] freedreno: a2xx: set VIZ_QUERY_ID on a20x

Signed-off-by: Jonathan Marek --- src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c index 20bfd06b13..50e2fe13eb 100644 --- a/src/gallium/drivers/fre

[Mesa-dev] [PATCH 7/9] freedreno: use GENERIC instead of TEXCOORD for blit program

blip_fp uses GENERIC as input, so blit_vp should match for linking Signed-off-by: Jonathan Marek --- src/gallium/drivers/freedreno/freedreno_program.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/freedreno/freedreno_program.c b/src/gallium/drivers/free

Re: [Mesa-dev] [PATCH 05/22] nir/spirv: cast shift operand to u32

Reviewed-by: Jason Ekstrand Cc: mesa-sta...@lists.freedesktop.org On Tue, Nov 13, 2018 at 9:48 AM Karol Herbst wrote: > v2: fix for specialization constants as well > > Signed-off-by: Karol Herbst > --- > src/compiler/spirv/spirv_to_nir.c | 20 > src/compiler/spirv/vtn_al

Re: [Mesa-dev] [PATCH 05/22] nir/spirv: cast shift operand to u32

Also, I don't see why this one and the first two can't land today. They're obvious clean-ups. On Tue, Nov 13, 2018 at 3:11 PM Jason Ekstrand wrote: > Reviewed-by: Jason Ekstrand > Cc: mesa-sta...@lists.freedesktop.org > > On Tue, Nov 13, 2018 at 9:48 AM Karol Herbst wrote: > >> v2: fix for sp

Re: [Mesa-dev] [PATCH 1/2] nir: add lowering for ffloor

Am 12.11.18 um 20:40 schrieb Jason Ekstrand: > On Mon, Nov 12, 2018 at 1:29 PM Christian Gmeiner > mailto:christian.gmei...@gmail.com>> wrote: > > Hi Jason > > Am Sa., 1. Sep. 2018 um 21:23 Uhr schrieb Jason Ekstrand > mailto:ja...@jlekstrand.net>>: > > > > I don't think eithe

[Mesa-dev] [PATCH 1/2] radeonsi: don't send data after write-confirm with BOTTOM_OF_PIPE_TS

From: Marek Olšák There are no writes. --- src/gallium/drivers/radeonsi/si_fence.c | 3 +-- src/gallium/drivers/radeonsi/si_perfcounter.c | 3 +-- src/gallium/drivers/radeonsi/si_query.c | 8 +++- 3 files changed, 5 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/

[Mesa-dev] [PATCH 2/2] radeonsi: go back to using bottom-of-pipe for beginning of TIME_ELAPSED

From: Marek Olšák Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102597 Cc: 18.3 --- src/gallium/drivers/radeonsi/si_query.c | 15 --- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_query.c b/src/gallium/drivers/radeonsi/si_q

Re: [Mesa-dev] [PATCH 05/22] nir/spirv: cast shift operand to u32

yeah... I planned to push the first two patches some time ago. Simply forgot about those. On Tue, Nov 13, 2018 at 10:13 PM Jason Ekstrand wrote: > > Also, I don't see why this one and the first two can't land today. They're > obvious clean-ups. > > On Tue, Nov 13, 2018 at 3:11 PM Jason Ekstrand

Re: [Mesa-dev] [PATCH 1/2] nir: add lowering for ffloor

On Tue, Nov 13, 2018 at 3:21 PM Roland Scheidegger wrote: > Am 12.11.18 um 20:40 schrieb Jason Ekstrand: > > On Mon, Nov 12, 2018 at 1:29 PM Christian Gmeiner > > mailto:christian.gmei...@gmail.com>> > wrote: > > > > Hi Jason > > > > Am Sa., 1. Sep. 2018 um 21:23 Uhr schrieb Jason Ekstran

Re: [Mesa-dev] [PATCH] st/mesa: don't do L3 thread pinning for Blender

Hi Marek Sure. Thanks for writing these patches. The looks good. I've done some small testing: drawoverhead numbers looks great in my eyes: 29: DrawElements ( 1 VBO, 8 UBO, 8 Tex) w/ sample mask enable change: 6.63 million (94.7%) Hitman benchmark runs nicely, even slightly bit faster tha

Re: [Mesa-dev] [PATCH v3] i965: Fix calculation of layers array length for isl_view

On Mon, Sep 10, 2018 at 10:21 AM Danylo Piliaiev wrote: > Handle all cases in calculation of layers count for isl_view > taking into account texture view and image unit. > st_convert_image was taken as a reference. > > When u->Layered is true the whole level is taken with respect to > image view.

Re: [Mesa-dev] [PATCH v2] nir: Allow to skip integer ops in nir_lower_to_source_mods

Looks correct. Reviewed-by: Jason Ekstrand On Mon, Nov 12, 2018 at 2:17 AM Gert Wollny wrote: > From: Gert Wollny > > Some hardware supports source mods only for float operations. Make it > possible to skip lowering to source mods in these cases. > > v2: use option flags instead of a boolean

Re: [Mesa-dev] [PATCH v3] i965: Fix calculation of layers array length for isl_view

On Tue, Nov 13, 2018 at 4:53 PM Jason Ekstrand wrote: > > On Mon, Sep 10, 2018 at 10:21 AM Danylo Piliaiev > wrote: >> >> Handle all cases in calculation of layers count for isl_view >> taking into account texture view and image unit. >> st_convert_image was taken as a reference. >> >> When u->L

Re: [Mesa-dev] [PATCH 16/28] Replace IROUND_POS with _mesa_roundevenf

Am 13.11.18 um 18:00 schrieb Dylan Baker: > Quoting Erik Faye-Lund (2018-11-13 01:34:53) >> On Mon, 2018-11-12 at 09:22 -0800, Dylan Baker wrote: >>> Quoting Erik Faye-Lund (2018-11-12 04:51:47) On Fri, 2018-11-09 at 10:40 -0800, Dylan Baker wrote: > Which has the same behavior.

Re: [Mesa-dev] [PATCH] mesa/st: swap order of clear() and clear_with_quad()

Rob Clark writes: > If we can't clear all the buffers with pctx->clear() (say, for example, > because of ColorMask), push the buffers we *can* clear with pctx->clear() > first. Tilers want to see clears coming before draws to enable fast- > paths, and clearing one of the attachments with a quad-

[Mesa-dev] [PATCH 4/5] i965/icl: Set config#9 as default config

Config#6 recommended by h/w specification causes multiple piglit regressions. Use config#9 instead which works well. Setting a weight here so that we get the desired config. Signed-off-by: Anuj Phogat Cc: Kenneth Graunke Cc: Francisco Jerez Cc: Lionel Landwerlin --- src/intel/common/gen_l3_co

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