Den ons 19 dec. 2018 17:44 skrev Jonathan Marek :
> When ffma is available, we can use a different arrangement of constants to
> get a better result. On freedreno/ir3, this reduces the YUV->RGB to 7
> scalar ffma. On freedreno/a2xx, it will allow YUV->RGB to be 3 vec4 ffma.
>
> Signed-off-by: Jona
https://bugs.freedesktop.org/show_bug.cgi?id=105376
--- Comment #3 from Daniel van Vugt ---
Also, on a real 120Hz display, es2gears_wayland reports 240 FPS. Verified in
both gnome-shell and weston.
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On Wed, Dec 19, 2018 at 12:50 PM Jason Ekstrand wrote:
> What do you suggest to solve this communication issue? If autotools survives
> another release, so be it. However, I want to get us out of the vicious
> cycle of long e-mail threads and endless debates and on to a model where
> Dylan is
For the series:
Tested-by: Dieter Nützel
(with my 'normal' apps) ;-)
+ LS2015 (D3D9) under Wine Staging Nine 4.0-rc2
nice numbers
Dieter
Am 16.12.2018 22:25, schrieb Axel Davy:
This patch introduces a structure to release the
present_handles only when they are fully released
by the server,
For the series:
Tested-by: Dieter Nützel
(with my 'normal' apps) ;-)
Dieter
Am 19.12.2018 11:03, schrieb Timothy Arceri:
This will help the new opt introduced in the following patches
allowing us to remove extra duplicate varyings.
Reviewed-by: Marek Olšák
---
src/gallium/drivers/radeonsi
For the series:
Tested-by: Dieter Nützel
(with my 'normal' apps) ;-)
Dieter
Am 18.12.2018 02:17, schrieb Timothy Arceri:
---
src/gallium/drivers/radeonsi/si_shader.h| 1 -
src/gallium/drivers/radeonsi/si_shader_nir.c| 1 -
src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +-
For the series:
Tested-by: Dieter Nützel
(with my 'normal' apps) ;-)
Dieter
Am 14.12.2018 22:23, schrieb Marek Olšák:
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_pipe.h | 3 +++
src/gallium/drivers/radeonsi/si_state_draw.c | 9 +++--
2 files changed, 10 insertions(+),
I personally don't see a point in reimplementing existing LLVM functions.
There is also LLVMConstNull for zeros and LLVMConstAllOnes for integer
ones, though I think those are mainly good for vectors and people are most
used to seeing LLVMConstInt and LLVMConstReal for scalars.
Marek
On Wed, Dec
Replying myself:
FIXED with Ian's
nir/algebraic: Don't put quotes around floating point literals
commit #96c4b135e34d0804e41bfbc28fc1b5050c49d71e
Thanks!
Dieter
Am 19.12.2018 06:36, schrieb Dieter Nützel:
Sorry guys,
but my son got a RADV + DXVK 0.93 and 0.94 (D3D11) regression running
bran
Gert/Ilia,
Could this be reduced this from an error to a warning, with the
command-line option suppressing the warning?
Perhaps as well as producing the warning, the build could sleep for say 30
seconds after producing the warning message. This would be noticeable if
you're building it yourself (
https://bugs.freedesktop.org/show_bug.cgi?id=109107
zhoulei changed:
What|Removed |Added
Version|unspecified |git
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https://bugs.freedesktop.org/show_bug.cgi?id=109107
Bug ID: 109107
Summary: gallium/st/va: change va max_profiles when using
Radeon VCN Hardware
Product: Mesa
Version: unspecified
Hardware: All
OS: All
Reviewed-by: Bas Nieuwenhuizen
On Wed, Dec 19, 2018 at 11:05 PM Jason Ekstrand wrote:
>
> Fixes: 44227453ec03f "nir: Switch to using 1-bit Booleans for almost..."
> Reviewed-by: Rhys Perry
> ---
> src/amd/vulkan/radv_query.c | 42 ++---
> 1 file changed, 21 inse
On Wed, Dec 19, 2018 at 4:06 PM Bas Nieuwenhuizen
wrote:
> On Wed, Dec 19, 2018 at 8:45 PM Jason Ekstrand
> wrote:
> >
> > This is little more than an iadd_imm right now but it will help in the
> > next commit where we refactor things further.
> > ---
> > src/amd/vulkan/radv_query.c | 31 ++
On Wed, Dec 19, 2018 at 8:45 PM Jason Ekstrand wrote:
>
> This is little more than an iadd_imm right now but it will help in the
> next commit where we refactor things further.
> ---
> src/amd/vulkan/radv_query.c | 31 ---
> 1 file changed, 16 insertions(+), 15 deletio
Fixes: 44227453ec03f "nir: Switch to using 1-bit Booleans for almost..."
Reviewed-by: Rhys Perry
---
src/amd/vulkan/radv_query.c | 42 ++---
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
in
I would expect these helpers to be much more efficient than the
functions you suggested. They are also (in my opinion) more readable
than the suggested functions.
I don't think it matters much though, so I'm fine either way.
On Tue, 18 Dec 2018 at 02:48, Marek Olšák wrote:
>
> On Fri, Dec 7, 201
You missed this change (or something functionally similar):
diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
index e7bb81489f6..5d35af05579 100644
--- a/src/amd/vulkan/radv_query.c
+++ b/src/amd/vulkan/radv_query.c
@@ -630,8 +630,8 @@ build_tfb_query_shader(struct radv_device
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/33
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On Wed, Dec 19, 2018, 3:32 PM Eric Anholt Jonathan marek writes:
>
> > Hi,
> >
> > I didn't verify it, but both r600 and a3xx disable earlyZ when alpha
> > test is enabled, so this is almost certainly right.
> >
> > We don't need to worry about the shader writing Z, it is not part of
> > OpenGL E
On 12/19/18 9:23 PM, Ilia Mirkin wrote:
> On Wed, Dec 19, 2018 at 3:18 AM Eduardo Lima Mitev wrote:
>>
>> An earlier patch that introduced the function failed to handle the case
>> where an image format layout qualifier is not specified, which is allowed
>> in Core profiles. In these cases, nir_va
Am Mittwoch, den 19.12.2018, 12:19 -0500 schrieb Ilia Mirkin:
> On Sun, Dec 16, 2018 at 6:24 AM Gert Wollny
> wrote:
> >
> > Since Meson will eventually be the only build system deprecate
> > autotools
> > now. It can still be used by invoking configure with the flag
> > --enable-autotools
> >
Jonathan marek writes:
> Hi,
>
> I didn't verify it, but both r600 and a3xx disable earlyZ when alpha
> test is enabled, so this is almost certainly right.
>
> We don't need to worry about the shader writing Z, it is not part of
> OpenGL ES 2.0 and not implemented by the driver (although the ha
On Wed, Dec 19, 2018 at 3:18 AM Eduardo Lima Mitev wrote:
>
> An earlier patch that introduced the function failed to handle the case
> where an image format layout qualifier is not specified, which is allowed
> in Core profiles. In these cases, nir_variable's image format is
> GL_NONE, and we don
On Wed, Dec 19, 2018 at 12:22 PM Eric Anholt wrote:
> Jonathan Marek writes:
>
> > Note: the backend must take care that uniform index is now a float
>
> This makes me think that lowering ints to float should be done near the
> end of the compile (followed by maybe an algebraic and a dce). As i
Fixes: 44227453ec03f "nir: Switch to using 1-bit Booleans for almost..."
---
src/amd/vulkan/radv_query.c | 38 ++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
index 6e88de691d6..e7bb8148
When we switched over to 1-bit booleans, the radv query shaders ended up
still using 32-bit booleans for most stuff. While this is technically
valid from an IR perspective, most of the NIR passes don't really support
32-bit booleans correctly anymore now that we've moved to 1-bit. This tiny
serie
This is little more than an iadd_imm right now but it will help in the
next commit where we refactor things further.
---
src/amd/vulkan/radv_query.c | 31 ---
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/ra
https://bugs.freedesktop.org/show_bug.cgi?id=109071
--- Comment #5 from Dylan Baker ---
Meson PR that resolves the issue. I've tagged it for inclusion in 0.49.1 as
well
https://github.com/mesonbuild/meson/pull/4665
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On Wed, Dec 19, 2018 at 1:12 PM Alan Swanson
wrote:
> On Mon, 2018-12-17 at 16:16 +, Rhys Perry wrote:
> > Signed-off-by: Rhys Perry
> > ---
> > src/compiler/nir/nir_opt_peephole_select.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/src/compiler/nir/nir_
On Mon, 2018-12-17 at 16:16 +, Rhys Perry wrote:
> Signed-off-by: Rhys Perry
> ---
> src/compiler/nir/nir_opt_peephole_select.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/src/compiler/nir/nir_opt_peephole_select.c
> b/src/compiler/nir/nir_opt_peephole_select.
https://bugs.freedesktop.org/show_bug.cgi?id=109071
--- Comment #4 from Gert Wollny ---
Indeed, when I do meson --wipe . build it works :)
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I've sent a nit or two but the first 11 patches are
Reviewed-by: Jason Ekstrand
I'd be very happy for you to push them ahead of the rest of the series so
they don't end up in a v3 unless someone else requests significant changes.
On Wed, Dec 19, 2018 at 5:51 AM Iago Toral Quiroga
wrote:
> The
https://bugs.freedesktop.org/show_bug.cgi?id=109071
--- Comment #3 from Dylan Baker ---
It's much simpler than that, calling meson --wipe from the build dir doesn't
work! I can fix this
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On Wed, Dec 19, 2018 at 5:51 AM Iago Toral Quiroga
wrote:
> v2:
> - use nir_fadd_imm and nir_fmul_imm helpers (Jason)
> ---
> src/compiler/spirv/vtn_glsl450.c | 44 +++-
> 1 file changed, 26 insertions(+), 18 deletions(-)
>
> diff --git a/src/compiler/spirv/vtn_glsl4
https://bugs.freedesktop.org/show_bug.cgi?id=109071
--- Comment #2 from Gert Wollny ---
I did not call "meson build" but just "meson like below" from the
empty build directory, and then I simply tried "meson --wipe ", I didn't
touch the mesa tree.
The CFLAGS and CXXFLAGS are not important it s
I haven't encountered such dereference issues, but lowering integers
later is a good idea (as with bools which are now lowered later).
On 12/19/2018 01:22 PM, Eric Anholt wrote:
Jonathan Marek writes:
Note: the backend must take care that uniform index is now a float
This makes me think th
Quoting Nicolai Hähnle (2018-12-18 09:37:43)
> On 17.12.18 23:46, Dylan Baker wrote:
> > Quoting Marek Olšák (2018-12-17 12:25:29)
> >> On Mon, Dec 17, 2018 at 1:18 PM Eric Anholt wrote:
> >>
> >> Eero Tamminen writes:
> >>
> >> > Hi,
> >> >
> >> > On 17.12.2018 8.08, Marek Ol
On Wed, Dec 19, 2018 at 5:51 AM Iago Toral Quiroga
wrote:
> v2:
> - use nir_fmul_imm and nir_fadd_imm helpers (Jason)
> ---
> src/compiler/spirv/vtn_glsl450.c | 23 ++-
> 1 file changed, 14 insertions(+), 9 deletions(-)
>
> diff --git a/src/compiler/spirv/vtn_glsl450.c
> b/
Jonathan Marek writes:
> Note: the backend must take care that uniform index is now a float
This makes me think that lowering ints to float should be done near the
end of the compile (followed by maybe an algebraic and a dce). As is, I
think nir_lower_io() is going to do bad things to dereferen
Hi,
I didn't verify it, but both r600 and a3xx disable earlyZ when alpha
test is enabled, so this is almost certainly right.
We don't need to worry about the shader writing Z, it is not part of
OpenGL ES 2.0 and not implemented by the driver (although the hardware
should allow it).
Why sho
Quoting Jason Ekstrand (2018-12-19 08:07:23)
> On Tue, Dec 18, 2018 at 2:51 AM Juan A. Suarez Romero
> wrote:
>
> On Mon, 2018-12-17 at 19:51 +0100, Bas Nieuwenhuizen wrote:
> > On Mon, Dec 17, 2018 at 6:33 PM Juan A. Suarez Romero
> > wrote:
> > > On Mon, 2018-12-03 at 10:21 +00
Jonathan Marek writes:
> Enable earlyZ when alpha test is disabled.
>
> Signed-off-by: Jonathan Marek
> ---
> src/gallium/drivers/freedreno/a2xx/fd2_zsa.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c
> b/src/gallium/dri
FWIW, with all the feedback I've given, I think autotools is not better
than meson. The issues that I reported won't make me switch back to
autotools.
Marek
On Wed, Dec 19, 2018, 12:45 PM Jason Ekstrand On Wed, Dec 19, 2018 at 10:32 AM Ilia Mirkin wrote:
>
>> On Wed, Dec 19, 2018 at 11:03 AM Ja
Hi,
No I did not see that. That version should work for me, although I don't
like the lowering of nir_op_inot it has, since the backend might have
something smarter to implement a "fnot" (and ior could also just be a
fmax instead).
On 12/19/2018 12:44 PM, Christian Gmeiner wrote:
Am Mi., 19
https://bugs.freedesktop.org/show_bug.cgi?id=109071
--- Comment #1 from Dylan Baker ---
I'm trying hard to replicate this and having a really hard time, it looks like
your meson configure line looks something like:
CFLAGS='-Wall -Wextra -Wdeprecated-declarations -O2 -g -funroll-loops
-ftree-vect
On Wed, Dec 19, 2018 at 10:32 AM Ilia Mirkin wrote:
> On Wed, Dec 19, 2018 at 11:03 AM Jason Ekstrand
> wrote:
> >
> > On Wed, Dec 19, 2018 at 9:32 AM Ilia Mirkin
> wrote:
> >>
> >> On Wed, Dec 19, 2018 at 10:25 AM Matt Turner
> wrote:
> >> >
> >> > On Wed, Dec 19, 2018 at 8:06 AM Ilia Mirkin
Am Mi., 19. Dez. 2018 um 17:44 Uhr schrieb Jonathan Marek :
>
> Mainly a copy of nir_lower_bool_to_int32, but with float opcodes.
>
Hmmm.. are you aware of https://patchwork.freedesktop.org/patch/257867/ and
https://gitlab.freedesktop.org/jekstrand/mesa/commit/cf819c8a3fa99ccedf423ea77cf710dbd8520
Hey Jonathan,
I'm kind of curious as to whether we can have a single expression that
pretty much generates the same final code (through some of the algebraic
lowering/optimizations).
I'll give it a try on Intel HW, see what it does.
-
Lionel
On 19/12/2018 16:39, Jonathan Marek wrote:
When f
Quoting Jonathan Marek (2018-12-19 08:40:04)
> Some instructions can only be scalar on a2xx, lower these only
>
> Signed-off-by: Jonathan Marek
> ---
> .../drivers/freedreno/Makefile.sources| 1 +
> src/gallium/drivers/freedreno/a2xx/ir2_nir.c | 3 +
> .../freedreno/a2xx/ir2_nir_low
Quoting Jonathan Marek (2018-12-19 08:39:53)
> Mainly a copy of nir_lower_bool_to_int32, but with float opcodes.
>
> Signed-off-by: Jonathan Marek
> ---
> src/compiler/Makefile.sources | 1 +
> src/compiler/nir/meson.build | 3 +-
> src/compiler/nir/nir.h
On Wednesday, December 19, 2018 8:10:49 AM PST Eric Engestrom wrote:
> The point of this patch is for people to not be able to ignore this, and
> have to become aware of the existence of Meson and our intention to
> remove autotools, whenever this may happen.
>
> Some people have already noticed,
On Sun, Dec 16, 2018 at 6:24 AM Gert Wollny wrote:
>
> Since Meson will eventually be the only build system deprecate autotools
> now. It can still be used by invoking configure with the flag
> --enable-autotools
>
> Signed-off-by: Gert Wollny
In case it's not clear from the later discussion:
On Wed, Dec 19, 2018 at 12:15 PM Matt Turner wrote:
>
> On Wed, Dec 19, 2018 at 12:06 PM Ilia Mirkin wrote:
> > > We're simply trying to get the feedback from users sooner. And the
> > > cost to you is very small: Use an extra flag. It's not a burden.
> >
> > Before the community is happy? Premat
On Wed, Dec 19, 2018 at 12:06 PM Ilia Mirkin wrote:
> > We're simply trying to get the feedback from users sooner. And the
> > cost to you is very small: Use an extra flag. It's not a burden.
>
> Before the community is happy? Premature. The way you build consensus
> for a new thing is not by shoo
This workaround has been introduced by 135e4d434f6 for fixing
DXVK GPU hangs with many games. It is no longer needed since
LLVM r345718.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_shader.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/amd/vulkan
On Wed, Dec 19, 2018 at 11:12 AM Matt Turner wrote:
> Regardless of all of that, what you're suggesting is only marking
> autotools as deprecated (i.e., this patch) after all known problems
> with the Meson build are fixed. At that point in 3 months down the
> line if we get another bug report fro
This workaround has been introduced by 3d41757788a and it
is no longer needed since LLVM r346422.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src
Fix looks good to me.
Reviewed-by: Roland Scheidegger
Am 19.12.18 um 04:50 schrieb Ilia Mirkin:
> Not sure if this ever worked, but the current logic for setting the
> min/max index is definitely wrong for indexed draws. While we're at it,
> bring in all the usual logic from the non-indirect dr
Fixup for the texture update patch.
Signed-off-by: Jonathan Marek
---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
index ce275a78a6.
Signed-off-by: Jonathan Marek
---
src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
index d9aad16b4a..77c8d80055 100644
--- a/src/gal
---
src/gallium/drivers/freedreno/a2xx/fd2_draw.c | 32 +++-
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 52 ++
src/gallium/drivers/freedreno/a2xx/fd2_emit.h | 3 +-
src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 150 ++
.../drivers/freedreno/a2xx/fd2_program.c |
Doesn't change much, but reduces the size of fd2_emit_state
gmem2mem does not need to change the value: no Z clipping on resolve
mem2gmem now needs to restore the common value after rendering
Signed-off-by: Jonathan Marek
---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 20 +-
When ffma is available, we can use a different arrangement of constants to
get a better result. On freedreno/ir3, this reduces the YUV->RGB to 7
scalar ffma. On freedreno/a2xx, it will allow YUV->RGB to be 3 vec4 ffma.
Signed-off-by: Jonathan Marek
---
src/compiler/nir/nir_lower_tex.c | 62 +
This works by moving the fadd up across the ffma operations, so that it
can eventually can be combined with a fmul. I'm not sure it works in all
cases, but it works in all the common cases.
This will only affect freedreno since it is the only driver using the
fuse_ffma option.
Example:
matrix
Some instructions can only be scalar on a2xx, lower these only
Signed-off-by: Jonathan Marek
---
.../drivers/freedreno/Makefile.sources| 1 +
src/gallium/drivers/freedreno/a2xx/ir2_nir.c | 3 +
.../freedreno/a2xx/ir2_nir_lower_scalar.c | 174 ++
.../drivers/freed
Two cases:
* replacing srcs which refer to MOV instructions
* replacing MOVs used to write to exports
Signed-off-by: Jonathan Marek
---
.../drivers/freedreno/Makefile.sources| 1 +
src/gallium/drivers/freedreno/a2xx/ir2.c | 6 +
src/gallium/drivers/freedreno/a2xx/ir2_cp.c | 22
Fixes cases where previous viewport values might case gmem2mem to fail.
Signed-off-by: Jonathan Marek
---
src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
b/src/gallium/drivers/freedreno/a2xx/
On a20x, set VGT_VERTEX_REUSE_BLOCK_CNTL to 2 and don't change it. Small
rearrangement on a220 to reduce the size of draw commands.
Only set DEALLOC_CNTL on a20x because the correct a220 value is not known.
Signed-off-by: Jonathan Marek
---
src/gallium/drivers/freedreno/a2xx/fd2_draw.c | 18 +++
Note: the backend must take care that uniform index is now a float
Signed-off-by: Jonathan Marek
---
src/compiler/glsl/glsl_to_nir.cpp | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
inde
Enable earlyZ when alpha test is disabled.
Signed-off-by: Jonathan Marek
---
src/gallium/drivers/freedreno/a2xx/fd2_zsa.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c
b/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c
index 64b31
We should now lower bool to float later.
Signed-off-by: Jonathan Marek
---
src/compiler/glsl/glsl_to_nir.cpp | 175 --
1 file changed, 71 insertions(+), 104 deletions(-)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
index d88289f
Mainly a copy of nir_lower_bool_to_int32, but with float opcodes.
Signed-off-by: Jonathan Marek
---
src/compiler/Makefile.sources | 1 +
src/compiler/nir/meson.build | 3 +-
src/compiler/nir/nir.h | 1 +
src/compiler/nir/nir_lower_bool_to_floa
out_type is always GLSL_TYPE_FLOAT, so we don't get the ftrunc otherwise
Signed-off-by: Jonathan Marek
---
src/compiler/glsl/glsl_to_nir.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
index c8a7f3bd6c..d88289f
Am 19.12.18 um 08:35 schrieb Jose Fonseca:
> On 19/12/2018 03:51, srol...@vmware.com wrote:
>> From: Roland Scheidegger
>>
>> This is (much) faster than using the util fallback.
>> (Note that there's two methods here, one would use a cache, similar to
>> the existing code (although the cache was d
On Wed, Dec 19, 2018 at 11:03 AM Jason Ekstrand wrote:
>
> On Wed, Dec 19, 2018 at 9:32 AM Ilia Mirkin wrote:
>>
>> On Wed, Dec 19, 2018 at 10:25 AM Matt Turner wrote:
>> >
>> > On Wed, Dec 19, 2018 at 8:06 AM Ilia Mirkin wrote:
>> > >
>> > > On Wed, Dec 19, 2018 at 1:01 AM Matt Turner wrote:
The commit message says fadd twice.
On Wed, Dec 19, 2018 at 5:51 AM Iago Toral Quiroga
wrote:
> ---
> src/compiler/nir/nir_builder.h | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/src/compiler/nir/nir_builder.h
> b/src/compiler/nir/nir_builder.h
> index 74ecde798d5..14f3
On Wednesday, 2018-12-19 10:32:44 -0500, Ilia Mirkin wrote:
> On Wed, Dec 19, 2018 at 10:25 AM Matt Turner wrote:
> >
> > On Wed, Dec 19, 2018 at 8:06 AM Ilia Mirkin wrote:
> > >
> > > On Wed, Dec 19, 2018 at 1:01 AM Matt Turner wrote:
> > > > WTF would you have us do?
> > >
> > > Same thing as
On Wed, Dec 19, 2018 at 10:32 AM Ilia Mirkin wrote:
>
> On Wed, Dec 19, 2018 at 10:25 AM Matt Turner wrote:
> >
> > On Wed, Dec 19, 2018 at 8:06 AM Ilia Mirkin wrote:
> > >
> > > On Wed, Dec 19, 2018 at 1:01 AM Matt Turner wrote:
> > > > WTF would you have us do?
> > >
> > > Same thing as for a
On Tue, Dec 18, 2018 at 2:51 AM Juan A. Suarez Romero
wrote:
> On Mon, 2018-12-17 at 19:51 +0100, Bas Nieuwenhuizen wrote:
> > On Mon, Dec 17, 2018 at 6:33 PM Juan A. Suarez Romero
> > wrote:
> > > On Mon, 2018-12-03 at 10:21 +, Eric Engestrom wrote:
> > > > Cc: Emil Velikov
> > > > Cc: And
On Wed, Dec 19, 2018 at 9:32 AM Ilia Mirkin wrote:
> On Wed, Dec 19, 2018 at 10:25 AM Matt Turner wrote:
> >
> > On Wed, Dec 19, 2018 at 8:06 AM Ilia Mirkin
> wrote:
> > >
> > > On Wed, Dec 19, 2018 at 1:01 AM Matt Turner
> wrote:
> > > > WTF would you have us do?
> > >
> > > Same thing as for
On Wed, Dec 19, 2018 at 10:25 AM Matt Turner wrote:
>
> On Wed, Dec 19, 2018 at 8:06 AM Ilia Mirkin wrote:
> >
> > On Wed, Dec 19, 2018 at 1:01 AM Matt Turner wrote:
> > > WTF would you have us do?
> >
> > Same thing as for any change with an impact this wide --
> >
> > 1. Identify stakeholders.
On 19.12.18 16:05, Michel Dänzer wrote:
From: Michel Dänzer
Fixes build failure if the LLVM headers aren't in a standard include
directory.
Huh, interesting that I didn't run into this. Anyway:
Reviewed-by: Nicolai Hähnle
Fixes: ec22dd34c88f "radeonsi: move SI_FORCE_FAMILY functionalit
Take into account the render target format when checking if the color
mask affects all channels of the RT. This allows to enable full
override in a few cases where a non-alpha format is used.
Signed-off-by: Lucas Stach
---
v2: clarify comment
---
src/gallium/drivers/etnaviv/etnaviv_blend.c | 11
Some of the status variables in the compiler are only used in asserts
and thus may be unused in release builds. Annotate them accordingly
to avoid 'unused but set' warnings from the compiler.
Signed-off-by: Lucas Stach
---
v2: get rid of superfluous variable initialization
---
src/gallium/driver
On Wed, Dec 19, 2018 at 8:06 AM Ilia Mirkin wrote:
>
> On Wed, Dec 19, 2018 at 1:01 AM Matt Turner wrote:
> > WTF would you have us do?
>
> Same thing as for any change with an impact this wide --
>
> 1. Identify stakeholders. In this case, probably the sub-project
> maintainers, major contributo
On 12/19/2018 06:47 AM, Ilia Mirkin wrote:
> On Wed, Dec 19, 2018 at 8:38 AM Brian Paul wrote:
>>
>> On 12/18/2018 08:50 PM, Ilia Mirkin wrote:
>>> Not sure if this ever worked, but the current logic for setting the
>>> min/max index is definitely wrong for indexed draws. While we're at it,
>>> br
From: Michel Dänzer
Fixes build failure if the LLVM headers aren't in a standard include
directory.
Fixes: ec22dd34c88f "radeonsi: move SI_FORCE_FAMILY functionality to
winsys"
Signed-off-by: Michel Dänzer
---
src/gallium/winsys/amdgpu/drm/Makefile.am | 1 +
src/gallium/wi
https://bugs.freedesktop.org/show_bug.cgi?id=109102
Chris Wilson changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |dri-devel@lists.freedesktop
https://bugs.freedesktop.org/show_bug.cgi?id=109102
--- Comment #1 from Gert vd Kraats ---
Created attachment 142856
--> https://bugs.freedesktop.org/attachment.cgi?id=142856&action=edit
ubuntu-cogl-patch
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the
https://bugs.freedesktop.org/show_bug.cgi?id=109102
Bug ID: 109102
Summary: At dual monitor intel_do_flush_locked failed: Resource
deadlock avoided
Product: Mesa
Version: 18.2
Hardware: x86 (IA32)
OS: Linux
Rb
On December 19, 2018 02:15:59 Iago Toral Quiroga wrote:
The former expects to see SSA-only things, but the latter injects registers.
The assertions in the lowering where not seeing this because they asserted
on the bit_size values only, not on the is_ssa field, so add that assertion
too.
On Wed, Dec 19, 2018 at 8:38 AM Brian Paul wrote:
>
> On 12/18/2018 08:50 PM, Ilia Mirkin wrote:
> > Not sure if this ever worked, but the current logic for setting the
> > min/max index is definitely wrong for indexed draws. While we're at it,
> > bring in all the usual logic from the non-indirec
On 12/18/2018 08:50 PM, Ilia Mirkin wrote:
> Not sure if this ever worked, but the current logic for setting the
> min/max index is definitely wrong for indexed draws. While we're at it,
> bring in all the usual logic from the non-indirect drawing path.
>
> Bugzilla:
> https://na01.safelinks.prot
On Wed, Dec 19, 2018 at 1:01 AM Matt Turner wrote:
> WTF would you have us do?
Same thing as for any change with an impact this wide --
1. Identify stakeholders. In this case, probably the sub-project
maintainers, major contributors, and a smattering of distro
maintainers.
2. Make them happy, or
https://bugs.freedesktop.org/show_bug.cgi?id=108935
Samuel Pitoiset changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
On Wed, 2017-08-23 at 22:51 +0200, Bas Nieuwenhuizen wrote:
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 1 +
> src/amd/vulkan/radv_meta_clear.c | 65
>
> src/amd/vulkan/radv_private.h| 1 +
> 3 files changed, 48 insertions(+), 19 deletions(-)
>
Hi.
On Tuesday, 2018-12-18 09:51:19 +0100, Juan A. Suarez Romero wrote:
> On Mon, 2018-12-17 at 19:51 +0100, Bas Nieuwenhuizen wrote:
> > On Mon, Dec 17, 2018 at 6:33 PM Juan A. Suarez Romero
> > wrote:
> > > On Mon, 2018-12-03 at 10:21 +, Eric Engestrom wrote:
> > > > Cc: Emil Velikov
> > > > Cc
Reviewed-by: Jason Ekstrand
---
src/intel/compiler/brw_compiler.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/compiler/brw_compiler.c
b/src/intel/compiler/brw_compiler.c
index f885e79c3e6..04a1a7cac4e 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_c
We use ALign16 mode for this, since it is more convenient, but the PRM
for Broadwell states in Volume 3D Media GPGPU, Chapter 'Register region
restrictions', Section '1. Special Restrictions':
"In Align16 mode, the channel selects and channel enables apply to a
pair of half-floats, because
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