We don't use param in this part of the code, so no point in advancing
the pointer forward:
>>> CID 1324983: Code maintainability issues (UNUSED_VALUE)
>>> Assigning value from "param->get_next()" to "param" here, but that
>>> stored value is overwritten before it can be used.
---
src/g
Add an assert on the result of as_dereference() not being NULL:
>>> CID 1324978: Null pointer dereferences (NULL_RETURNS)
>>> Dereferencing a null pointer "deref_record->record->as_dereference()".
Since we are introducing a new variable to hold the result of
as_dereference(), take the o
NIR is typeless so this is the only way to keep track of the
type to select the proper atomic to use.
---
I decided to squash the i965 changes in because otherwise we would break
the build between the nir and i965 patches. Let me know if we rather
split them anyway.
src/glsl/nir/glsl_to_nir.cpp
Comit d48ac9306619 addressed this for VS, but we forgot to do the same for
URB writes generated by the gen6 GS.
---
src/mesa/drivers/dri/i965/gen6_gs_visitor.cpp | 30 ---
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_gs_visi
That should make tracking where we do spills and pull loads a bit easier.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 --
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 --
src/mesa/drivers/dri/i965/brw_inst.h | 6 ++
src/mesa/drivers/dri/i965/brw_vec4_visitor
lls, but it looks like the right thing to do in any case.
I tested this on SandyBridge and IvyBridge and did not observe any
regressions in piglit.
Iago Toral Quiroga (3):
i965: Fix remove_duplicate_mrf_writes so it can handle 24 MRFs in gen6
i965: make pull constant loads in gen6 start at MRFs
So they do not conflict with our (un)spills (MRF 21..23) or our
URB writes (MRF 1..15)
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 --
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3 ++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 225a312..81fe7f5 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.
v2:
- Add ssbo_in the names of the static functions so it is clear that this
is specific to SSBO atomics.
v3:
- Move the check after the loop (Kristian Høgsberg)
---
src/glsl/ast_function.cpp | 42 ++
1 file changed, 42 insertions(+)
diff --git a/s
brw_fs_visitor.cpp: In member function 'void fs_visitor::emit_urb_writes()':
brw_fs_visitor.cpp:977:58: warning: comparison between signed and unsigned
integer expressions [-Wsign-compare]
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
There are some bug reports about shaders failing to compile in gen6
because MRF 14 is used when we need to spill. For example:
https://bugs.freedesktop.org/show_bug.cgi?id=86469
https://bugs.freedesktop.org/show_bug.cgi?id=90631
Discussion in bugzilla pointed to the fact that gen6 might actually h
Until now we only used MRFs 1..15 for regular SEND messages, so the
message length could not possibly exceed the maximum size. Now that
we allow to use MRF registers 1..23 in gen6, we need to be careful
not to build messages that can go beyond the limit. That could occur,
specifically, when buildin
In a later patch we will make BRW_MAX_MRF return a different value depending
on the hardware generation, but it is inconvenient to add a gen parameter
to the brw_reg functions only for the assertions, so move these to places where
we have the hardware generation available.
Ken suggested to add the
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 0465770..7f06050 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_
g:
crash: 2, fail: 12, pass: 6722, skip: 5461
We might want to test this further with other instances of gen6 hardware
though... I am not sure that we can safely conclude that all implementations
of gen6 hardware have 24 MRF registers from my tests on just one particular
SandyBridge laptop.
Iago
---
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 21fb3de..6900cee 100644
--- a/src/mesa/drivers/dri/i965
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp| 4 ++--
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 12 ++--
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 16
src/mesa
In a later patch we will make BRW_MAX_MRF return a different value depending
on the hardware generation, but it is inconvenient to add a gen parameter
to the brw_reg functions only for the assertions, so move them to the generator
where checking for this is easier.
FIXME: we would still need to ad
hat end
up going through the generator.
Or maybe we think this is just not worth it if it only helps gen6...
what do you think?
Iago Toral Quiroga (3):
i965: Move MRF register asserts to the generator
i965: Turn BRW_MAX_MRF into a macro that accepts a hardware generation
i965/fs: Use MRF regis
---
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 21fb3de..6900cee 100644
--- a/src/mesa/drivers/dri/i965
---
src/glsl/opt_array_splitting.cpp | 54 +++-
1 file changed, 26 insertions(+), 28 deletions(-)
diff --git a/src/glsl/opt_array_splitting.cpp b/src/glsl/opt_array_splitting.cpp
index 1fdd013..b7ea405 100644
--- a/src/glsl/opt_array_splitting.cpp
+++ b/src/gls
When we find indirect indexing into an array, the current implementation
of the array spliiting optimization pass does not look further into the
expression tree. However, if the variable expression involves variable
indexing into other arrays, we can miss that these other arrays also have
variable
From: Samuel Iglesias Gonsalvez
v2:
- Add tessellation shader constants assignment
v3:
- Set MaxShaderStorageBufferBindings to 36.
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_context.c | 12
1 file changed, 12 insertions(
From: Samuel Iglesias Gonsalvez
They only can be defined in the last position of the shader
storage blocks.
When an unsized array is used in different shaders, it might be
converted in different sized arrays, avoid get a linker error
in that case.
v2:
- Rework error condition and error messages
Since these are a special kind of UBOs we emit them together reusing the
same infrastructure, however, we use a RAW surface so we can reuse
existing untyped read/write/atomic messages which include a pixel mask
header that we need to set to obtain correct behavior with helper
invocations of the fra
er.
i965/vec4: Import helpers to convert vectors into arrays and back.
i965/vec4: Import surface message builder functions.
Iago Toral Quiroga (29):
i965: Use 16-byte offset alignment for shader storage buffers
i965: Implement DriverFlags.NewShaderStorageBuffer
i965: Set MaxShaderStorageB
From: Samuel Iglesias Gonsalvez
The unsized array length is computed with the following formula:
array.length() =
max((buffer_object_size - offset_of_array) / stride_of_array, 0)
Of these, only the buffer size needs to be provided by the backends, the
frontend already knows the values of the
From: Antia Puentes
Commit 1ca25ab (glsl: Do not eliminate 'shared' or 'std140' blocks
or block members) considered as active 'shared' and 'std140' uniform
blocks and uniform block arrays, but did not include the block array
elements. Because of that, it was possible to have an active uniform
blo
v2:
- Mark it too for GLES 3.1
---
docs/GL3.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 561f204..b451e41 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -164,7 +164,7 @@ GL 4.3, GLSL 4.30:
GL_ARB_program_interface_query
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Tapani Pälli
---
src/glsl/glsl_parser_extras.cpp | 2 +-
src/glsl/glsl_parser_extras.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/main/tests/enum_strings.cpp | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/mesa/main/tests/enum_strings.cpp
b/src/mesa/main/tests/enum_strings.cpp
index 8218cc9..96b2246 100644
--- a
From: Samuel Iglesias Gonsalvez
Defined in ARB_shader_storage_buffer_object extension.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/main/uniforms.c | 52
src/mesa/main/uniforms.h | 4
2 files changed, 56 insertions(+)
diff --git
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 3c764be..445b61a 10064
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Jordan Justen
---
.../glapi/gen/ARB_shader_storage_buffer_object.xml | 36 ++
src/mapi/glapi/gen/GL4x.xml| 18 ++-
src/mapi/glapi/gen/Makefile.am
From: Samuel Iglesias Gonsalvez
v2:
- Add tessellation shader constants support
v3:
- Add GLES 3.1 support.
v4:
- Move the getters to the proper place
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Tapani Pälli
---
src/mesa/main/get.c | 7 +++
src/mesa/main/get_hash
---
src/glsl/glsl_lexer.ll | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/glsl/glsl_lexer.ll b/src/glsl/glsl_lexer.ll
index 90e84ed..2142817 100644
--- a/src/glsl/glsl_lexer.ll
+++ b/src/glsl/glsl_lexer.ll
@@ -406,11 +406,11 @@ image2DShadow KEYWORD(13
From: Samuel Iglesias Gonsalvez
Including TOP_LEVEL_ARRAY_SIZE and TOP_LEVEL_ARRAY_STRIDE queries.
v2:
- Use std430_array_stride() to get top level array stride following std430's
rules.
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Tapani Pälli
---
src/glsl/ir_uniform.h
The error location won't be right, but fixing that would require to check
for this as we process each type of AST node that can involve a variable
read.
v2:
- Limit the check to buffer variables, image variables have different
semantics involved.
---
src/glsl/ast_to_hir.cpp | 56 +++
The original GLSL IR intrinsics have been lowered to an internal
version that accepts a block index and an offset instead of a
SSBO reference.
v2 (Connor):
- Document the sources used by the atomic intrinsics.
Reviewed-by: Connor Abbott
---
src/glsl/nir/glsl_to_nir.cpp | 55 +
From: Samuel Iglesias Gonsalvez
According to ARB_uniform_buffer_object spec:
"If the parameter (starting offset or size) was not specified when the
buffer object was bound (e.g. if bound with BindBufferBase), or if no
buffer object is bound to , zero is returned."
Signed-off-by: Samuel Iglesi
The original GLSL IR intrinsics have been lowered to an internal
version that accepts a block index and an offset instead of a
SSBO reference.
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 103 +
2 files changed
These handle querying the buffer name attached to a giving binding point
as well as the start offset and size of that buffer.
---
src/mesa/main/get.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index d5df530..24442f
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 77
2 files changed, 79 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index b48134e..2016887 100644
--- a/src/mesa
v2:
- Add ssbo_in the names of the static functions so it is clear that this
is specific to SSBO atomics.
---
src/glsl/ast_function.cpp | 37 +
1 file changed, 37 insertions(+)
diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp
index 0fb89
v2:
- Merge the error check for the readonly qualifier with the already
existing check for variables flagged as readonly (Timothy).
- Limit the check to buffer variables, image variables have different
semantics involved (Curro).
---
src/glsl/ast_to_hir.cpp | 11 ++-
1 file cha
v2:
- Save memory qualifier info in the top level members of a shader
storage block.
- Add a checks to record_compare() which is used when comparing
shader storage buffer declarations in different shaders.
- Always report an error for incompatible readonly/writeonly
definitions, w
The first argument to SSBO atomics is a reference to a SSBO buffer variable
so we want to compute its block index and offset and provide these values
to an internal version of the intrinsic that takes them instead of the
buffer variable reference.
v2:
- Support single components of integer vectors
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 78 ++
2 files changed, 79 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 082e209..d152713 100644
--- a/sr
From: Samuel Iglesias Gonsalvez
v2:
- Memory qualifiers on shader storage buffer objects do not come in the form
of layout qualifiers, they are block-level qualifiers.
---
src/glsl/glsl_parser.yy | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/glsl/glsl_parser.yy b/
---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 54 ++
1 file changed, 54 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 450441d..77a2414 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 62
1 file changed, 62 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 6ccbf89..7fe8062 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b
---
src/glsl/builtin_functions.cpp | 185 +
1 file changed, 185 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 73a2074..d09cc23 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cp
Shader Storage Buffer Object will add new atomic functions that are not
associated with counters, so better have atomic counter-specific functions
explicitly include the word "counter" in their names.
Reviewed-by: Timothy Arceri
---
src/glsl/builtin_functions.cpp | 30 +++
From: Samuel Iglesias Gonsalvez
In a later commit we will need to handle ir_swizzle nodes too, which are
not an ir_dereference. That can happen, for example, when we pass a
component of an integer vector as argument to any of the SSBO atomic
functions.
Signed-off-by: Samuel Iglesias Gonsalvez
-
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 76 ++
2 files changed, 77 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index ab62be2..082e209 100644
---
Reviewed-by: Connor Abbott
---
src/glsl/nir/glsl_to_nir.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index cb7b196..a387a54 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++ b/src/glsl/nir/glsl_to_nir.cpp
@@ -103
---
src/mesa/drivers/dri/i965/brw_vec4.h | 2 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 157 +
2 files changed, 159 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index c0e46ad..ab62be2 100644
--
v2:
- Fix ssbo loads with boolean variables.
Reviewed-by: Connor Abbott
---
src/glsl/nir/glsl_to_nir.cpp| 80 -
src/glsl/nir/nir_intrinsics.h | 2 +-
src/glsl/nir/nir_lower_phis_to_scalar.c | 2 +
3 files changed, 81 insertions(+), 3 deleti
From: Kristian Høgsberg
---
src/glsl/ast_to_hir.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 566cc87..a364aae 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2789,7 +2789,7 @@ apply_ty
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/linker.cpp | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index a9a6dc5..323c162 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/link
From: Francisco Jerez
These functions handle the conversion of a vec4 into the form expected
by the dataport unit in message and message return payloads. The
conversion is not always trivial because some messages don't support
SIMD4x2 for some generations, in which case a strided copy may be
nec
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Jordan Justen
---
src/glsl/link_uniforms.cpp | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 1d678c2..cc38287
From: Francisco Jerez
See "i965/fs: Introduce FS IR builder." for the rationale.
v2: Drop scalarizing VEC4 builder.
v3: Take a backend_shader as constructor argument. Improve handling
of debug annotations and execution control flags. Rename "instr"
variable. Initialize cursor to NULL
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 71
1 file changed, 71 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 3c55a12..6ccbf89 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b
v2 (Connor):
- Make the STORE() macro take arguments for the extra sources (and their
size) and any extra indices required.
---
src/glsl/nir/glsl_to_nir.cpp | 36
src/glsl/nir/nir_intrinsics.h | 20
2 files changed, 48 insertions(+), 8
From: Francisco Jerez
Implement helper functions that can be used to construct and send
untyped and typed surface read, write and atomic messages to the
shared dataport unit.
v2: Split from the FS implementation.
v3: Rewrite to avoid evil array_reg, emit_collect and emit_zip.
---
.../drivers/dr
From: Samuel Iglesias Gonsalvez
Otherwise, generate a link time error as per the
ARB_shader_storage_buffer_object spec.
v2:
- Fix error message (Jordan)
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Jordan Justen
---
src/glsl/glsl_types.cpp | 9 +++--
src/glsl/link_unif
From: Samuel Iglesias Gonsalvez
They are used to calculate the offset, array stride of uniform/shader storage
buffer variables. Take into account this info to get the right value for std430.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/link_uniform_blocks.cpp | 19 +++---
src/glsl
---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 148 +
1 file changed, 148 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index f47b029..450441d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cp
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/ast.h | 3 +++
src/glsl/glsl_parser.yy | 5 -
src/glsl/glsl_parser_extras.cpp | 1 +
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ast.h b/src/glsl/ast.h
i
From: Samuel Iglesias Gonsalvez
They are used to calculate size, base alignment and array stride values
for a glsl_type following std430 rules.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/glsl_types.cpp | 209
src/glsl/glsl_types.h |
From: Samuel Iglesias Gonsalvez
Also if GL_ARB_shading_language_420pack extension is enabled.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/glsl_parser.yy | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
in
From: Samuel Iglesias Gonsalvez
Notice that we should differentiate between shader storage blocks and
uniform blocks, since they have different limits.
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Jordan Justen
---
src/glsl/linker.cpp | 43 +++
From: Samuel Iglesias Gonsalvez
This kind of definitions:
layout(xxx) buffer;
was not supported by commit 84fc5fece006.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/glsl_parser.yy | 46 -
src/glsl/glsl_parser_extras.cpp | 20 ++
From: Samuel Iglesias Gonsalvez
Otherwise we can expect odd things to happen if, for example, we ask
for the size of the attached buffer from shader code, since that
might query this value from the surface we uploaded and get random
results.
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by:
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 25 +
1 file changed, 25 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index a6c6a2f
From: Samuel Iglesias Gonsalvez
v2:
- Get interface packing information from interface's type, not the variable
type.
- Simplify is_std430 condition in emit_access() for readability (Jordan)
- Add a commment explaing why array of three-component vector case is different
in std430 than the rest
From: Samuel Iglesias Gonsalvez
v2:
- Fix a missing check in has_layout()
Signed-off-by: Samuel Iglesias Gonsalvez
Reviewed-by: Jordan Justen
---
src/glsl/ast.h | 1 +
src/glsl/ast_to_hir.cpp | 20
src/glsl/ast_type.cpp| 2 ++
src/
v2:
- Set it after the driver's MaxShaderStorageBuffers value assignment.
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_context.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 9982049
From: Samuel Iglesias Gonsalvez
The returned drm buffer object has a size multiple of 4096 but that should not
be exposed to the API user, which is working with a different size.
As far as I can see this problem is only visible in the calculation of the
length of unsized arrays used in SSBOs, as
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 26 ++
1 file changed, 26 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index
From: Samuel Iglesias Gonsalvez
v2:
- Reduce the number of lines over 80 character line width
limit. (Thomas Hellan)
v3:
- Inject the formula to compute the array length in the IR, backends
only need to provide the buffer size (Curro)
- Create an auxiliary function to simplify code (Jordan J
Buffer variables are the same as uniforms, only that read/write, so we want
the same treatment.
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
b/src/me
From: Samuel Iglesias Gonsalvez
This is how backends provide the buffer size required to compute
the size of unsized arrays in the previous patch
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/nir/glsl_to_nir.cpp | 10 ++
src/glsl/nir/nir_intrinsics.h | 7 +++
2 files chan
This is the same we do for other things like uniforms because it ensures
optimal performance.
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_context.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_contex
From: Samuel Iglesias Gonsalvez
---
src/glsl/ast.h | 5 ++
src/glsl/glsl_parser.yy | 127 +---
src/glsl/glsl_parser_extras.cpp | 122 ++
3 files changed, 128 insertions(+), 126 deletions(-)
diff -
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/ast_to_hir.cpp | 16
1 file changed, 16 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 72c6459..b67ae70 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_defines.h| 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 47
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/b
From: Samuel Iglesias Gonsalvez
Notice that Skylake needs to include a header in the sampler message
so it will need some tweaks to work there.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_defines.h | 3 +++
src/mesa/drivers/dri/i965/brw_shader.cpp
We use the same dirty state for SSBOs and UBOs because they share the
same infrastructure.
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_state_upload.c | 1 +
src/mesa/drivers/dri/i965/intel_buffer_objects.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/src/mesa/drive
From: Samuel Iglesias Gonsalvez
This patch sets the same value used for uniform buffers.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/main/config.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/config.h b/src/mesa/main/config.h
index b35031d..69acd7
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index f6e59ce..ec41262 100644
--- a/src/mesa/driv
If we have spilled/unspilled a register in the current instruction, avoid
emitting unspills for the same register in the same instruction or consecutive
instructions following the current one as long as they keep reading the spilled
register. This should allow us to avoid emitting costy unspills th
If we have spilled/unspilled a register in the current instruction, avoid
emitting unspills for the same register in the same instruction or consecutive
instructions following the current one as long as they keep reading the spilled
register. This should allow us to avoid emitting costy unspills th
Commit 2126c68e5cba killed the array elements parameter on load/store
intrinsics that was stored in const_index[1]. It looks like that
patch missed to remove this assignment in the UBO path.
---
src/glsl/nir/glsl_to_nir.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/nir/glsl_to_ni
From: Samuel Iglesias Gonsalvez
Otherwise, generate a link time error as per the
ARB_shader_storage_buffer_object spec.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/glsl_types.cpp | 9 +++--
src/glsl/link_uniform_blocks.cpp | 17 +
src/glsl/linker.cpp
---
src/mesa/drivers/dri/i965/brw_vec4.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 76 ++
2 files changed, 77 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index ab1ff81..8cbf3b4 100644
---
From: Samuel Iglesias Gonsalvez
Notice that we should differentiate betweeb shader storage blocks and
uniform blocks, since they have different limits.
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/glsl/linker.cpp | 43 +++
1 file changed, 39 insertio
From: Samuel Iglesias Gonsalvez
Signed-off-by: Samuel Iglesias Gonsalvez
---
src/mesa/drivers/dri/i965/brw_defines.h| 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 47
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