[Mesa-dev] [PATCH 1/2] drm/i915/gtt: Allow adventurous users to select enable_ppgtt=3

2015-09-09 Thread Michał Winiarski
While support for 48b ppgtt is here, parameter enabling it is not known to the sanitize function. Let's update it to allow selecting full_48bit_ppgtt using module parameter. Cc: Michel Thierry Cc: Mika Kuoppala Signed-off-by: Michał Winiarski --- drivers/gpu/drm/i915/i915_gem_gtt.

[Mesa-dev] [RFC libdrm] intel: Softpin support

2015-09-09 Thread Michał Winiarski
using softpin. Michał Winiarski (1): drm/i915/gtt: Allow adventurous users to select enable_ppgtt=3 is not strictly necessary for softpin itself, but it is needed for SVM usecase. Chris Wilson (1): drm/i915: Add soft-pinning API for execbuffer is just v5 from Thomas Daniel rebased on top of cu

[Mesa-dev] [RFC libdrm] intel: Add support for softpin

2015-09-09 Thread Michał Winiarski
ichel Thierry Cc: Ben Widawsky Cc: Chris Wilson Signed-off-by: Michał Winiarski --- include/drm/i915_drm.h| 4 +- intel/intel_bufmgr.c | 9 +++ intel/intel_bufmgr.h | 1 + intel/intel_bufmgr_gem.c | 176 -- intel/intel_bufmgr_p

[Mesa-dev] [PATCH v6 2/2] drm/i915: Add soft-pinning API for execbuffer

2015-09-09 Thread Michał Winiarski
on Signed-off-by: Thomas Daniel Signed-off-by: Michał Winiarski --- drivers/gpu/drm/i915/i915_dma.c| 3 ++ drivers/gpu/drm/i915/i915_drv.h| 3 ++ drivers/gpu/drm/i915/i915_gem.c| 52 ++ drivers/gpu/drm/i915/i915_gem_evict.c

[Mesa-dev] [RFC libdrm] intel: 48b ppgtt support

2015-08-07 Thread Michał Winiarski
--- include/drm/i915_drm.h| 3 ++- intel/intel_bufmgr.c | 11 +++ intel/intel_bufmgr.h | 1 + intel/intel_bufmgr_gem.c | 43 +-- intel/intel_bufmgr_priv.h | 8 5 files changed, 55 insertions(+), 11 deletions(-) diff --git

Re: [Mesa-dev] [Intel-gfx] [PATCH libdrm v3 1/2] intel: Add EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag

2015-08-07 Thread Michał Winiarski
-0xf000) > + * General State Heap (GSH) or Intructions State Heap (ISH) must > + * be in a 32-bit range. 48-bit range will only be used when explicitly > + * requested. > + */ > + void (*bo_set_supports_48b_address) (drm_intel_bo *bo); > + void (*bo_clear_supports_48b_address) (drm_intel_bo *bo); > + > + /** >* Add relocation entry in reloc_buf, which will be updated with the >* target buffer's real offset on on command submission. >* > -- > 2.5.0 You also haven't updated the dump_validation_list with proper format specifier (addresses are truncated otherwise). I really don't like hiding set_supports_48b_address/clear_supports_48b_address in emit reloc - making this explicit would be a better approach. Of course this is just my opinion, but let me post a bit different version of this API - just as an RFC so you can see how it would look with explicit set on bo and without adding another emit_reloc variant. -- Michał Winiarski Intel VPG ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev