On Wed, May 03, 2017 at 11:36:29PM -0700, Kenneth Graunke wrote:
> On Wednesday, May 3, 2017 7:52:01 PM PDT Pohjolainen, Topi wrote:
> > On Wed, May 03, 2017 at 05:11:45PM -0700, Rafael Antognolli wrote:
> > > On Wed, May 03, 2017 at 08:28:24PM +0300, Pohjolainen, Topi wrote:
&
brw_state.h is a better place to keep them, instead of brw_context.h.
Signed-off-by: Rafael Antognolli
Reviewed-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_context.h | 42 -
src/mesa/drivers/dri/i965/brw_state.h | 42
Reviewed-by: Rafael Antognolli
On Thu, May 04, 2017 at 08:13:05AM -0700, Kenneth Graunke wrote:
> We can use a simple shift equation rather than a switch statement.
> ---
> src/mesa/main/varray.c | 12 ++--
> 1 file changed, 2 insertions(+), 10 deletions(-)
>
> dif
The hardware docs are wrong, but the length used in the xml is also
wrong.
Signed-off-by: Rafael Antognolli
---
src/intel/genxml/gen5.xml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
index 0b84650..447499c 100644
On Wed, May 03, 2017 at 08:28:24PM +0300, Pohjolainen, Topi wrote:
> On Mon, May 01, 2017 at 06:43:02PM -0700, Rafael Antognolli wrote:
> > These macros are defined in brw_defines.h, which contains a lot of
> > macros that conflict with autogenerated code from genxml. But we need
01, 2017 at 06:43:05PM -0700, Rafael Antognolli wrote:
> > Signed-off-by: Rafael Antognolli
> > ---
> > src/mesa/drivers/dri/i965/Makefile.am | 12
> > src/mesa/drivers/dri/i965/Makefile.sources | 9 +
> > src/mesa/drivers/dri/i965/b
gt; isl. That should allow me to start using isl state emitter for
> depth-hiz-stencil.
>
> CC: Jason Ekstrand
> CC: Nanley Chery
> CC: Chad Versace
> CC: Rafael Antognolli
>
> Topi Pohjolainen (39):
> i965/dbg: Add means for forcing stencil sampling using y-tile
Reviewed-by: Rafael Antognolli
On Fri, Apr 28, 2017 at 05:04:05PM -0700, Kenneth Graunke wrote:
> The Ironlake documentation is terrible, so it's unclear whether or not
> this field exists there. It definitely doesn't exist on Sandybridge
> and later. It definitely does ex
Reviewed-by: Rafael Antognolli
On Mon, May 01, 2017 at 01:54:52PM -0700, Matt Turner wrote:
> ---
> src/intel/common/gen_decoder.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
Patch is
Reviewed-by: Rafael Antognolli
On Mon, May 01, 2017 at 01:54:49PM -0700, Matt Turner wrote:
> Newer Gens' names don't have the brackets. Having common names will make
> some later patches simpler.
> ---
> src/intel/genxml/gen4.xml | 2 +-
> src/intel/genxm
Since the enum is in the same header now, we can use it as the type of
the field.
Signed-off-by: Rafael Antognolli
---
PS: We can merge this with the previous patch too if that's better.
src/intel/compiler/brw_compiler.h | 2 +-
src/intel/compiler/brw_fs.cpp | 2 +-
2 files chang
These enums live inside struct brw_wm_prog_data, so it makes sense to
keep them in the same header. It also allows to use them without
including brw_eu_defines.h.
Signed-off-by: Rafael Antognolli
---
src/intel/compiler/brw_compiler.h | 21 +
src/intel/compiler
On Tue, May 02, 2017 at 08:44:05AM -0700, Jason Ekstrand wrote:
> On Tue, May 2, 2017 at 8:28 AM, Rafael Antognolli
>
> wrote:
>
> On Tue, May 02, 2017 at 07:26:53AM -0700, Jason Ekstrand wrote:
> > On Mon, May 1, 2017 at 6:43 PM, Rafael Antognolli <
>
On Tue, May 02, 2017 at 07:26:53AM -0700, Jason Ekstrand wrote:
> On Mon, May 1, 2017 at 6:43 PM, Rafael Antognolli
>
> wrote:
>
> We need to use some enums inside genX_state_upload.c, but including the
> whole header will cause several conflicts between thin
On Tue, May 02, 2017 at 09:38:53AM +0100, Emil Velikov wrote:
> On 2 May 2017 at 09:32, Emil Velikov wrote:
> > Hi Rafael,
> >
> > On 2 May 2017 at 02:43, Rafael Antognolli
> > wrote:
> >> We need to use some enums inside genX_state_upload.c, but includ
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen6_cc.c | 90 +
src/mesa/drivers/dri/i965/genX_state_upload.c | 53 +++-
4 files
Emit 3DSTATE_SCISSOR_STATE_POINTERS using brw_batch_emit, and pack the
scissor states using GENX(SCISSOR_RECT_pack), generated from genxml.
v3:
- Remove old code (Ken)
- Style fixes (Ken)
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965
nes.h.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_context.h | 41 +-
src/mesa/drivers/dri/i965/brw_defines.h | 42 +--
2 files changed, 41 insertions(+), 42 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src
In a previous patch some enums were split out from brw_eu_defines.h, so
they could be used by genxml based code. anv can also benefit from this.
Signed-off-by: Rafael Antognolli
---
src/intel/vulkan/genX_pipeline.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/intel
On this patch, we port:
- brw_polygon_stipple
- brw_polygon_stipple_offset
- brw_line_stipple
- brw_drawing_rect
v2:
- Also emit states for gen4-5 with this code.
v3:
- Style fixes and remove excessive checks (Ken).
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/intel/blorp/blorp_genX_exec.h | 2 +-
src/intel/genxml/gen6.xml | 2 +-
src/intel/genxml/gen7.xml | 2 +-
src/intel/genxml/gen75.xml| 2 +-
src/intel/genxml/gen8.xml | 2 +-
src/intel/genxml
- "COLOR_CALC_STATE Change" -> "Color Calc State Pointer Valid"
- "Pointer to COLOR_CALC_STATE" -> "Color Calc State Pointer"
- "BackFace" -> "Backface"
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
--
Emit clip state on Gen6+ using brw_batch_emit helper, using pack structs
from genxml.
v3:
- Lots style fixes (Ken)
- Do not set CullTestEnableBitMask on Gen8+ (Ken)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965
Upload blend states using GENX(BLEND_STATE_ENTRY_pack), generated from
genxml.
v3:
- style fixes (Ken)
- cleanup to remove excessive #ifdef's (Ken)
- remove memset (Ken)
- disable blend.AlphaToCoverageDitherEnable on gen6 (Ken)
Signed-off-by: Rafael Antognolli
Reviewed-by: Ke
That helper function returns the line width as a float, and is then used
by brw_get_line_width to return the fixed point width.
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_util.h | 25 ++---
1 file changed, 14 insertions
Emit 3DSTATE_SOL on Gen7+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Add helpers to assign struct brw_address (Kristian)
v3:
- Rename MOCS -> SOBufferMOCS
- Do not re-declare MOCS macros (Ken).
- Style and code reorganization (Ken).
Signed-off-by: Raf
Emit 3DSTATE_MULTISAMPLE using brw_batch_emit.
v3:
- Remove dead code (Ken)
- Simplify #if/#endif (Ken)
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h| 9 +-
src/mesa/drivers/dri/i965/brw_state.h | 2
Emits 3DSTATE_RASTER from genX_state_upload.c using pack structs from
genxml.
v3:
- Style fixes (Ken)
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen8_sf_state.c | 125
-by: Rafael Antognolli
Acked-by: Reviewed-by: Kenneth Graunke
---
src/intel/Makefile.sources | 1 +-
src/intel/compiler/brw_defines_common.h | 46 ++-
src/intel/compiler/brw_eu_defines.h | 22 +
3 files changed, 48 insertions(+), 21 deletions
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.am | 12
src/mesa/drivers/dri/i965/Makefile.sources | 9 +
src/mesa/drivers/dri/i965/brw_state.h | 1 +
3 files changed, 22 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/Makefile.am
Rename that field name on genxml for:
- 3DSTATE_GS - gen6+
- 3DSTATE_DS - gen7+
- 3DSTATE_HS - gen7+
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/intel/genxml/gen6.xml| 2 +-
src/intel/genxml/gen7.xml| 6 +++---
src/intel/genxml/gen75.xml
Emit 3DSTATE_PS_EXTRA on Gen8+ using brw_batch_emit helper, that uses
pack structs from genxml.
v3:
- Style fixes and moving code around to be cleaner (Ken)
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa
From: Kenneth Graunke
This emits 3DSTATE_WM_DEPTH_STENCIL on Gen8+ or DEPTH_STENCIL_STATE
(and the relevant pointer packets) on Gen6-7.5 from a single function.
v3:
- Watch for BRW_NEW_BATCH too on gen8+ (Ken)
Signed-off-by: Kenneth Graunke
Signed-off-by: Rafael Antognolli
Reviewed-by
Emit 3DSTATE_PS on Gen7+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Use render_bo helper to setup brw_address (Kristian)
v3:
- Style fixes and code cleanup (Ken)
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965
Emit 3DSTATE_SBE on Gen7+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Use ACTIVE_COMPONENT_XYZW from gen9.xml.
v3:
- Style fixes (Ken)
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources| 2 +-
src
Emit sf state on Gen6+ using brw_batch_emit helper, using pack structs
from genxml.
v3:
- Reorganize code and reduce #if/#endif's (Ken)
- Style fixes (Ken)
- Always set AALINEDISTANCE_TRUE (Ken)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_state.h
This function now lives inside genX_state_upload.c.
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 8 +-
src/mesa/drivers/dri/i965/gen6_sf_state.c | 265
Emit 3DSTATE_VS on Gen6+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Use render_bo helper to setup brw_address (Kristian)
v3:
- Bring back some comments for gen6 and remove _NEW_TRANSFORM blocks
from gen7+.
Signed-off-by: Rafael Antognolli
Reviewed-by
From: Kenneth Graunke
Make atoms initalization compile conditionally based on the target
platform.
---
src/mesa/drivers/dri/i965/brw_state.h | 12 +-
src/mesa/drivers/dri/i965/brw_state_upload.c | 385 +---
src/mesa/drivers/dri/i965/genX_state_upload.c | 340 +++
)
- Use macros for MOCS values.
- Do not use #ifndef NDEBUG on code that is actually used (Ken)
v3:
- Style and code clenup (Ken)
- Keep some of the common code inside brw_draw_upload.c (Ken)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_draw_upload.c | 454
macro (Ken)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 4 +-
src/mesa/drivers/dri/i965/brw_state.h | 5 +-
src/mesa/drivers/dri/i965/gen6_gs_state.c | 33 +---
src/mesa/drivers/dri/i965/gen6_vs_state.c | 70 +--
src/mesa/drivers
- Normalize "Anti-Aliasing Enable"
- Add "Multisample Rasterization Mode" constants
- Rename "Use Point Width on Vertex" to "Vertex"
- Rename "Use Point Width from State" to "State"
Signed-off-by: Rafael Antognolli
Revie
Ported in this patch:
- 3DSTATE_DS
- 3DSTATE_GS
- 3DSTATE_HS
- 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL
v3:
- Remove NEW_TRANSFORM blocks (Ken)
- Bring back some comments and workaround for Ivybridge (Ken)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965
)
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 14 +-
src/mesa/drivers/dri/i965/gen6_wm_state.c | 221 +---
src/mesa/drivers/dri/i965/gen7_wm_state.c
Use an alias, so we can set the same value as the #define's.
v3:
- Call it "SO Buffer MOCS" to follow the most common naming scheme.
- Add alias for gen7 and gen75 too (Ken).
Signed-off-by: Rafael Antognolli
---
src/intel/genxml/gen7.xml | 1 +
src/intel/genxml/gen75
From: Kenneth Graunke
v3:
- Drop aub parameter (Ken)
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources| 15 ++-
src/mesa/drivers/dri/i965/genX_state_upload.c | 109 +++-
2 files changed, 119 insertions(+), 5 deletions(-)
create mode 100644 s
There are two variants:
- Clip Enable
- CLIP Enable (on gen6)
Rename everything to Clip Enable.
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/intel/genxml/gen4.xml | 2 +-
src/intel/genxml/gen45.xml | 2 +-
src/intel/genxml/gen5.xml | 2 +-
src/intel/genxml
This makes genxml create the right struct types, and generate the right
batch commands.
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/intel/genxml/gen6.xml | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/intel/genxml/gen6.xml b/src/intel
Name the options to "Pixel Location":
- PIXLOC_CENTER -> CENTER
- PIXLOC_UL_CORNER -> UL_CORNER
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/intel/blorp/blorp_genX_exec.h | 4 +---
src/intel/genxml/gen6.xml | 4 ++--
src/intel/genxml/gen7
Emit 3DSTATE_TE on Gen7+ using brw_batch_emit helper.
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen7_te_state.c | 67
From: Kenneth Graunke
Both GS and SOL have these fields. Some were ReorderEnable = true,
some were ReorderMode = REORDER_TRAILING, and some were just TRAILING.
Signed-off-by: Kenneth Graunke
Reviewed-by: Rafael Antognolli
---
src/intel/genxml/gen6.xml| 5 -
src/intel/genxml/gen7
Fill out "Attribute Active Component Format" possible values.
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/intel/genxml/gen9.xml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9
g in a new genX_state_upload.c file.
i965: Get real per-gen atom lists
i965: Port Gen6+ DEPTH_STENCIL state to genxml.
Louis-Francis Ratté-Boulianne (1):
genxml: Fill out Gen4, Gen45 and Gen5 XML
Rafael Antognolli (33):
genxml: Rename clip enable property.
genxml: Update xml for 3DSTATE_SF
On Wed, Apr 26, 2017 at 11:15:45PM -0700, Kenneth Graunke wrote:
> On Monday, April 24, 2017 3:19:21 PM PDT Rafael Antognolli wrote:
> [snip]
> > diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
> > b/src/mesa/drivers/dri/i965/genX_state_upload.c
> > index
Makes sense to me.
Reviewed-by: Rafael Antognolli
On Wed, Apr 26, 2017 at 11:14:47PM -0700, Kenneth Graunke wrote:
> Gen4-5 and Gen8+ already set this, but Gen6-7.5 did not. We ought to
> be consistent - the answer depends on the API, not the hardware generation.
>
> The Sandybri
Use an alias, so we can set the same value as the #define's.
v3:
- Call it "SO Buffer MOCS" to follow the most common naming scheme.
- Add alias for gen7 and gen75 too (Ken).
Signed-off-by: Rafael Antognolli
---
src/intel/genxml/gen7.xml | 1 +
src/intel/genxml/gen75
On Mon, Apr 24, 2017 at 03:59:07PM -0700, Kenneth Graunke wrote:
> On Monday, April 24, 2017 3:19:01 PM PDT Rafael Antognolli wrote:
> > Use an alias, so we can set the same value as the #define's.
> >
> > Signed-off-by: Rafael Antognolli
> > ---
> > sr
ml: Make "Reorder Mode" fields consistent.
i965: Add genxml related plumbing in a new genX_state_upload.c file.
i965: Get real per-gen atom lists
i965: Port Gen6+ DEPTH_STENCIL state to genxml.
Louis-Francis Ratté-Boulianne (1):
genxml: Fill out Gen4, Gen45 and Gen5 XML
Rafael Antognoll
From: Kenneth Graunke
This emits 3DSTATE_WM_DEPTH_STENCIL on Gen8+ or DEPTH_STENCIL_STATE
(and the relevant pointer packets) on Gen6-7.5 from a single function.
Signed-off-by: Kenneth Graunke
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 2 +-
src
Emits 3DSTATE_RASTER from genX_state_upload.c using pack structs from
genxml.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen8_sf_state.c | 125 +---
src/mesa/drivers/dri/i965/genX_state_upload.c
Set the type of some fields, instead of prefix. Also fix the
SAMPLER_BORDER_COLOR_STATE fields of gen5.xml.
Signed-off-by: Rafael Antognolli
---
src/intel/genxml/gen4.xml | 13 +-
src/intel/genxml/gen45.xml | 12 -
src/intel/genxml/gen5.xml | 52
-by: Rafael Antognolli
---
src/intel/Makefile.sources | 1 +-
src/intel/compiler/brw_defines_common.h | 46 ++-
src/intel/compiler/brw_eu_defines.h | 22 +
3 files changed, 48 insertions(+), 21 deletions(-)
create mode 100644 src/intel
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.am | 12
src/mesa/drivers/dri/i965/Makefile.sources | 9 +
src/mesa/drivers/dri/i965/brw_state.h | 1 +
3 files changed, 22 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/Makefile.am
Emit 3DSTATE_PS_EXTRA on Gen8+ using brw_batch_emit helper, that uses
pack structs from genxml.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 10 +-
src/mesa/drivers/dri/i965/gen8_ps_state.c
Emit sf state on Gen6+ using brw_batch_emit helper, using pack structs
from genxml.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_state.h | 3 +-
src/mesa/drivers/dri/i965/brw_util.h | 25 +-
src/mesa/drivers/dri/i965/gen6_sf_state.c | 190
)
- Use macros for MOCS values.
- Do not use #ifndef NDEBUG on code that is actually used (Ken)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_context.h |6 +-
src/mesa/drivers/dri/i965/brw_draw.h |2 +-
src/mesa/drivers/dri/i965/brw_draw_upload.c
Emit clip state on Gen6+ using brw_batch_emit helper, using pack structs
from genxml.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen6_clip_state.c | 139 +--
src/mesa/drivers/dri/i965
On this patch, we port:
- brw_polygon_stipple
- brw_polygon_stipple_offset
- brw_line_stipple
- brw_drawing_rect
v2:
- Also emit states for gen4-5 with this code.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +-
src/mesa/drivers/dri
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen6_cc.c | 90 +
src/mesa/drivers/dri/i965/genX_state_upload.c | 53 +++-
4 files
There are two variants:
- Clip Enable
- CLIP Enable (on gen6)
Rename everything to Clip Enable.
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/intel/genxml/gen4.xml | 2 +-
src/intel/genxml/gen45.xml | 2 +-
src/intel/genxml/gen5.xml | 2 +-
src/intel/genxml
Emit 3DSTATE_VS on Gen6+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Use render_bo helper to setup brw_address (Kristian)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 2 +-
src/mesa/drivers/dri/i965/brw_state.h
In a previous patch some enums were split out from brw_eu_defines.h, so
they could be used by genxml based code. anv can also benefit from this.
Signed-off-by: Rafael Antognolli
---
src/intel/vulkan/genX_pipeline.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/intel
From: Kenneth Graunke
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/Makefile.sources| 15 ++-
src/mesa/drivers/dri/i965/genX_state_upload.c | 109 +++-
2 files changed, 119 insertions(+), 5 deletions(-)
create mode 100644 src/mesa/drivers/dri/i965/genX_state
Fill out "Attribute Active Component Format" possible values.
Signed-off-by: Rafael Antognolli
---
src/intel/genxml/gen9.xml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index ee7056b..59daa31 100644
Use an alias, so we can set the same value as the #define's.
Signed-off-by: Rafael Antognolli
---
src/intel/genxml/gen8.xml | 1 +
src/intel/genxml/gen9.xml | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 408d241..2908082 1
Emit 3DSTATE_PS on Gen7+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Use render_bo helper to setup brw_address (Kristian)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_state.h | 2 +-
src/mesa/drivers/dri/i965/gen7_wm_state.c
Emit 3DSTATE_SBE on Gen7+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Use ACTIVE_COMPONENT_XYZW from gen9.xml.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 2 +-
src/mesa/drivers/dri/i965/brw_state.h | 2 +-
src
Emit 3DSTATE_WM on Gen6+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Use render_bo helper to setup brw_address (Kristian)
- Remove TODO and use BRW_PSCDEPTH_OFF.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src
Name the options to "Pixel Location":
- PIXLOC_CENTER -> CENTER
- PIXLOC_UL_CORNER -> UL_CORNER
Signed-off-by: Rafael Antognolli
---
src/intel/blorp/blorp_genX_exec.h | 4 +---
src/intel/genxml/gen6.xml | 4 ++--
src/intel/genxml/gen7.xml | 4 ++--
src/in
Upload blend states using GENX(BLEND_STATE_ENTRY_pack), generated from
genxml.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 3 +-
src/mesa/drivers/dri/i965/gen6_cc.c | 216
Emit 3DSTATE_SCISSOR_STATE_POINTERS using brw_batch_emit, and pack the
scissor states using GENX(SCISSOR_RECT_pack), generated from genxml.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/genX_state_upload.c | 89
- Normalize "Anti-Aliasing Enable"
- Add "Multisample Rasterization Mode" constants
- Rename "Use Point Width on Vertex" to "Vertex"
- Rename "Use Point Width from State" to "State"
Signed-off-by: Rafael Antognolli
---
src/intel/gen
Ported in this patch:
- 3DSTATE_DS
- 3DSTATE_GS
- 3DSTATE_HS
- 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources | 6 +-
src/mesa/drivers/dri/i965/brw_state.h | 18 +-
src/mesa/drivers/dri/i965
The following states are ported on this patch:
- gen6_gs_push_constants
- gen6_vs_push_constants
- gen6_wm_push_constants
- gen7_tes_push_constants
v2:
- Use helper to setup brw_address (Kristian)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources
From: Kenneth Graunke
Make atoms initalization compile conditionally based on the target
platform.
---
src/mesa/drivers/dri/i965/brw_state.h | 12 +-
src/mesa/drivers/dri/i965/brw_state_upload.c | 385 +---
src/mesa/drivers/dri/i965/genX_state_upload.c | 340 +++
- "COLOR_CALC_STATE Change" -> "Color Calc State Pointer Valid"
- "Pointer to COLOR_CALC_STATE" -> "Color Calc State Pointer"
- "BackFace" -> "Backface"
Signed-off-by: Rafael Antognolli
---
src/intel/blorp/blorp_genX_exe
Rename that field name on genxml for:
- 3DSTATE_GS - gen6+
- 3DSTATE_DS - gen7+
- 3DSTATE_HS - gen7+
Signed-off-by: Rafael Antognolli
---
src/intel/genxml/gen6.xml| 2 +-
src/intel/genxml/gen7.xml| 6 +++---
src/intel/genxml/gen75.xml | 6 +++---
src/intel/genxml
Signed-off-by: Rafael Antognolli
---
src/intel/blorp/blorp_genX_exec.h | 2 +-
src/intel/genxml/gen6.xml | 2 +-
src/intel/genxml/gen7.xml | 2 +-
src/intel/genxml/gen75.xml| 2 +-
src/intel/genxml/gen8.xml | 2 +-
src/intel/genxml/gen9.xml | 2 +-
src
This makes genxml create the right struct types, and generate the right
batch commands.
Signed-off-by: Rafael Antognolli
Reviewed-by: Kenneth Graunke
---
src/intel/genxml/gen6.xml | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/intel/genxml/gen6.xml b/src/intel
Emit 3DSTATE_TE on Gen7+ using brw_batch_emit helper.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen7_te_state.c | 67 +
src/mesa/drivers/dri
Emit 3DSTATE_MULTISAMPLE using brw_batch_emit.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_context.h| 9 +-
src/mesa/drivers/dri/i965/brw_state.h | 2 +-
src/mesa/drivers/dri/i965/gen6_multisample_state.c | 6 +-
src/mesa/drivers/dri/i965
From: Kenneth Graunke
Both GS and SOL have these fields. Some were ReorderEnable = true,
some were ReorderMode = REORDER_TRAILING, and some were just TRAILING.
Signed-off-by: Kenneth Graunke
---
src/intel/genxml/gen6.xml| 5 -
src/intel/genxml/gen7.xml| 5 -
src/intel/
This function now lives inside genX_state_upload.c.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 8 +-
src/mesa/drivers/dri/i965/gen6_sf_state.c | 265 +--
3 files changed, 274
Emit 3DSTATE_SOL on Gen7+ using brw_batch_emit helper, that uses pack
structs from genxml.
v2:
- Add helpers to assign struct brw_address (Kristian)
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +-
src/mesa/drivers/dri/i965/brw_state.h
On Mon, Apr 24, 2017 at 03:03:56PM -0700, Kenneth Graunke wrote:
> On Wednesday, April 19, 2017 4:56:13 PM PDT Rafael Antognolli wrote:
> > From: Kenneth Graunke
> >
> > Both GS and SOL have these fields. Some were ReorderEnable = true,
> > some were ReorderMode =
On Thu, Apr 20, 2017 at 09:55:56AM -0700, Kristian H. Kristensen wrote:
> Rafael Antognolli writes:
>
> > Emit 3DSTATE_VS on Gen6+ using brw_batch_emit helper, that uses pack
> > structs from genxml.
> >
> > Signed-off-by: Rafael Antognolli
> >
Emit 3DSTATE_MULTISAMPLE using brw_batch_emit.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_context.h| 9 +-
src/mesa/drivers/dri/i965/brw_state.h | 2 +-
src/mesa/drivers/dri/i965/gen6_multisample_state.c | 6 +-
src/mesa/drivers/dri/i965
On this patch, we port:
- brw_polygon_stipple
- brw_polygon_stipple_offset
- brw_line_stipple
- brw_drawing_rect
The original code is still left behind because it is being used by
gen4-5.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/Makefile.sources | 1
Signed-off-by: Rafael Antognolli
---
src/intel/blorp/blorp_genX_exec.h | 2 +-
src/intel/genxml/gen6.xml | 2 +-
src/intel/genxml/gen7.xml | 2 +-
src/intel/genxml/gen75.xml| 2 +-
src/intel/genxml/gen8.xml | 2 +-
src/intel/genxml/gen9.xml | 2 +-
src
Emits 3DSTATE_RASTER from genX_state_upload.c using pack structs from
genxml.
Signed-off-by: Rafael Antognolli
---
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen8_sf_state.c | 125 +---
src/mesa/drivers/dri/i965/genX_state_upload.c
401 - 500 of 597 matches
Mail list logo
