Re: [Mesa-dev] [PATCH] i965: Fix depth field setting in surface state for raw buffer on Gen7/8

2015-04-07 Thread Zhenyu Wang
On 2015.04.07 09:18:08 -0700, Kristian Høgsberg wrote: > On Mon, Apr 6, 2015 at 10:51 PM, Zhenyu Wang wrote: > > On Gen7/8 for RAW surface format, the depth field (surf[3]) in surface > > state means [30:21] bits of number of entries which is different from > > other surface format which uses [26:

Re: [Mesa-dev] [PATCH] i965: Fix depth field setting in surface state for raw buffer on Gen7/8

2015-04-07 Thread Anuj Phogat
On Mon, Apr 6, 2015 at 10:51 PM, Zhenyu Wang wrote: > On Gen7/8 for RAW surface format, the depth field (surf[3]) in surface > state means [30:21] bits of number of entries which is different from > other surface format which uses [26:21] bits field. > > Signed-off-by: Zhenyu Wang > --- > src/me

Re: [Mesa-dev] [PATCH] i965: Fix depth field setting in surface state for raw buffer on Gen7/8

2015-04-07 Thread Kristian Høgsberg
On Mon, Apr 6, 2015 at 10:51 PM, Zhenyu Wang wrote: > On Gen7/8 for RAW surface format, the depth field (surf[3]) in surface > state means [30:21] bits of number of entries which is different from > other surface format which uses [26:21] bits field. > > Signed-off-by: Zhenyu Wang Is there a bu

[Mesa-dev] [PATCH] i965: Fix depth field setting in surface state for raw buffer on Gen7/8

2015-04-06 Thread Zhenyu Wang
On Gen7/8 for RAW surface format, the depth field (surf[3]) in surface state means [30:21] bits of number of entries which is different from other surface format which uses [26:21] bits field. Signed-off-by: Zhenyu Wang --- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 7 +-- src/mesa/