On Sunday, January 04, 2015 12:03:01 PM Ben Widawsky wrote:
> On Wed, Nov 12, 2014 at 11:17:55AM -0800, Kenneth Graunke wrote:
> > According to the documentation, we need to do a CS stall on every fourth
> > PIPE_CONTROL command to avoid GPU hangs. The kernel does a CS stall
> > between batches, s
On Wed, Nov 12, 2014 at 11:17:55AM -0800, Kenneth Graunke wrote:
> According to the documentation, we need to do a CS stall on every fourth
> PIPE_CONTROL command to avoid GPU hangs. The kernel does a CS stall
> between batches, so we only need to count the PIPE_CONTROLs in our batches.
>
> v2: G
According to the documentation, we need to do a CS stall on every fourth
PIPE_CONTROL command to avoid GPU hangs. The kernel does a CS stall
between batches, so we only need to count the PIPE_CONTROLs in our batches.
v2: Get the generation check right (caught by Chris Wilson),
combine the ++
On Wednesday, November 12, 2014 10:53:29 AM Chris Wilson wrote:
> On Wed, Nov 12, 2014 at 11:39:28AM +0100, Daniel Vetter wrote:
> > On Wed, Nov 12, 2014 at 01:33:01AM -0800, Kenneth Graunke wrote:
> > > +/* Implement the WaCsStallAtEveryFourthPipecontrol workaround on IVB,
BYT:
> > > + *
> > > +
On 11/12/2014 10:53 AM, Chris Wilson wrote:
> On Wed, Nov 12, 2014 at 11:39:28AM +0100, Daniel Vetter wrote:
>> On Wed, Nov 12, 2014 at 01:33:01AM -0800, Kenneth Graunke wrote:
>>> +/* Implement the WaCsStallAtEveryFourthPipecontrol workaround on IVB, BYT:
>>> + *
>>> + * "Every 4th PIPE_CONTROL co
On 11/12/2014 10:39 AM, Daniel Vetter wrote:
> On Wed, Nov 12, 2014 at 01:33:01AM -0800, Kenneth Graunke wrote:
>> According to the documentation, we need to do a CS stall on every fourth
>> PIPE_CONTROL command to avoid GPU hangs. The kernel does a CS stall
>> between batches, so we only need to
On Wed, Nov 12, 2014 at 11:39:28AM +0100, Daniel Vetter wrote:
> On Wed, Nov 12, 2014 at 01:33:01AM -0800, Kenneth Graunke wrote:
> > +/* Implement the WaCsStallAtEveryFourthPipecontrol workaround on IVB, BYT:
> > + *
> > + * "Every 4th PIPE_CONTROL command, not counting the PIPE_CONTROL with
> > +
On Wed, Nov 12, 2014 at 01:33:01AM -0800, Kenneth Graunke wrote:
> According to the documentation, we need to do a CS stall on every fourth
> PIPE_CONTROL command to avoid GPU hangs. The kernel does a CS stall
> between batches, so we only need to count the PIPE_CONTROLs in our batches.
>
> Signe
According to the documentation, we need to do a CS stall on every fourth
PIPE_CONTROL command to avoid GPU hangs. The kernel does a CS stall
between batches, so we only need to count the PIPE_CONTROLs in our batches.
Signed-off-by: Kenneth Graunke
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src/mesa/drivers/dri/i965/brw_context.h
