Using mesa OpenCL failed on a big endian PowerPC machine because
si_vgt_param_key is using bitfields and a 32 bit int for an
index into an array.
Fix si_vgt_param_key to work correctly on both little endian
and big endian machines.
Signed-off-by: Bas Vermeulen
---
src/gallium/drivers/radeonsi/s
Nice, did you actually get it to work entirely on a big endian machine?
Bit fields aren't super portable, but this looks good enough. However, I
think we should use the PIPE_ARCH_LITTLE_ENDIAN define from u_endian.h
Cheers,
Nicolai
On 20.03.2018 15:21, Bas Vermeulen wrote:
Using mesa OpenCL
I'm able to call clinfo without things crashing. Without this fix, clinfo
results in a signal 11 because key.index is byte swapped. With it,
I get the information I would expect. I'm working to test the OpenCL
currently.
I'll update the patch to use PIPE_ARCH_LITTLE_ENDIAN instead of my own #if.
Am Dienstag, den 20.03.2018, 15:33 +0100 schrieb Nicolai Hähnle:
> Nice, did you actually get it to work entirely on a big endian
> machine?
>
> Bit fields aren't super portable, [...]
Indeed, the order of the bits in a bit field is compiler implementation
dependent. To make sure that changing the
I am working on a new version of this patch. I have one version which does
away with all the bitfields, and uses
functions to update the index.
Another approach would be to change the union to a struct, and use a
function to get the index.
Yet another approach would be to keep the contents of the u
On Mon, Apr 9, 2018 at 10:51 AM, Bas Vermeulen wrote:
> I am working on a new version of this patch. I have one version which does
> away with all the bitfields, and uses
> functions to update the index.
> Another approach would be to change the union to a struct, and use a
> function to get the
Am Montag, den 09.04.2018, 14:03 -0400 schrieb Marek Olšák:
> On Mon, Apr 9, 2018 at 10:51 AM, Bas Vermeulen
> wrote:
Which solution is better depends on what is done more often: reading
the index or writing to the bit fields.
> > I am working on a new version of this patch. I have one version
>
On Mon, Apr 9, 2018 at 5:19 PM, Gert Wollny wrote:
> Am Montag, den 09.04.2018, 14:03 -0400 schrieb Marek Olšák:
> > On Mon, Apr 9, 2018 at 10:51 AM, Bas Vermeulen
> > wrote:
> Which solution is better depends on what is done more often: reading
> the index or writing to the bit fields.
>
> > >
Am Montag, den 09.04.2018, 17:26 -0400 schrieb Marek Olšák:
> On Mon, Apr 9, 2018 at 5:19 PM, Gert Wollny
> wrote:
> >
> >
> > There is another option: Check at configuration time whether the
> > bit field layout is like the low or the high endian layout you
> > already implemented, and instead
On 2018-04-10 08:38 AM, Gert Wollny wrote:
> Am Montag, den 09.04.2018, 17:26 -0400 schrieb Marek Olšák:
>> On Mon, Apr 9, 2018 at 5:19 PM, Gert Wollny
>> wrote:
>>>
>>> There is another option: Check at configuration time whether the
>>> bit field layout is like the low or the high endian layout
On Mon, Apr 9, 2018 at 11:19 PM, Gert Wollny wrote:
> Am Montag, den 09.04.2018, 14:03 -0400 schrieb Marek Olšák:
> > On Mon, Apr 9, 2018 at 10:51 AM, Bas Vermeulen
> > wrote:
> Which solution is better depends on what is done more often: reading
> the index or writing to the bit fields.
>
The
On 2018-04-10 10:03 AM, Bas Vermeulen wrote:
> On Mon, Apr 9, 2018 at 11:19 PM, Gert Wollny wrote:
>> Am Montag, den 09.04.2018, 14:03 -0400 schrieb Marek Olšák:
>>> On Mon, Apr 9, 2018 at 10:51 AM, Bas Vermeulen
>
>> There is another option: Check at configuration time whether the bit
>> field
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