Re: [Mesa-dev] [PATCH] radv: Store shaders in VRAM.

On 13 March 2017 at 00:29, Bas Nieuwenhuizen wrote: > Less IFETCH latency on misses. Shader code is write once read many, > so GTT doesn't make much sense anyway. > > If it turns out to fragment the CPU visible VRAM too much, we can upload with > SDMA. Reviewed-by:Dave

[Mesa-dev] [PATCH] radv: Store shaders in VRAM.

Less IFETCH latency on misses. Shader code is write once read many, so GTT doesn't make much sense anyway. If it turns out to fragment the CPU visible VRAM too much, we can upload with SDMA. Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_pipeline.c | 2 +-