On Tue, Apr 04, 2017 at 05:10:03PM -0700, Kenneth Graunke wrote:
> Based on a patch by Kristian Høgsberg.
I'd prefer if this was "Remove gen2/3 fence accounting"
Since gen4, we do not use fence registers for any GPU access and so
never have to account for the fence during batch construction. All
Based on a patch by Kristian Høgsberg.
---
src/mesa/drivers/dri/i965/brw_bufmgr.h| 5 -
src/mesa/drivers/dri/i965/intel_bufmgr_gem.c | 237 ++
src/mesa/drivers/dri/i965/intel_bufmgr_priv.h | 5 -
3 files changed, 13 insertions(+), 234 deletions(-)
diff --git a