Re: [Mesa-dev] [PATCH 2/2] i965/fs: indirect addressing with doubles is not supported in CHV/BSW

2016-06-17 Thread Samuel Iglesias Gonsálvez
On 17/06/16 08:57, Kenneth Graunke wrote: > On Wednesday, June 15, 2016 9:25:45 AM PDT Samuel Iglesias Gonsálvez wrote: >> From the Cherryview's PRM, Volume 7, 3D Media GPGPU Engine, Register Region >> Restrictions, page 844: >> >> "When source or destination datatype is 64b or operation is int

Re: [Mesa-dev] [PATCH 2/2] i965/fs: indirect addressing with doubles is not supported in CHV/BSW

2016-06-16 Thread Kenneth Graunke
On Wednesday, June 15, 2016 9:25:45 AM PDT Samuel Iglesias Gonsálvez wrote: > From the Cherryview's PRM, Volume 7, 3D Media GPGPU Engine, Register Region > Restrictions, page 844: > > "When source or destination datatype is 64b or operation is integer DWord >multiply, indirect addressing mus

[Mesa-dev] [PATCH 2/2] i965/fs: indirect addressing with doubles is not supported in CHV/BSW

2016-06-15 Thread Samuel Iglesias Gonsálvez
From the Cherryview's PRM, Volume 7, 3D Media GPGPU Engine, Register Region Restrictions, page 844: "When source or destination datatype is 64b or operation is integer DWord multiply, indirect addressing must not be used." Signed-off-by: Samuel Iglesias Gonsálvez Cc: "12.0" Bugzilla: https