Re: [Mesa-dev] [PATCH 2/4] radeon/llvm: SI shader vector instructions implicitly use the EXEC register.

2012-09-06 Thread Michel Dänzer
On Don, 2012-09-06 at 09:45 -0400, Tom Stellard wrote: > On Thu, Sep 06, 2012 at 01:00:01PM +0200, Michel Dänzer wrote: > > From: Michel Dänzer > > I'm still not quite sure what the intended use cases are for adding > implicit uses and defs to instructions. I tried to do this with the VCC > reg

Re: [Mesa-dev] [PATCH 2/4] radeon/llvm: SI shader vector instructions implicitly use the EXEC register.

2012-09-06 Thread Tom Stellard
On Thu, Sep 06, 2012 at 01:00:01PM +0200, Michel Dänzer wrote: > From: Michel Dänzer > I'm still not quite sure what the intended use cases are for adding implicit uses and defs to instructions. I tried to do this with the VCC register for VOPC and the V_CNDMASK instructions, but the optimizer w

[Mesa-dev] [PATCH 2/4] radeon/llvm: SI shader vector instructions implicitly use the EXEC register.

2012-09-06 Thread Michel Dänzer
From: Michel Dänzer Signed-off-by: Michel Dänzer --- src/gallium/drivers/radeon/SIInstrInfo.td |4 1 file changed, 4 insertions(+) diff --git a/src/gallium/drivers/radeon/SIInstrInfo.td b/src/gallium/drivers/radeon/SIInstrInfo.td index 135f279..49ef342 100644 --- a/src/gallium/driver