Re: [Mesa-dev] [PATCH 3/5] i965/vec4: Register spilling should never see registers with size != 1

2015-07-26 Thread Iago Toral
On Fri, 2015-07-24 at 16:20 +0300, Francisco Jerez wrote: > Iago Toral Quiroga writes: > > > Larger registers should have been moved to scratch (like GRF array access) > > or split to size 1 by the split_virtual_grfs pass. > > Not necessarily. split_virtual_grfs() won't be able to split stuff >

Re: [Mesa-dev] [PATCH 3/5] i965/vec4: Register spilling should never see registers with size != 1

2015-07-24 Thread Francisco Jerez
Iago Toral Quiroga writes: > Larger registers should have been moved to scratch (like GRF array access) > or split to size 1 by the split_virtual_grfs pass. Not necessarily. split_virtual_grfs() won't be able to split stuff which is read or written at once by the same instruction -- E.g. by sen

[Mesa-dev] [PATCH 3/5] i965/vec4: Register spilling should never see registers with size != 1

2015-07-24 Thread Iago Toral Quiroga
Larger registers should have been moved to scratch (like GRF array access) or split to size 1 by the split_virtual_grfs pass. --- src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocat