Emit 3DSTATE_MULTISAMPLE using brw_batch_emit. Signed-off-by: Rafael Antognolli <rafael.antogno...@intel.com> --- src/mesa/drivers/dri/i965/brw_context.h | 9 +- src/mesa/drivers/dri/i965/brw_state.h | 2 +- src/mesa/drivers/dri/i965/gen6_multisample_state.c | 6 +- src/mesa/drivers/dri/i965/gen8_multisample_state.c | 18 +--- src/mesa/drivers/dri/i965/genX_state_upload.c | 100 +++++++++++++- 5 files changed, 99 insertions(+), 36 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 7b354c4..192ea21 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1549,15 +1549,6 @@ brw_blorp_copytexsubimage(struct brw_context *brw, int dstX0, int dstY0, int width, int height); -/* gen6_multisample_state.c */ -unsigned -gen6_determine_sample_mask(struct brw_context *brw); - -void -gen6_emit_3dstate_multisample(struct brw_context *brw, - unsigned num_samples); -void -gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned mask); void gen6_get_sample_position(struct gl_context *ctx, struct gl_framebuffer *fb, diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 0ed4dc1..3968916 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -110,7 +110,6 @@ extern const struct brw_tracked_state gen7_cs_push_constants; extern const struct brw_tracked_state gen6_binding_table_pointers; extern const struct brw_tracked_state gen6_color_calc_state; extern const struct brw_tracked_state gen6_gs_binding_table; -extern const struct brw_tracked_state gen6_multisample_state; extern const struct brw_tracked_state gen6_renderbuffer_surfaces; extern const struct brw_tracked_state gen6_sampler_state; extern const struct brw_tracked_state gen6_sol_surface; @@ -123,7 +122,6 @@ extern const struct brw_tracked_state gen7_push_constant_space; extern const struct brw_tracked_state gen7_urb; extern const struct brw_tracked_state haswell_cut_index; extern const struct brw_tracked_state gen8_index_buffer; -extern const struct brw_tracked_state gen8_multisample_state; extern const struct brw_tracked_state gen8_pma_fix; extern const struct brw_tracked_state gen8_vf_topology; extern const struct brw_tracked_state brw_cs_work_groups_surface; diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c index a59ffec..77c5fd6 100644 --- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c @@ -122,7 +122,7 @@ gen6_set_sample_maps(struct gl_context *ctx) /** * 3DSTATE_MULTISAMPLE */ -void +static void gen6_emit_3dstate_multisample(struct brw_context *brw, unsigned num_samples) { @@ -160,7 +160,7 @@ gen6_emit_3dstate_multisample(struct brw_context *brw, ADVANCE_BATCH(); } -unsigned +static unsigned gen6_determine_sample_mask(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; @@ -195,7 +195,7 @@ gen6_determine_sample_mask(struct brw_context *brw) /** * 3DSTATE_SAMPLE_MASK */ -void +static void gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned mask) { BEGIN_BATCH(2); diff --git a/src/mesa/drivers/dri/i965/gen8_multisample_state.c b/src/mesa/drivers/dri/i965/gen8_multisample_state.c index e36d037..7a31a5d 100644 --- a/src/mesa/drivers/dri/i965/gen8_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen8_multisample_state.c @@ -69,21 +69,3 @@ gen8_emit_3dstate_sample_pattern(struct brw_context *brw) OUT_BATCH(brw_multisample_positions_1x_2x); ADVANCE_BATCH(); } - - -static void -upload_multisample_state(struct brw_context *brw) -{ - gen8_emit_3dstate_multisample(brw, brw->num_samples); - gen6_emit_3dstate_sample_mask(brw, gen6_determine_sample_mask(brw)); -} - -const struct brw_tracked_state gen8_multisample_state = { - .dirty = { - .mesa = _NEW_MULTISAMPLE, - .brw = BRW_NEW_BLORP | - BRW_NEW_CONTEXT | - BRW_NEW_NUM_SAMPLES, - }, - .emit = upload_multisample_state -}; diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index d314fdc..be06227 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -24,6 +24,7 @@ #include <assert.h> #include "common/gen_device_info.h" +#include "common/gen_sample_positions.h" #include "genxml/gen_macros.h" /* #include "vbo/vbo.h" */ @@ -37,6 +38,7 @@ #include "brw_defines.h" #endif #include "brw_draw.h" +#include "brw_multisample_state.h" #include "brw_state.h" #include "brw_wm.h" #include "brw_util.h" @@ -1363,6 +1365,38 @@ static const struct brw_tracked_state genX(sol_state) = { /* ---------------------------------------------------------------------- */ +static unsigned +genX(determine_sample_mask)(struct brw_context *brw) +{ + struct gl_context *ctx = &brw->ctx; + float coverage = 1.0f; + float coverage_invert = false; + unsigned sample_mask = ~0u; + + /* BRW_NEW_NUM_SAMPLES */ + unsigned num_samples = brw->num_samples; + + if (_mesa_is_multisample_enabled(ctx)) { + if (ctx->Multisample.SampleCoverage) { + coverage = ctx->Multisample.SampleCoverageValue; + coverage_invert = ctx->Multisample.SampleCoverageInvert; + } + if (ctx->Multisample.SampleMask) { + sample_mask = ctx->Multisample.SampleMaskValue; + } + } + + if (num_samples > 1) { + int coverage_int = (int) (num_samples * coverage + 0.5f); + uint32_t coverage_bits = (1 << coverage_int) - 1; + if (coverage_invert) + coverage_bits ^= (1 << num_samples) - 1; + return coverage_bits & sample_mask; + } else { + return 1; + } +} + #if GEN_GEN >= 7 static void genX(upload_ps)(struct brw_context *brw) @@ -1401,7 +1435,7 @@ genX(upload_ps)(struct brw_context *brw) * in 3DSTATE_SAMPLE_MASK; the values should match. */ /* _NEW_BUFFERS, _NEW_MULTISAMPLE */ #if GEN_IS_HASWELL - ps.SampleMask = gen6_determine_sample_mask(brw); + ps.SampleMask = genX(determine_sample_mask)(brw); #endif /* 3DSTATE_PS expects the number of threads per PSD, which is always 64; @@ -3485,6 +3519,64 @@ static const struct brw_tracked_state genX(vertices) = { /* ---------------------------------------------------------------------- */ +static void +genX(emit_3dstate_multisample2)(struct brw_context *brw, + unsigned num_samples) +{ + assert(brw->num_samples <= 16); + + unsigned log2_samples = ffs(MAX2(num_samples, 1)) - 1; + + brw_batch_emit(brw, GENX(3DSTATE_MULTISAMPLE), multi) { + multi.PixelLocation = CENTER; + multi.NumberofMultisamples = log2_samples; +#if GEN_GEN < 8 +#if GEN_GEN >= 7 + switch (num_samples) { + case 1: + GEN_SAMPLE_POS_1X(multi.Sample); + break; + case 2: + GEN_SAMPLE_POS_2X(multi.Sample); + break; + case 4: + GEN_SAMPLE_POS_4X(multi.Sample); + break; + case 8: + GEN_SAMPLE_POS_8X(multi.Sample); + break; + default: + break; + } +#else + GEN_SAMPLE_POS_4X(multi.Sample); +#endif +#endif + } +} + +static void +genX(upload_multisample_state)(struct brw_context *brw) +{ + genX(emit_3dstate_multisample2)(brw, brw->num_samples); + + brw_batch_emit(brw, GENX(3DSTATE_SAMPLE_MASK), sm) { + sm.SampleMask = genX(determine_sample_mask)(brw); + } +} + +static const struct brw_tracked_state genX(multisample_state) = { + .dirty = { + .mesa = _NEW_MULTISAMPLE, + .brw = BRW_NEW_BLORP | + BRW_NEW_CONTEXT | + BRW_NEW_NUM_SAMPLES, + }, + .emit = genX(upload_multisample_state) +}; + +/* ---------------------------------------------------------------------- */ + void genX(init_atoms)(struct brw_context *brw) { @@ -3528,7 +3620,7 @@ genX(init_atoms)(struct brw_context *brw) &brw_vs_samplers, &brw_gs_samplers, &gen6_sampler_state, - &gen6_multisample_state, + &genX(multisample_state), &genX(vs_state), &genX(gs_state), @@ -3612,7 +3704,7 @@ genX(init_atoms)(struct brw_context *brw) &brw_tcs_samplers, &brw_tes_samplers, &brw_gs_samplers, - &gen6_multisample_state, + &genX(multisample_state), &genX(vs_state), &genX(hs_state), @@ -3699,7 +3791,7 @@ genX(init_atoms)(struct brw_context *brw) &brw_tcs_samplers, &brw_tes_samplers, &brw_gs_samplers, - &gen8_multisample_state, + &genX(multisample_state), &genX(vs_state), &genX(hs_state), -- git-series 0.9.1 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev