Re: [Mesa-dev] [PATCH v4 20/40] intel/compiler: workaround for SIMD8 half-float MAD in gen8

2019-02-18 Thread Iago Toral
On Sat, 2019-02-16 at 09:02 -0600, Jason Ekstrand wrote: > On Tue, Feb 12, 2019 at 5:56 AM Iago Toral Quiroga > wrote: > > Empirical testing shows that gen8 has a bug where MAD instructions > > with > > > > a half-float source starting at a non-zero offset fail to execute > > > > properly. > >

Re: [Mesa-dev] [PATCH v4 20/40] intel/compiler: workaround for SIMD8 half-float MAD in gen8

2019-02-16 Thread Jason Ekstrand
On Tue, Feb 12, 2019 at 5:56 AM Iago Toral Quiroga wrote: > Empirical testing shows that gen8 has a bug where MAD instructions with > a half-float source starting at a non-zero offset fail to execute > properly. > > This scenario usually happened in SIMD8 executions, where we used to > pack

[Mesa-dev] [PATCH v4 20/40] intel/compiler: workaround for SIMD8 half-float MAD in gen8

2019-02-12 Thread Iago Toral Quiroga
Empirical testing shows that gen8 has a bug where MAD instructions with a half-float source starting at a non-zero offset fail to execute properly. This scenario usually happened in SIMD8 executions, where we used to pack vector components Y and W in the second half of SIMD registers (therefore,