I'm not convinced this is correct/safe, at least for the meta clear.
The GL 3.2 spec says, on page 221 (page 235 of the PDF):
* If the number of layers of each attachment are not all identical, rendering
will be limited to the smallest number of layers of any attachment.
And then in the de
OK, in that case:
Reviewed-by: Chris Forbes
On Fri, Jan 10, 2014 at 3:42 PM, Paul Berry wrote:
> On 9 January 2014 18:19, Chris Forbes wrote:
>>
>> I'm not convinced this is correct/safe, at least for the meta clear.
>>
>> The GL 3.2 spec says, on page 221 (pa
This is a slightly odd construction (although copied from the existing code):
> + if ((shProg == NULL) || (shProg->_LinkedShaders[stage] == NULL))
> +shProg = NULL;
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of gl_ClipDistance.
If this is indeed how you intended it to work, and agree that it's
completely benign, then patches 1-12 are:
Reviewed-by: Chris Forbes
On Fri, Jan 10, 2014 at 3:19 PM, Paul Berry wrote:
> Rather than maintain separately named arrays and counts for vertex,
> g
Minor nit, but could CS be done after the ordered pipeline stages, for
consistency?
On Fri, Jan 10, 2014 at 3:19 PM, Paul Berry wrote:
> ---
> src/mesa/main/shaderapi.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
> index 519b200.
Oops. Thanks for fixing this.
I don't think you want this in 10.0 though -- ARB_draw_indirect only
landed in 10.1/master.
Reviewed-by: Chris Forbes
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I would have expected explicit qualifiers to trump everything. I
wonder why that was removed -- Ian?
It seems there's a clear precedent established by the other drivers,
though -- so I think we should stick to it.
Bonus for us: since our centroid support is a bit bogus and requires
workarounds, w
Does this actually work for >16?
Sampler messages' descriptor only has 4 bits for the sampler index, so
it seems you'd silently lose the top bit and get the wrong sampler
parameters.
On Thu, Jan 16, 2014 at 8:08 AM, Kenneth Graunke wrote:
> This causes us to advertise:
> - GL_MAX_TEXTURE_IMAGE_U
That assert means that you've not told the backend the size of some
object correctly, and the register allocator has placed it so its true
extent hangs off the end of the available registers.
To fix it you'll need to adjust the code generation for array accesses
in i965 -- probably quite a bit.
O
s garbage. :(
>
>> Marek
>>
>> On Thu, Jan 16, 2014 at 1:28 AM, Kenneth Graunke
>> wrote:
>>> On 01/15/2014 12:56 PM, Chris Forbes wrote:
>>>> Does this actually work for >16?
>>>>
>>>> Sampler messages' descriptor only has
What do you plan on using for `tesselation control` and `tesselation
evaluation` shaders?
On Mon, Jan 20, 2014 at 12:56 PM, Emil Velikov wrote:
> ping ?
>
> On 10/01/14 18:44, Emil Velikov wrote:
>> Signed-off-by: Emil Velikov
>> ---
>>
>> Hi Paul,
>>
>> Here is another small cleanup inspired by
For the series,
Reviewed-by: Chris Forbes
On Sat, Jan 18, 2014 at 9:52 AM, Anuj Phogat wrote:
> This will be useful in my next patch which depends on a functionality
> of _mesa_get_min_invocations_per_fragment() to ignore the sample
> qualifier (prog->IsSample) based on a flag
This series adds support for ARB_texture_view on Ivybridge and Haswell.
Since there's lots of little changes all over the place, here's a summary:
[PATCH 01/15] i965: Pretend we don't support
- Fixes an issue where we could support one of the 96-bit formats directly,
but not its friends i
This will eventually be relaxed, but we'll get the fallback path
working first.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
b/src/mesa/drivers/dri
ental ARB_texture_view support) fixes
the piglit test: `spec/ARB_texture_view/view compare 48bit formats`
No regressions in gpu.tests on Haswell.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_surface_formats.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/dr
e.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex_validate.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_validate.c
b/src/mesa/drivers/dri/i965/intel_tex_validate.c
index d8497a6..c8e1afb 100644
--- a/src/mesa/driver
We'll still avoid MinLayer here since the fast path doesn't understand
arrays at all, but it's straightforward to do levels.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/m
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index bda09a0..430bc36 100644
--- a
We need to wire the original texture's mt into the view. All the hard
work of setting up an appropriate tree of gl_texture_image structures
has already been done by core mesa.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex.c | 41 +++
1
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
index c55108a..72ce653 100644
--- a/src/mesa/drivers
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
index 72ce653..26190db 100644
--- a/src/mesa/drivers
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index c2901de..8f70db6 100644
--- a/src/mesa
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index a5ce507..93cdc75 100644
--- a/src/mesa
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_fbo.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
b/src/mesa/drivers/dri/i965/intel_fbo.c
index f094718..6426bf8 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa
This is the effective layer count, for clears etc. This differs from the
depth of the miptree level when views are involved.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_fbo.c | 10 ++
src/mesa/drivers/dri/i965/intel_fbo.h | 3 +++
2 files changed, 13 insertions
We're about to need this in another place.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_fbo.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
b/src/mesa/drivers/dri/i965/intel_fbo.c
index 4cdf54d..e7
This allows core mesa's TexSubImage paths etc to work correctly
with views which have nonzero MinLevel or MinLayer.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri
We're about to need this so we can determine the layer count of the
wrapper.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_fbo.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
b/src/mesa/drivers/dri
Oops, s/96/48/ and s/128/64/ in the description of the first patch.
On Tue, Jan 21, 2014 at 11:34 PM, Chris Forbes wrote:
> This series adds support for ARB_texture_view on Ivybridge and Haswell.
>
> Since there's lots of little changes all over the place, here's a summar
->Extensions.ARB_texture_view = true;
>
> Something like attached.
>
> Courtney
>
>
> On Tue, Jan 21, 2014 at 3:34 AM, Chris Forbes wrote:
>
>> Signed-off-by: Chris Forbes
>> ---
>> src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 2 +-
>> 1 fil
Oops -- there's junk in this commit message from before it was pulled
into this series.
On Tue, Jan 21, 2014 at 11:34 PM, Chris Forbes wrote:
> None of the other 3-component 16bpc formats are directly supported, so
> they get promoted to XRGB equivalents. *Not* promoting RGB16F the
How big is the sampler state pointer on Broadwell?
My understanding was it would have to be >32bits, and this looks like
it will do the wrong thing if the sampler state table is placed across
a 4G boundary. Perhaps there is something else that makes this not a
factor, though.
On Fri, Jan 24, 2014
Signed-off-by: Chris Forbes
---
src/mesa/main/texobj.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index 3c64c437..9cb46cd 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -557,6 +557,13
These two patches correct issues with level and layer clamping with texture
views.
With the main series + this, Jon's rendering-levels and rendering-layers tests
behave
correctly.
I'll fit these into the appropriate points in the main series, but didn't feel
it
was necessary to send out the who
Previously it was possible to sample off the end of the view, out to the
full extent of the data store. Now we get correct clamping behavior.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff
This is defined in the same included file as ARB_draw_indirect.
Signed-off-by: Chris Forbes
---
src/mapi/glapi/gen/gl_API.xml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index 193ee37..42df1ad 100644
--- a/src/mapi/glapi
This series adds support for ARB_fragment_layer_viewport on i965 Gen7, in
core contexts [the same conditions as for ARB_viewport_array being exposed].
This is another tiny piece of GL4.3, allowing the GS- [or with
AMD_vertex_shader_*, VS- ] written values of gl_Layer and gl_ViewportIndex
to be rea
The spec doesn't actually mention adding this, but this is the usual
pattern so I'm assuming it's a spec bug.
Signed-off-by: Chris Forbes
---
src/glsl/glcpp/glcpp-parse.y | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/glsl/glcpp/glcpp-parse.y b/src/glsl/glcpp/glcp
---
src/mesa/drivers/dri/i965/brw_vs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
b/src/mesa/drivers/dri/i965/brw_vs.c
index a4f2ac6..092d53a 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -61
This extension is purely GLSL -- there are no new GL API elements.
Signed-off-by: Chris Forbes
---
src/mapi/glapi/gen/gl_API.xml | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index 42df1ad..bd0a2a7 100644
Signed-off-by: Chris Forbes
---
src/mesa/main/extensions.c | 1 +
src/mesa/main/mtypes.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index 0676f1e..3239268 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main
Signed-off-by: Chris Forbes
---
docs/GL3.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 799db4b..c8cb917 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -149,7 +149,7 @@ GL 4.3:
GL_ARB_copy_imagenot
d-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 22 ++
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 ++
3 files changed, 25 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src
Signed-off-by: Chris Forbes
---
src/glsl/builtin_variables.cpp | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/glsl/builtin_variables.cpp b/src/glsl/builtin_variables.cpp
index d6bc3c0..bb499fa 100644
--- a/src/glsl/builtin_variables.cpp
+++ b/src/glsl/builtin_variables.cpp
This requires both GS and ARB_viewport_array, so we can only enable it
in core contexts for Gen7+ for now.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_extensions.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965
Same idea as gl_Layer -- this is delivered in part of R0.0.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 22 ++
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 ++
3 files changed, 25
Signed-off-by: Chris Forbes
---
docs/relnotes/10.1.html | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/relnotes/10.1.html b/docs/relnotes/10.1.html
index 14b635f..4b83f7c 100644
--- a/docs/relnotes/10.1.html
+++ b/docs/relnotes/10.1.html
@@ -49,6 +49,7 @@ Note: some of the new features
Signed-off-by: Chris Forbes
---
src/glsl/glsl_parser_extras.cpp | 1 +
src/glsl/glsl_parser_extras.h | 2 ++
src/glsl/standalone_scaffolding.cpp | 1 +
3 files changed, 4 insertions(+)
diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp
index 87784ed
Oops-- silly mistake in subject line. s/shader/layer/
On Sat, Jan 25, 2014 at 7:51 PM, Chris Forbes wrote:
> This requires both GS and ARB_viewport_array, so we can only enable it
> in core contexts for Gen7+ for now.
>
> Signed-off-by: Chris Forbes
> ---
> src/mes
If multiple color outputs are written, this shader is unlikely to be
useful with a winsys framebuffer.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1e6c3e0..d6ebe50 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b
gt;
>
> On Tue, Jan 21, 2014 at 3:34 AM, Chris Forbes wrote:
>
>> We're about to need this in another place.
>>
>> Signed-off-by: Chris Forbes
>> ---
>> src/mesa/drivers/dri/i965/intel_fbo.c | 7 +--
>> 1 file changed, 5 insertions(+), 2 deleti
for having this language in the spec?
In any case, happy to park this for now -- it just looked like an easy
win, and it turns out it's not quite.
-- Chris
On Mon, Jan 27, 2014 at 5:59 AM, Ian Romanick wrote:
> On 01/24/2014 10:51 PM, Chris Forbes wrote:
>> Same idea as gl_Layer -- this
Hi Ian,
Replying to IRC:
< idr> chrisf: You know if SNB can do the enhanced textureGatherOffset
modes from ARB_gpu_shader5?
Sandybridge has per-slot offset support (gather4_po) but lacks:
* Channel select bits in the message header
* Any ability to sample from a multi-component textu
Marek,
I think there's an interaction with software primitive restart here.
The primitive restart path maps the index buffer (and the indirect
buffer, for indirect draws), and relies on these checks to guarantee
that's possible.
That may not be an issue for your driver, though -- I don't know.
This series adds ARB_texture_view support for i965 Gen7/7.5.
Significant changes from V2:
- All the assorted post-V2 format fixups are moved to the start of the series.
This gives us consistent memory layout for all the formats between which we
have to support casting.
- Texture validation ch
This will eventually be relaxed, but we'll get the fallback path
working first.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
We're about to need this in another place.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_fbo.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
b/src/mesa/drivers/dri/i965/intel_
We will need this for munging the view's format.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 31 ---
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 +++
2 files changed, 26 insertions(+), 8 dele
Signed-off-by: Chris Forbes
---
src/mesa/swrast/s_texfetch.c | 6 +++---
src/mesa/swrast/s_texfetch_tmp.h | 16
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/src/mesa/swrast/s_texfetch.c b/src/mesa/swrast/s_texfetch.c
index cd09827..4084bbd 100644
--- a
This is the actual mesa_format to use. In non-view cases this is always
the same as the mt's format.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex.c | 8
src/mesa/drivers/dri/i965/intel_tex_obj.h | 5 +
src/mesa/drivers/dri
The sampler can handle R8G8B8X8 (and substitute 1.0 for the fourth
component) but we can't use it as a render target.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_surface_formats.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri
This allows core mesa's TexSubImage paths etc to work correctly
with views which have nonzero MinLevel or MinLayer.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_tex.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/main/texobj.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index 8bdbb08..918dd59 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -559,6 +559,13
We will need to call this to munge view formats.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 76 +++
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 ++
2 files changed, 45 insertions(+), 34 deletions(-)
diff --git a/src/mesa
If we were to relayout the miptree, we'd break any views that are
sharing it.
(Simplified based on suggestions from Eric)
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex_validate.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri
es in piglit's
arb_texture_view-format-consistency-get test on i965. The similar 1-, 2-
and 4-component cases already worked because they took the memcpy path
rather than repacking.
Signed-off-by: Chris Forbes
---
src/mesa/main/pack.c | 116 +
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965
Now this is the preferred format for GL_SRGB8_ALPHA8.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_surface_formats.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index
We need to wire the original texture's mt into the view. All the hard
work of setting up an appropriate tree of gl_texture_image structures
has already been done by core mesa.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_tex.c
This is supported by all generations, and is required for memory layout
consistency for texture_view.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_surface_formats.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c
b/src/mesa
We're about to need this so we can determine the layer count of the
wrapper.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_fbo.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
index c037aa5..6d42dce
We'll still avoid MinLayer here since the fast path doesn't understand
arrays at all, but it's straightforward to do levels.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 2 +-
1 file changed, 1 insertion(+), 1 de
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_fbo.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
b/src/mesa/drivers/dri/i965/intel_fbo.c
index d0e1349..98247f2 100644
--- a/src/mesa/drivers/dri/i965
ental ARB_texture_view support) fixes
the piglit test: `spec/ARB_texture_view/view compare 48bit formats`
No regressions in gpu.tests on Haswell.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_surface_formats.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
This is the effective layer count, for clears etc. This differs from the
depth of the miptree level when views are involved.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_fbo.c | 10 ++
src/mesa/drivers/dri/i965/intel_fbo.h | 3 +++
2 files
'prefer_no_swizzle' flag which
was set in TexStorage/TextureView paths, but we need the same behavior
for ARB_shader_image_load_store (which also works with images created
via TexImage, so we don't want it to be conditional.
Signed-off-by: Chris Forbes
---
src/mesa/main/texformat.c | 22 ++
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 9c5623c..1a7a9e8
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index 7143ab7
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/intel_tex_copy.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_tex_copy.c
b/src/mesa/drivers/dri/i965/intel_tex_copy.c
index ca0b5b9..c2b6c35 100644
--- a/src/mesa/drivers
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
index d16da97..c037aa5
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
docs/GL3.txt| 2 +-
docs/relnotes/10.2.html | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index b7e4c87..657ac7e 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -162,7 +162,7
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 15fcd30..b7280671 100644
--- a/src/mesa
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 9e80935..300ff5c 100644
--- a/src/mesa
V2: - No need for layer_multiplier; multisampled depth surfaces are IMS.
- Remove unused num_layers.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_clear.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers
This was marked as somewhere we're deviating from the spec in order to
follow what nVIDIA does. Is there no longer a reason to?
On Thu, Apr 3, 2014 at 7:30 PM, Samuel Iglesias Gonsalvez
wrote:
> According to the spec:
> must be RENDERBUFFER and
> should be set to the name of the
Yes, that will work -- will do.
On Mon, Apr 7, 2014 at 5:29 PM, Kenneth Graunke wrote:
> On 04/02/2014 01:05 AM, Chris Forbes wrote:
>> None of the other 3-component 16bpc formats are directly supported, so
>> they get promoted to XRGB equivalents. *Not* promoting RGB16F the sa
I'll move this patch after 7/30 to avoid things being temporarily broken.
On Thu, Apr 3, 2014 at 3:34 AM, Brian Paul wrote:
> On 04/02/2014 02:04 AM, Chris Forbes wrote:
>>
>> These formats can be cast to others (with different component types or
>> size
This extension is a huge grab-bag of "stuff that's in DX11". Break it
apart to make it clear what still needs to be done.
Signed-off-by: Chris Forbes
---
docs/GL3.txt | 11 +++
1 file changed, 11 insertions(+)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index bf51e3a..06889
Ian,
Would we put that format in a view class by itself?
-- Chris
On Wed, Apr 9, 2014 at 7:49 AM, Ian Romanick wrote:
> On 04/08/2014 02:13 AM, Kenneth Graunke wrote:
>> On 04/02/2014 01:04 AM, Chris Forbes wrote:
>>> This series adds ARB_texture_view support
On Wed, Apr 9, 2014 at 7:23 AM, Ian Romanick wrote:
> I believe UBO array indices are also dynamically uniform.
I was surprised to find this when building the list too, but I believe
it's unrestricted.
The GLSL 4.0 spec, 4.3.7 p43 (bottom of) says:
"Any integral expression can be used to i
I was about to get to this, really! :P
This patch is:
Reviewed-by: Chris Forbes
On Fri, Apr 11, 2014 at 1:04 PM, Brian Paul wrote:
> Instead of switch statements.
> ---
> src/mesa/main/texstore.c | 30 +-
> 1 file changed, 5 insertions(+),
OK, that simplifies things. Will fix.
On Sat, Apr 12, 2014 at 4:04 AM, Ian Romanick wrote:
> On 04/09/2014 01:11 AM, Chris Forbes wrote:
>> On Wed, Apr 9, 2014 at 7:23 AM, Ian Romanick wrote:
>>
>>> I believe UBO array indices are also dynamically uniform.
>>
&
We've been allowing `centroid` and `sample` in all kinds of weird places
where they're not valid.
Insist that `sample` is combined with `in` or `out`;
and that `centroid` is combined with `in`, `out`, or the deprecated
`varying`.
Signed-off-by: Chris Forbes
---
src/glsl/ast_to_hi
This is a lame place to put this validation. Will respin something
more sensible.
On Sat, Apr 12, 2014 at 12:35 PM, Chris Forbes wrote:
> We've been allowing `centroid` and `sample` in all kinds of weird places
> where they're not valid.
>
> Insist that `sample` is comb
require an extra
case for uniform blocks members and struct members, though, since they
don't go through the normal path.
Signed-off-by: Chris Forbes
---
src/glsl/ast_to_hir.cpp | 20
1 file changed, 20 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_t
> This does a little more than the error message says - won't it prevent using
> sample/centroid on, say, vertex shader inputs/fragment shader outputs?
>
> If so, then it seems like you could drop a pile of other code:
>
> /* From section 4.3.4 of the GLSL 1.30 spec:
>*"It is an e
As of 943b2d52bf5, layout(binding) on an atomic would fail the assertion
here.
Signed-off-by: Chris Forbes
Cc: Ian Romanick
---
src/glsl/link_uniform_initializers.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/glsl/link_uniform_initializers.cpp
b/src/glsl
Fixes piglit's spec/gl-3.2/get-active-attrib-returns-all-inputs.
Signed-off-by: Chris Forbes
---
src/mesa/main/shader_query.cpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/mesa/main/shader_query.cpp b/src/mesa/main/shader_query.cpp
index c6e7342..2be84f2 100644
---
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