[Mesa-dev] [PATCH v4 26/38] nvir/nir: implement loading system values

v2: support more sys values fixed a bug where for multi component reads all values ended up in x v3: add load_patch_vertices_in v4: add subgroup stuff Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 108 +

[Mesa-dev] [PATCH v4 28/38] nvir/nir: implement nir_instr_type_tex

reference in convert(glsl_sampler_dim&, bool, bool) fix tg4 component selection Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 219 + 1 file changed, 219 insertions(+) diff --git a/src/gallium/drivers/nouve

[Mesa-dev] [PATCH v4 36/38] nvir/nir: add memory barriers

Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v4 18/38] nvir/nir: implement CFG handling

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 255 - 1 file changed, 253 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v4 29/38] nvir/nir: add getOperation for intrinsics

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 24 ++ 1 file changed, 24 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v4 35/38] nvir/nir: implement images

v3: fix compiler warnings v4: use loadFrom helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 276 +++-- 1 file changed, 258 insertions(+), 18 deletions(-) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v4 24/38] nvir/nir: implement nir_intrinsic_load_input

v3: and load_output v4: use smarter getIndirect helper use new getSlotAddress helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 38 ++ 1 file changed, 38 insertions(+) diff --git a/src/gallium/drivers/n

[Mesa-dev] [PATCH v4 33/38] nvir/nir: implement nir_intrinsic_load_ubo

v4: use loadFrom helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 13 + 1 file changed, 13 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v4 20/38] nvir/nir: add skeleton for nir_intrinsic_instr

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 19 +++ 1 file changed, 19 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v4 23/38] nvir/nir: implement nir_intrinsic_store_(per_vertex_)output

v3: add workaround for RA issues indirects have to be multiplied by 0x10 fix indirect access v4: use smarter getIndirect helper use storeTo helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 43 +++

[Mesa-dev] [PATCH v4 25/38] nvir/nir: implement intrinsic_discard(_if)

Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v4 21/38] nvir/nir: implement nir_alu_instr handling

Signed-off-by: Karol Herbst <kher...@redhat.com> v2: user bitfield_insert instead of bfi rework switch helper macros remove some lowering code (LoweringHelper is now used for this) v3: add pack_half_2x16_split add unpack_half_2x16_split_x/y --- .../drivers/nouveau/c

[Mesa-dev] [PATCH v4 38/38] nvir/nir: implement intrinsic shader_clock

Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8 1 file changed, 8 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v4 27/38] nvir/nir: implement nir_ssa_undef_instr

v2: use mkOp Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v4 30/38] nvir/nir: implement vote and ballot

v2: add vote_eq support use the new subop intrinsic helper add ballot v3: add read_(first_)invocation Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 41 ++ 1 file changed, 41 insertions(+) diff --git

Re: [Mesa-dev] radeonsi nir arb_vertex_attrib_64bit fixes

thanks for the three first patches. They seem like they could make it a bit easier for me to implement this in nouveau, but I don't know when I will have the chance to look into that, because I want to fix 64 bit stuff in general first. On Mon, Jan 8, 2018 at 1:35 AM, Timothy Arceri

[Mesa-dev] [PATCH] mesa/st: translate SO info in glsl_to_nir() case

s spec@glsl-1.50@transform-feedback-type-and-size Signed-off-by: Rob Clark <robdcl...@gmail.com> Tested-by: Karol Herbst <kher...@redhat.com> Cc: Rob Clark <robdcl...@gmail.com> Cc: Timothy Arceri <tarc...@itsqueeze.com> --- src/mesa/state_tracker/st_program.c | 61 ++

[Mesa-dev] [PATCH] clover: add functions up to 2.2 to ICD dispatch table

using void* for functions we need newer CL headers for. Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/state_trackers/clover/api/dispatch.cpp | 29 +- src/gallium/state_trackers/clover/api/dispatch.hpp | 116 + 2 files changed, 144 insertions

Re: [Mesa-dev] [PATCH v2 12/22] clover: Refuse to compile source code to SPIR-V

On Tue, Jan 23, 2018 at 1:33 AM, Pierre Moreau wrote: > Creating a program using clCreateProgramWithSource to SPIR-V requires a > non-upstreamed version of LLVM and clang, therefore it is currently not > supported. > > Signed-off-by: Pierre Moreau >

Re: [Mesa-dev] [PATCH v2 00/22] Introducing SPIR-V support to clover

Patches 1-2, 8-10, 14-19, 21 are Reviewed-by Karol Herbst <kher...@redhat.com> For Patches 16-22 I looked inside your repository. regarding all Patches modifying the headers: shouldn't we just update those headers? I personally don't care much, because nobody will use mesa as the system

Re: [Mesa-dev] [PATCH v2 00/22] Introducing SPIR-V support to clover

there seem to be some patches missing? On Tue, Jan 23, 2018 at 1:33 AM, Pierre Moreau wrote: > Hello, > > Here is the second version of my initial series for adding SPIR-V support to > clover, after the RFC back in May 2017. > > For recap, the focus of this series is to

Re: [Mesa-dev] [PATCH v2 13/22] clover: Handle the case when linking SPIR-V binaries together

On Tue, Jan 23, 2018 at 1:33 AM, Pierre Moreau wrote: > Signed-off-by: Pierre Moreau > --- > src/gallium/state_trackers/clover/core/program.cpp | 22 > +- > 1 file changed, 17 insertions(+), 5 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH] nvc0: collapse output slots to have adjacent registers

Tested-By: Karol Herbst <kher...@redhat.com> On Mon, Feb 5, 2018 at 6:15 AM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > The hardware skips over unallocated slots, so we have to make sure those > registers are packed together. > > Fixes KHR-GL45.enhanced_layouts.fr

[Mesa-dev] [PATCH] nvc0: disable MS Images for sample_count == 1 on Maxwell

fixes KHR-GL45.multi_bind.dispatch_bind_textures on Maxwell Suggested-by: Ilia Mirkin <imir...@alum.mit.edu> Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gal

Re: [Mesa-dev] [PATCH] gm107/ir: avoid using kepler instruction capabilities

On Sat, Feb 10, 2018 at 7:41 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > Split up the op properties table into generation-specific bits, and only > use the kepler ones on kepler. Fixes some CTS images tests. > > Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu> tha

Re: [Mesa-dev] [PATCH v3 13/21] configure.ac, meson: Check for SPIRV-Tools and llvm-spirv

do we already have an upstream version of both dependencies we could just use? Or do we still need special branches? On Wed, Feb 21, 2018 at 11:50 PM, Pierre Moreau wrote: > Signed-off-by: Pierre Moreau > --- > > Notes: > v3: > * Bump the

Re: [Mesa-dev] [PATCH v3 21/21] clover: Use OpenCL 2.1 defines in place of cl_khr_il_program

I think this can be merged into patches 17 and 18, no? On Wed, Feb 21, 2018 at 11:50 PM, Pierre Moreau wrote: > Signed-off-by: Pierre Moreau > --- > src/gallium/state_trackers/clover/api/device.cpp | 3 +-- >

Re: [Mesa-dev] [PATCH] nvc0: fix writing query results into buffer

Tested-by: Karol Herbst <kher...@redhat.com> On Wed, Feb 21, 2018 at 6:17 AM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > We need to mark the range as valid, and validate the resource using a > helper to ensure that the buffer status is marked properly. > > Fixes some

Re: [Mesa-dev] [PATCH] nv50,nvc0: fix clear buffer acceleration

Tested-by: Karol Herbst <kher...@redhat.com> On Wed, Feb 21, 2018 at 5:20 AM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > Two things were off: > - valid range was not updated, which could affect waiting for future >maps > - fencing was done manually instead of using

Re: [Mesa-dev] [PATCH] nv50, nvc0: fix integer MS resolves using 2d engine

Tested-by: Karol Herbst <kher...@redhat.com> On Thu, Feb 22, 2018 at 5:34 AM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > We don't want filtering for integer textures, same as depth/stencil. > > Fixes: KHR-GL45.direct_state_access.renderbuffers_storage_multisample > Si

[Mesa-dev] [PATCH] nvir/nvc0: fix legalizing of ld unlock c0[0x10000]

We have to increase the file index also for 0x1 not just for values greater than 0x1. Fixes: 37b67db6ae34fb6586d640a7a1b6232f091dd812 Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +- 1 file changed, 1 ins

[Mesa-dev] [PATCH v5 04/34] nvir: move common converter code in base class

v2: remove TGSI related bits Signed-off-by: Karol Herbst <kher...@redhat.com> Reviewed-by: Pierre Moreau <pierre.mor...@free.fr> --- src/gallium/drivers/nouveau/Makefile.sources | 2 + .../nouveau/codegen/nv50_ir_from_common.cpp| 107 + .../dri

[Mesa-dev] [PATCH v5 06/34] nvir/nir: add support for NIR on nvc0

of the nir shader merge: use the lowering helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/Makefile.sources | 1 + src/gallium/drivers/nouveau/codegen/nv50_ir.cpp| 3 + src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + .../d

[Mesa-dev] [PATCH v5 05/34] nvir: add lowering helper

this is mostly usefull for lazy IR converters not wanting to deal with 64 bit lowering and other illegal stuff v5: also handle SAT Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/Makefile.sources | 2 + .../nouveau/codegen/nv50_ir_lowering_help

[Mesa-dev] [PATCH v5 03/34] nvir: print the shader type when dumping headers

this makes debugging the shader header a little easier Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouvea

[Mesa-dev] [PATCH v5 00/34] Nir support for Nouveau

/CTS pass rates are close to the TGSI path. Connor Abbott (1): nv50/ir/ra: Fix copying compound for moves Karol Herbst (33): st/glsl_to_nir: run lower_output_reads on !PIPE_CAP_TGSI_CAN_READ_OUTPUTS nvir: print the shader type when dumping headers nvir: move common converter code in base

[Mesa-dev] [PATCH v5 08/34] nvir/nir: run some passes to make the conversion easier

v2: add constant_folding Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 40 ++ 1 file changed, 40 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/n

[Mesa-dev] [PATCH v5 02/34] nv50/ir/ra: Fix copying compound for moves

so we don't know which is which. I took the approach of calling copyCompound() inside coalesceValues(), instead of afterwards. Cc: Ilia Mirkin <imir...@alum.mit.edu> Cc: Karol Herbst <kher...@redhat.com> Tested-by: Karol Herbst <kher...@redhat.com> Signed-off-by: Karol Herbst <k

[Mesa-dev] [PATCH v5 12/34] nvir/nir: add loadFrom and storeTo helpler

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 47 ++ 1 file changed, 47 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v5 09/34] nvir/nir: track defs and provide easy access functions

v2: add helper function for indirects v4: add new getIndirect overload for easier use v5: use getSSA for ssa values we can just create the values for unassigned registers in getSrc Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v5 07/34] nvc0/debug: add env var to make nir default

v2: allow for non debug builds as well v3: move reading out env var more global disable tg4 with multiple offsets with nir disable caps for 64 bit types Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/nouveau_screen.c | 4 src/gallium/d

[Mesa-dev] [PATCH v5 01/34] st/glsl_to_nir: run lower_output_reads on !PIPE_CAP_TGSI_CAN_READ_OUTPUTS

this is required for Nouveau Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/mesa/state_tracker/st_glsl_to_nir.cpp | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp index 765c

[Mesa-dev] [PATCH v5 19/34] nvir/nir: implement nir_intrinsic_store_(per_vertex_)output

v3: add workaround for RA issues indirects have to be multiplied by 0x10 fix indirect access v4: use smarter getIndirect helper use storeTo helper v5: don't use const_offset directly Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v5 14/34] nvir/nir: implement CFG handling

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 255 - 1 file changed, 253 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v5 17/34] nvir/nir: implement nir_alu_instr handling

Signed-off-by: Karol Herbst <kher...@redhat.com> v2: user bitfield_insert instead of bfi rework switch helper macros remove some lowering code (LoweringHelper is now used for this) v3: add pack_half_2x16_split add unpack_half_2x16_split_x/y v5: replace first argument with n

[Mesa-dev] [PATCH v5 11/34] nvir/nir: run assignSlots

getSlotAddress helper fix for 64 bit typed inputs v5: change getSlotAddress interface for easier use fix sample inputs fix slot counting for mat Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 605 + 1 file change

[Mesa-dev] [PATCH v5 13/34] nvir/nir: parse NIR shader info

v2: parse a few more fields v3: add special handling for GL_ISOLINES Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 58 ++ 1 file changed, 58 insertions(+) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v5 23/34] nvir/nir: implement nir_ssa_undef_instr

v2: use mkOp Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v5 27/34] nvir/nir: implement variable indexing

with indirects aren't guarenteed to be aligned to 0x10 anymore. v3: use fixed size vec4 arrays until we fix MemoryOpt v4: fix for 64 bit types v5: use loadFrom helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 59 +++

[Mesa-dev] [PATCH v5 18/34] nvir/nir: implement nir_intrinsic_load_uniform

v2: use new getIndirect helper fixes symbols for 64 bit types v4: use smarter getIndirect helper simplify address calculation use loadFrom helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 10 ++

[Mesa-dev] [PATCH v5 25/34] nvir/nir: add getOperation for intrinsics

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 24 ++ 1 file changed, 24 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v5 20/34] nvir/nir: implement nir_intrinsic_load_input

v3: and load_output v4: use smarter getIndirect helper use new getSlotAddress helper v5: don't use const_offset directly fix for indirects Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 46 ++ 1 file c

[Mesa-dev] [PATCH v5 15/34] nvir/nir: implement nir_load_const_instr

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 20 1 file changed, 20 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v5 10/34] nvir/nir: add nir type helper functions

v4: treat imul as unsigned v5: remove pointless !! Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 117 + 1 file changed, 117 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v5 16/34] nvir/nir: add skeleton for nir_intrinsic_instr

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 19 +++ 1 file changed, 19 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v5 31/34] nvir/nir: implement images

v3: fix compiler warnings v4: use loadFrom helper v5: fix signed min/max Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 300 +++-- 1 file changed, 280 insertions(+), 20 deletions(-) diff --git a/src/gallium/d

[Mesa-dev] [PATCH v5 30/34] nvir/nir: implement ssbo intrinsics

v4: use loadFrom helper v5: support indirect buffer access Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 87 ++ 1 file changed, 87 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v5 21/34] nvir/nir: implement intrinsic_discard(_if)

Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v5 22/34] nvir/nir: implement loading system values

v2: support more sys values fixed a bug where for multi component reads all values ended up in x v3: add load_patch_vertices_in v4: add subgroup stuff v5: add helper invocation Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v5 26/34] nvir/nir: implement vote and ballot

v2: add vote_eq support use the new subop intrinsic helper add ballot v3: add read_(first_)invocation Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 41 ++ 1 file changed, 41 insertions(+) diff --git

[Mesa-dev] [PATCH v5 29/34] nvir/nir: implement nir_intrinsic_load_ubo

v4: use loadFrom helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 13 + 1 file changed, 13 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH v5 24/34] nvir/nir: implement nir_instr_type_tex

reference in convert(glsl_sampler_dim&, bool, bool) fix tg4 component selection v5: fill up coords args with scratch values if coords provided is less than TexTarget.getArgCount() Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.c

[Mesa-dev] [PATCH v5 34/34] nvir/nir: implement intrinsic shader_clock

Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8 1 file changed, 8 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v5 32/34] nvir/nir: add memory barriers

v5: add more barrier intrinsics Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 19 +++ 1 file changed, 19 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/d

[Mesa-dev] [PATCH v5 33/34] nvir/nir: implement load_per_vertex_output

v4: use smarter getIndirect helper use new getSlotAddress helper v5: use loadFrom helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 22 ++ 1 file changed, 22 insertions(+) diff --git a/src/gallium/d

[Mesa-dev] [PATCH v5 28/34] nvir/nir: implement geometry shader nir_intrinsics

v4: use smarter getIndirect helper use new getSlotAddress helper use loadFrom helper Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 25 ++ 1 file changed, 25 insertions(+) diff --git a/src/gallium/d

[Mesa-dev] [PATCH 16/22] nvir/nir: parse NIR shader info

TODO: this is far from being complete, but at least this let the basics things work already. Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 26 ++ 1 file changed, 26 insertions(+) diff --git a/src/gallium/d

[Mesa-dev] [PATCH 11/22] nvir/nir: implement nir_alu_instr handling

code duplication can be eliminated through templates Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 524 - 1 file changed, 523 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH 09/22] nvir/nir: implement nir_load_const_instr

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 20 1 file changed, 20 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 10/22] nvir/nir: add skeleton for nir_intrinsic_instr

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp| 17 + 1 file changed, 17 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 18/22] nvir/nir: implement loading system values

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 26 ++ 1 file changed, 26 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 15/22] nvir/nir: run assignSlots

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 427 + 1 file changed, 427 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 17/22] nvir/nir: implement intrinsic_discard(_if)

Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 19/22] nvir/nir: implement nir_ssa_undef_instr

Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 20/22] nvir/nir: implement nir_instr_type_tex

TODO: a lot of those fields are not valid for a lot of tex ops. Not quite sure if it's worth the effort to check for those or just keep it like that. It seems to kind of work. Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH 13/22] nvir/nir: implement nir_intrinsic_store_output

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 43 ++ 1 file changed, 43 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 12/22] nvir/nir: implement nir_intrinsic_load_uniform

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp| 21 + 1 file changed, 21 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 14/22] nvir/nir: implement nir_intrinsic_load_input

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 30 ++ 1 file changed, 30 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

Re: [Mesa-dev] [PATCH 00/22] Nir support for Nouveau

uhm, actually that should have been marked as a RFC, sorry for that. On Thu, Dec 21, 2017 at 4:51 PM, Karol Herbst <kher...@redhat.com> wrote: > Plans are to get SPIR-V support for Nouveau with a cheap way. Before that I > was looking into Pierres work on his direct SPIR-V to nvir pas

Re: [Mesa-dev] [PATCH 02/22] nvir: move common converter code in base class

On Thu, Dec 21, 2017 at 5:21 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Thu, Dec 21, 2017 at 10:51 AM, Karol Herbst <kher...@redhat.com> wrote: >> this is more or less a todo list of things I should move elsewhere. Not all >> of >> it should be actual

[Mesa-dev] [PATCH 21/22] nvir/nir: implement vote

TODO: there is more Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 16 1 file changed, 16 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH 22/22] nvir/nir: implement variable indexing

with indirects aren't guarenteed to be aligned to 0x10 anymore. Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 58 ++ 1 file changed, 58 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.

[Mesa-dev] [PATCH 02/22] nvir: move common converter code in base class

this is more or less a todo list of things I should move elsewhere. Not all of it should be actually moved, but... Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/Makefile.sources | 2 + .../nouveau/codegen/nv50_ir_from_common.cpp

[Mesa-dev] [PATCH 00/22] Nir support for Nouveau

on: * Geometry shaders * UBOs ./piglit run -x glx -x egl -x streaming-texture-leak -x max-texture-size tests/gpu.py: [26073/26073] skip: 1574, pass: 13451, warn: 9, fail: 5287, crash: 5752 Note: a lot of crashes are geometry/tesselation stuff hitting asserts. Karol Herbst (22): nvir: print

[Mesa-dev] [PATCH 03/22] nvc0: add support for NIR

not all those nir options are actually required, it just made the work a little easier. TODO: there is a little memory leak, because the nir shader is duplicated twice. this has to be done though, we just need to clean it up properly Signed-off-by: Karol Herbst <kher...@redhat.com> --

[Mesa-dev] [PATCH 06/22] nvir/nir: track defs and provide easy access functions

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 108 + 1 file changed, 108 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 08/22] nvir/nir: implement CFG handling

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 255 - 1 file changed, 253 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/c

[Mesa-dev] [PATCH 07/22] nvir/nir: add nir type helper functions

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 116 + 1 file changed, 116 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 05/22] nvir/nir: run some passes to make the conversion easier

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 37 ++ 1 file changed, 37 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH 04/22] nvc0/debug: add env var to make nir default

can't be turned on for release builds for now. Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/d

[Mesa-dev] [PATCH 01/22] nvir: print the shader type when dumping headers

this makes debugging a little easier Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c

Re: [Mesa-dev] [PATCH 02/22] nvir: move common converter code in base class

the glsl values to the tgsi ones with the code I wrote for assignSlots and because the conversion from TGSI to NVIR already existed, I just used that for now. > On Dec 21, 2017 11:26 AM, "Karol Herbst" <kher...@redhat.com> wrote: >> >> On Thu, Dec 21, 2017 at 5:2

Re: [Mesa-dev] [PATCH v3 17/20] st/glsl_to_nir/radeonsi: enable tessellation shaders

in case v3 doesn't get into mesa, could you extract the src/mesa/state_tracker/st_glsl_to_nir.cpp change into a seperate patch and just push that one? I kind of needs this as well and have a patch doing exactly this in my repository as well. A patch with only this would be Reviewed-by: Karol

[Mesa-dev] [PATCH v2 03/31] nvir: move common converter code in base class

v2: remove TGSI related bits Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/Makefile.sources | 2 + .../nouveau/codegen/nv50_ir_from_common.cpp| 107 + .../drivers/nouveau/codegen/nv50_ir_from_common.h

[Mesa-dev] [PATCH v2 14/31] nvir/nir: implement nir_load_const_instr

Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 20 1 file changed, 20 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n

[Mesa-dev] [PATCH v2 11/31] nvir/nir: run assignSlots

v2: add support for geometry shaders set idx add some missing mappings fix for 64bit inputs/outputs fix up some FP color output index messup parse centroid flag Signed-off-by: Karol Herbst <kher...@redhat.com> --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v2 10/31] nvir/nir: use lowering helper

this helps with a bunch of piglit tests testing 64 bit types Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v2 01/31] st/nir: treat tess shader input/outputs the same as geom shaders

this is enough to get tessellation working in Unigine heaven Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/mesa/state_tracker/st_glsl_to_nir.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_t

[Mesa-dev] [PATCH v2 04/31] nvir: add lowering helper

this is mostly usefull for lazy IR converters not wanting to deal with 64 bit lowering and other illegal stuff Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/Makefile.sources | 2 + .../nouveau/codegen/nv50_ir_lowering_helper.cpp

[Mesa-dev] [PATCH v2 02/31] nvir: print the shader type when dumping headers

this makes debugging the shader header a little easier Signed-off-by: Karol Herbst <kher...@redhat.com> --- src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouvea

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