Configure device tree to load correctly wl12xx based hardware.
Signed-off-by: Fabio Berton <fabio.ber...@ossystems.com.br>
---
.../imx6qdl-var-som-Enable-wl12xx.patch | 84 ++++++++++++++++++++++
recipes-kernel/linux/linux-variscite_4.1.15.bb | 1 +
2 files changed, 85 insertions(+)
create mode 100644
recipes-kernel/linux/linux-variscite-4.1.15/imx6qdl-var-som-Enable-wl12xx.patch
diff --git
a/recipes-kernel/linux/linux-variscite-4.1.15/imx6qdl-var-som-Enable-wl12xx.patch
b/recipes-kernel/linux/linux-variscite-4.1.15/imx6qdl-var-som-Enable-wl12xx.patch
new file mode 100644
index 0000000..8accc75
--- /dev/null
+++
b/recipes-kernel/linux/linux-variscite-4.1.15/imx6qdl-var-som-Enable-wl12xx.patch
@@ -0,0 +1,84 @@
+From 14642037c45996b5288bfec2ce9202f99fa79968 Mon Sep 17 00:00:00 2001
+From: Fabio Berton <fabio.ber...@ossystems.com.br>
+Date: Mon, 26 Sep 2016 10:54:05 -0300
+Subject: [PATCH] imx6qdl-var-som: Enable wl12xx
+Organization: O.S. Systems Software LTDA.
+
+Upstream-Status: Pending
+
+Signed-off-by: Fabio Berton <fabio.ber...@ossystems.com.br>
+---
+ arch/arm/boot/dts/imx6qdl-var-som.dtsi | 51 +++++++++++++++-------------------
+ 1 file changed, 22 insertions(+), 29 deletions(-)
+
+diff --git a/arch/arm/boot/dts/imx6qdl-var-som.dtsi
b/arch/arm/boot/dts/imx6qdl-var-som.dtsi
+index 89e1e3f..66855fe 100644
+--- a/arch/arm/boot/dts/imx6qdl-var-som.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-var-som.dtsi
+@@ -574,6 +574,7 @@
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17069
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17069
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17069
++#define GPIRQ_WL1271 <&gpio6 17 IRQ_TYPE_LEVEL_HIGH>
+ MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059
/* Reserve two pins from sd1 for wl8 gpio, this is pulled low at reset for
WL_EN */
+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059
/* this is for wl_irq which driver will configure as an input with a pull
down */
+ >;
+@@ -815,34 +816,26 @@
+ status = "okay";
+ };
+
+-&usdhc3 { /* uSDHC3, TiWi wl1271 7 Wilink8 WL18xx*/
+- pinctrl-names = "default", "state_100mhz", "state_200mhz";
+- pinctrl-0 = <&pinctrl_usdhc3_2>;
+- pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
+- pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
+- keep-power-in-suspend;
+- enable-sdio-wakeup;
+- vmmc-supply = <&wlan_en_reg>;
+- bus-width = <4>;
+- non-removable;
+- cap-power-off-card;
+- status = "okay";
+- #address-cells = <1>;
+- #size-cells = <0>;
+- wlcore: wlcore@0 {
+- compatible = "ti,wl1835";
+- reg = <2>;
+-#if 0
+- gpio = <177>; /* The wl8 driver expects gpio to be an
integer, so gpio6_17 is (6-1)*32+17=207
+- irq property must not be set as driver
derives irq number from gpio if no irq set
+- use edge irqs for suspend/resume */
+- platform-quirks = <1>;
+-#endif
+- interrupt-parent = <&gpio6>;
+- interrupts = <17 IRQ_TYPE_EDGE_RISING>;
+-
+- /* if a 12xx card is there, configure the clock to
WL12XX_REFCLOCK_38_XTAL */
+- board-ref-clock = <4>;
+- };
++&usdhc3 { /* uSDHC3, TiWi wl1271 */
++ pinctrl-names = "default", "state_100mhz", "state_200mhz";
++ pinctrl-0 = <&pinctrl_usdhc3_2>;
++ pinctrl-1 = <&pinctrl_usdhc3_2_100mhz>;
++ pinctrl-2 = <&pinctrl_usdhc3_2_200mhz>;
++ bus-width = <4>;
++ non-removable;
++ vmmc-supply = <&wlan_en_reg>;
++ vqmmc-1-8-v;
++ cap-power-off-card;
++ keep-power-in-suspend;
++ status = "okay";
+
++ #address-cells = <1>;
++ #size-cells = <0>;
++ wlcore: wlcore@2 {
++ compatible = "ti,wl1271";
++ interrupts-extended = GPIRQ_WL1271;
++ reg = <2>;
++ ref-clock-frequency = <38400000>;
++ };
+ };
++
+--
+2.1.4
+
diff --git a/recipes-kernel/linux/linux-variscite_4.1.15.bb
b/recipes-kernel/linux/linux-variscite_4.1.15.bb
index a9a365f..4e37a57 100644
--- a/recipes-kernel/linux/linux-variscite_4.1.15.bb
+++ b/recipes-kernel/linux/linux-variscite_4.1.15.bb
@@ -14,6 +14,7 @@ SRC_URI = " \
git://github.com/varigit/linux-2.6-imx.git;protocol=git;branch=${SRCBRANCH} \
file://Fix-the-compile-issue-under-gcc6.patch \
file://0001-mxc_hdmi-mxc_hdmi-allow-EDID-to-select-non-CEA-modes.patch \
+ file://imx6qdl-var-som-Enable-wl12xx.patch \
file://defconfig \
"
--
2.1.4
--
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