Re: [meta-xilinx] u-boot-xlnx config modification

Hi ARJ, > -Original Message- > From: meta-xilinx-boun...@yoctoproject.org [mailto:meta-xilinx- > boun...@yoctoproject.org] On Behalf Of Artjom Rjabov > Sent: Tuesday, May 22, 2018 10:28 AM > To: meta-xilinx@yoctoproject.org > Subject: [meta-xilinx] u-boot-xlnx config modification > > Hi!

Re: [meta-xilinx] Xilinx, why are you breaking the meta-xilinx-bsp layer?

Hi Martin, > -Original Message- > From: meta-xilinx-boun...@yoctoproject.org [mailto:meta-xilinx- > boun...@yoctoproject.org] On Behalf Of Martin Lund > Sent: Wednesday, May 16, 2018 3:50 AM > To: meta-xilinx@yoctoproject.org > Subject: Re: [meta-xilinx] Xilinx, why are you breaking the me

[meta-xilinx] u-boot-xlnx config modification

Hi! Is there any quick way to enable or disable u-boot config options using u-boot-xlnx_%.bbappend file? Is there something similar to how it's done in the kernel? ("*.cfg" file with all the config fragments and scc file with "kconf hardware/non-hardware *cfg"). What is the right way to do it?

Re: [meta-xilinx] linux-xlnx: wrong spi-nor eraseblock size

Hi Kevin, Thanks for your observations on this erase size update. Yes, in 2018.1 release the device erase size was incorrect for dual parallel configuration. We fixed that in 2018.2 release. Once it is released you will have that fix. You can use the attached patch to fix that now. Thanks, Naga