Record update in the PAUSE modules database:
modid: [Bit::Vector]
statd: [R]
stats: [d]
statl: [c]
stati: [O]
statp: [p] was [?]
description: [Fast virtual arbitrary-size-machineword CPU] was [Fast virtual
arbitrary-machineword-size CPU]
userid: [
Record update in the PAUSE modules database:
modid: [Bit::Vector]
statd: [R]
stats: [d]
statl: [c]
stati: [O]
description: [Fast virtual arbitrary-machineword-size CPU] was [Virtual (arbitrary
machineword size) CPU]
userid: [STBEY]
chapterid: [ 6]
Record update in the PAUSE modules database:
modid: [Bit::Vector]
statd: [R]
stats: [d]
statl: [c]
stati: [O]
description: [Virtual (arbitrary machineword size) CPU] was [Fast bit-vec, sets of
int & big int math lib]
userid: [STBEY]
chapterid: [ 6]
Record update in the PAUSE modules database:
modid: [Bit::Vector]
statd: [R]
stats: [d]
statl: [c]
stati: [O]
description: [Fast bit-vec, sets of int & big int math lib] was [Efficient bit vector
and set base class]
userid: [STBEY]
chapterid: [ 6]
Da
