I have been discussing our recent findings about alignment padding with Peter Johnson (YASM's primary author) and he has now been through this in some detail and has updated YASM accordingly - see here:
http://www.tortall.net/projects/yasm/changeset/2181 In view of the padding problems we encountered, I have been using pure nop padding in the current Windows assembler code. But I now intend to add a CPU directive to the Windows AMD and Core2 code so that the recommended padding sequences are used. I will, of course, test this to check that this does not re-introduce speed problems. Brian --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "mpir-devel" group. To post to this group, send email to mpir-devel@googlegroups.com To unsubscribe from this group, send email to mpir-devel+unsubscr...@googlegroups.com For more options, visit this group at http://groups.google.com/group/mpir-devel?hl=en -~----------~----~----~----~------~----~------~--~---
