> On Apr 8, 2023, at 2:14 PM, robert bristow-johnson
> wrote:
>
> Also, especially if it's a 64-bit processor, we should simply be able to do
> all of our DSP using doubles
Not a HW person but AFAIK all 64 bit ARM processors also have SIMD. So there
would be a 2x penalty for using double rath
On 2023-04-08, robert bristow-johnson wrote:
So this is what I wonder about. The SHArC is still alive, but is about
the only dedicated DSP that is. I know with your PC there is lotsa
latency for a real-time process and with a Mac there is some latency
but it's better controlled. At least that'
These are good points ... about fixed-point math in hardware.
The Texas Instruments TMS320 family of DSP chips have both fixed-point and
floating-point variations. Even a "16-bit" fixed-point DSP will have 32-bit
results from multiplications, and 8 bits of overhead in the registers storing
inte
On 2023-04-01, Richard Dobson wrote:
"Introductory Digital Signal Processing With Computer Applications",
Paul Lynn and Wolfgang Fuerst. [...]
I've never really coded myself, so no programming books. I've been on
the side of the math. There, Oppenheim and Schafer's work, under the
name "Digi
> On 04/08/2023 5:31 PM EDT Sampo Syreeni wrote:
>
>
> On 2023-03-27, robert bristow-johnson wrote:
>
> > I think denorms are a good idea. They should be handled routinely by
> > now.
>
> I do too. However I think in the DSP circuit they are also a kind of
> stopgap. If you want to do float
On 2023-03-27, robert bristow-johnson wrote:
I think denorms are a good idea. They should be handled routinely by
now.
I do too. However I think in the DSP circuit they are also a kind of
stopgap. If you want to do floats at all, you ought to be able to known
in which regime of semi-logarith
I'm curious about the mathematical ramifications of turning on or off these
various settings.
The options are there for a reason: Because different numerical processing
requirements affect the tradeoffs between speed and accuracy. Sometimes, you
need the precision, and slowing down the processi
> On 04/08/2023 4:09 PM EDT Sampo Syreeni wrote:
>
>
> On 2023-03-26, robert bristow-johnson wrote:
>
> > Title says it all.
>
> I don't really know. However, even in IEEE 754-1985, the double
> precision is defined as a 64-bit format, and the handling of denormals
> is the same as everywhe
On 2023-03-27, Ethan Fenn wrote:
My understanding is that on any reasonably modern Intel/AMD machines,
you just have to make sure that the Flush To Zero (FTZ) and Denormals
Are Zero (DAZ) hardware flags are set when your DSP code runs and
there will be no penalty.
Only it's really difficult
On 2023-03-26, robert bristow-johnson wrote:
Title says it all.
I don't really know. However, even in IEEE 754-1985, the double
precision is defined as a 64-bit format, and the handling of denormals
is the same as everywhere. So, if a processor claims compliance with
said standard, it would
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