On 11/15/18 9:50 AM, Clément Péron wrote:
> Hi Dinh,
>
> Did you upstream the patch on linux-stable ?
>
Not yet...
Dinh
> On Fri, 2 Nov 2018 at 11:02, Clément Péron wrote:
>>
>> Hi Dinh,
>>
>> On Wed, 31 Oct 2018 at 23:02, Dinh Nguyen wrote:
>>
Hi Clement,
On 10/31/2018 10:36 AM, Clément Péron wrote:
> Hi Dinh,
>
> On Wed, 31 Oct 2018 at 15:42, Dinh Nguyen wrote:
>>
>> Hi Clement,
>>
>> On 10/31/2018 08:01 AM, Clément Péron wrote:
>>> Hi,
>>>
>>> The patch "net:
Hi Clement,
On 10/31/2018 08:01 AM, Clément Péron wrote:
> Hi,
>
> The patch "net: stmmac: socfpga: add additional ocp reset line for
> Stratix10" introduce in 4.9.124 broke the ethernet on my CycloneV
> board.
>
> When I boot i have this issue :
>
> socfpga-dwmac ff702000.ethernet: error
On Thu, Jun 14, 2018 at 10:23 AM Jose Abreu wrote:
>
> On 14-06-2018 15:21, Dinh Nguyen wrote:
> >
> > [0.835537] socfpga-dwmac ff702000.ethernet: PTP uses main clock
> > [0.841794] socfpga-dwmac ff702000.ethernet: Version ID not available
> > [0.
On Thu, Jun 14, 2018 at 6:14 AM Marek Vasut wrote:
>
> On 06/14/2018 10:18 AM, Jose Abreu wrote:
> > On 14-06-2018 08:38, Jose Abreu wrote:
> >> Hello,
> >>
> >> On 13-06-2018 21:46, Dinh Nguyen wrote:
> >>> Hi,
> >>>
> >>
Hi,
The stmmac ethernet has stopped working in linux-next and linus/master
branch(v4.17-11782-gbe779f03d563)
It appears that the stmmac ethernet has stopped working after these 2 commits:
4dbbe8dde848 net: stmmac: Add support for U32 TC filter using Flexible RX Parser
5f0456b43140 net: stmmac:
On 04/21/2016 06:51 AM, Marek Vasut wrote:
if you modify the patch to call stmmac_dvr_probe() before calling
socfpga_dwmac_init(), then you would already have the reset control
information.
>>>
>>> I was under the impression that you must call socfpga_dwmac_init()
>>> before
oft.net>
> ---
> V2: Add missing stmmac_rst = NULL; into socfpga_dwmac_init_probe()
> V3: Greatly simplify the code by moving socfpga_dwmac_init() after
> stmmac_dvr_probe(), which is legal. This removes the need for
> temporary registration of the reset controller, which is super.
>
Tested-by: Dinh Nguyen <dingu...@opensource.altera.com>
Thanks,
Dinh
On 04/20/2016 05:27 PM, Marek Vasut wrote:
> On 04/20/2016 11:17 PM, Dinh Nguyen wrote:
>> On 04/19/2016 07:05 PM, Marek Vasut wrote:
>>> Both socfpga_dwmac_parse_data() in dwmac-socfpga.c and stmmac_dvr_probe()
>>> in stmmac_main.c functions call devm_rese
from [] (ret_from_fork+0x14/0x3c)
> ---[ end trace 059d2fbe87608fa9 ]---
>
> Signed-off-by: Marek Vasut <ma...@denx.de>
> Cc: Matthew Gerlach <mgerl...@opensource.altera.com>
> Cc: Dinh Nguyen <dingu...@opensource.altera.com>
> Cc: David S. Miller <da...@d
On 04/19/2016 07:05 PM, Marek Vasut wrote:
> Both socfpga_dwmac_parse_data() in dwmac-socfpga.c and stmmac_dvr_probe()
> in stmmac_main.c functions call devm_reset_control_get() to register an
> reset controller for the stmmac. This results in an attempt to register
> two reset controllers for
On Tue, Mar 15, 2016 at 7:36 AM, Giuseppe CAVALLARO
wrote:
> Hello Tomeu
>
> On 3/15/2016 8:23 AM, Tomeu Vizoso wrote:
>>
>> Thanks.
>>
>> Btw, I have rebased on top of 4.5 this morning and I have noticed that
>> 88f8b1bb41c6 ("stmmac: Fix 'eth0: No PHY found' regression")
On Thu, Mar 10, 2016 at 3:13 AM, Giuseppe CAVALLARO
<peppe.cavall...@st.com> wrote:
> On 3/9/2016 5:31 PM, Dinh Nguyen wrote:
>>
>> On Wed, Mar 9, 2016 at 8:53 AM, Giuseppe CAVALLARO
>> <peppe.cavall...@st.com> wrote:
>>>
>>> Hi Tomeu, Dinh, A
On Wed, Mar 9, 2016 at 8:53 AM, Giuseppe CAVALLARO
wrote:
> Hi Tomeu, Dinh, Andreas
>
> I need a sum and help from you to go ahead on the
> tx timeout.
>
> The "stmmac: MDIO fixes" seems to be the candidate to
> fix the phy connection and I will send the V2 asap (Andreas'
On Tue, Mar 8, 2016 at 1:24 AM, Giuseppe CAVALLARO
<peppe.cavall...@st.com> wrote:
> Hi Dinh,
>
> On 3/8/2016 12:22 AM, Dinh Nguyen wrote:
> [snip]
>>
>>
>> I'm seeing the same issue on the SoCFPGA platform:
>>
>> libphy: PHY stmmac-0:fff
On Mon, Mar 7, 2016 at 11:15 AM, Andreas Färber wrote:
> Am 07.03.2016 um 16:52 schrieb Giuseppe CAVALLARO:
>> On 3/7/2016 4:46 PM, Andreas Färber wrote:
>>> Am 07.03.2016 um 16:09 schrieb Giuseppe CAVALLARO:
On 3/7/2016 3:27 PM, Andreas Färber wrote:
> Indeed,
On 01/01/2016 02:49 AM, Romain Perier wrote:
> Hi all,
>
> Same here on rockchip.
> See "[PATCH] stmmac: Don't exit mdio registration when mdio subnode is
> not found in the DTS"
>
> Regards,
> Romain
>
> 2015-12-18 18:45 GMT+01:00 Dinh Nguyen
Hi,
It appears that commit e34d65696d2e 'stmmac: create of compatible mdio
bus for
stmmac driver' is causing this error on the SoCFPGA platform:
[1.767246] libphy: PHY stmmac-0: not found
[1.772106] eth0: Could not attach to PHY
[1.776129] stmmac_open: Cannot attach to PHY
clock is common.
>
> Acked-by: Rob Herring <r...@kernel.org>
> Signed-off-by: Phil Reid <pr...@electromag.com.au>
> ---
> Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
> drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 9 +
> 2 files ch
l PHY driver which has a deprecated feature of allowing PHY
> properties to be placed into the MAC node.
>
> In order to find the MAC node, we need to walk up the tree of devices
> until we find one with an OF node attached.
>
> Reported-by: Dinh Nguyen <dingu...@opensource.altera
Hi Andrew,
On Fri, 4 Dec 2015, Andrew Lunn wrote:
> On Fri, Dec 04, 2015 at 02:10:50AM +0100, Andrew Lunn wrote:
> > > > FWIW: My initial patch to address the failure worked with the original
> > > > DTB.
> > >
> > > Can I ask what patch are you referring to? I was sidetracked for a while
> >
On 12/03/2015 03:23 PM, David Daney wrote:
> On 12/03/2015 12:48 PM, Pavel Machek wrote:
>> On Thu 2015-10-15 13:25:59, Florian Fainelli wrote:
>>> On 15/10/15 12:59, Dinh Nguyen wrote:
>>>> On 10/15/2015 03:03 PM, Florian Fainelli wrote:
>>>>> On
+CC Giuseppe Cavallaro
+CC STi and Rockchip Maintainers
This is approaching beyond my breadth of knowledge on this subject, so I just
wanted to get some further insight.
On Fri, 16 Oct 2015, Andrew Lunn wrote:
> > > Maybe we need to walk up the hierarchy.
> > >
> > > Perhaps something like:
>
On Sat, 17 Oct 2015, Dinh Nguyen wrote:
> On Sat, 17 Oct 2015, Andrew Lunn wrote:
>
> > > Sure, will try to debug. It looks like phydev->attached_dev is valid, but
> > > phydev->attached_dev->dev.of_node is NULL.
> >
> > Humm
> >
> > p
On Sat, 17 Oct 2015, Andrew Lunn wrote:
> > Sure, will try to debug. It looks like phydev->attached_dev is valid, but
> > phydev->attached_dev->dev.of_node is NULL.
>
> Humm
>
> phydev->attached_dev is a net_device, so should be the mac. What
> device is phydev->attached_dev->dev? Is it not
On Fri, 16 Oct 2015, Andrew Lunn wrote:
> On Fri, Oct 16, 2015 at 05:58:41PM -0500, Dinh Nguyen wrote:
> > On Fri, 16 Oct 2015, Andrew Lunn wrote:
> >
> > > Commit "8b63ec1837fa phylib: Make PHYs children of their MDIO bus, not
> > > the bus' parent.&qu
On Sat, 17 Oct 2015, Dinh Nguyen wrote:
> On Fri, 16 Oct 2015, Andrew Lunn wrote:
>
> > On Fri, Oct 16, 2015 at 05:58:41PM -0500, Dinh Nguyen wrote:
> > > On Fri, 16 Oct 2015, Andrew Lunn wrote:
> > >
> > > > Commit "8b63ec1837fa phylib: Make PHYs
On Fri, 16 Oct 2015, David Daney wrote:
> On 10/16/2015 08:56 AM, Andrew Lunn wrote:
> > > So I think I'll move to inspect what Florian had suggested, and that was
> > > to look
> > > at:
> > > drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c::stmmac_mdio_register
> >
> > I have a suspicion. If
On Fri, 16 Oct 2015, Andrew Lunn wrote:
> On Fri, Oct 16, 2015 at 09:38:37AM -0500, Dinh Nguyen wrote:
> > On Fri, 16 Oct 2015, Andrew Lunn wrote:
> >
> > > > Another debugging point, the SoCFPGA board has a Micrel ksz9021 PHY
> > > > attached
> &
On Fri, 16 Oct 2015, Andrew Lunn wrote:
> Commit "8b63ec1837fa phylib: Make PHYs children of their MDIO bus, not
> the bus' parent." broke finding PHY properties in the MAC device tree
> node. The parent device is now the MDIO bus, not the MAC. Use
> attached_dev towards the MAC device tree node.
On 10/15/2015 03:03 PM, Florian Fainelli wrote:
> On 15/10/15 12:09, Dinh Nguyen wrote:
>> Hi,
>>
>> commit "8b63ec1837fa phylib: Make PHYs children of their MDIO bus, not
>> the bus' parent." seems to have broken ethernet support for the SoCFPGA
>>
On Thu, 15 Oct 2015, Florian Fainelli wrote:
> On 15/10/15 13:49, Dinh Nguyen wrote:
> >>
> >> Does this text change with and without the 8b63ec1837fa patch?
> >
> > No, this text does not change with/without the 8b63ec1837fa patch.
>
> Could you in
On Thu, 15 Oct 2015, Florian Fainelli wrote:
> On 15/10/15 13:49, Dinh Nguyen wrote:
> >>
> >> Does this text change with and without the 8b63ec1837fa patch?
> >
> > No, this text does not change with/without the 8b63ec1837fa patch.
>
> Could you in
On 10/15/2015 03:35 PM, David Daney wrote:
> On 10/15/2015 01:25 PM, Florian Fainelli wrote:
>> On 15/10/15 12:59, Dinh Nguyen wrote:
>>> On 10/15/2015 03:03 PM, Florian Fainelli wrote:
>>>> On 15/10/15 12:09, Dinh Nguyen wrote:
>>>>> Hi,
>>>&g
Hi,
commit "8b63ec1837fa phylib: Make PHYs children of their MDIO bus, not
the bus' parent." seems to have broken ethernet support for the SoCFPGA
platform which is using the stmmac ethernet driver.
It appears that during DHCP, it cannot get an IP address. This only
happens if ethernet was not
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