Hi David,
Am Freitag, 23. Juni 2017, 12:59:07 CEST schrieb David Wu:
> To make internal phy worked, need to configure the phy_clock,
> phy cru_reset and related registers.
>
> Change-Id: I6971c0a769754b824b1b908b56080cbaf7867d13
please remove all Change-Ids from patches before sending upstream.
Am Samstag, 24. Juni 2017, 04:19:10 CEST schrieb Andrew Lunn:
> On Fri, Jun 23, 2017 at 12:41:59PM +0800, David Wu wrote:
> > Support internal ephy currently.
> >
> > Signed-off-by: David Wu
> > ---
> > drivers/net/phy/Kconfig| 4 ++
> > drivers/net/phy/Makefile | 1 +
> > drivers/net/ph
Am Samstag, 24. Juni 2017, 16:04:06 CEST schrieb Andrew Lunn:
> > hmm, we do have quite a number of non-net phys in the phy subsystem
> > (DP, PCIe, ...) and given that the above would be CONFIG_ROCKCHIP_PHY
> > in a global sense, sounds like it could make things confusing.
> >
> > So some additio
Hi David,
Am Dienstag, 27. Juni 2017, 22:33:20 CEST schrieb David.Wu:
> 在 2017/6/24 1:19, Heiko Stuebner 写道:
> > Am Freitag, 23. Juni 2017, 12:59:07 CEST schrieb David Wu:
> >> To make internal phy worked, need to configure the phy_clock,
> >> phy cru_reset and related
Am Freitag, 10. Juni 2016, 18:00:38 schrieb Vincent Palatin:
> When suspending the machine, do not shutdown the external PHY by cutting
> its regulator in the mac platform driver suspend code if Wake-on-Lan is
> enabled, else it cannot wake us up.
> In order to do this, split the suspend/resume cal
external source provides the phy clock for RMII phys.
So set the rate of the correct clock and remove the remaining now
completely unused definition.
Fixes: 436f5ae08f9d ("GMAC: add driver for Rockchip RK3288 SoCs integrated
GMAC")
Cc: sta...@vger.kernel.org
Signed-off-by: Heik
Add constants and callback functions for the dwmac on rk3368 socs.
As can be seen, the base structure is the same, only registers and
the bits in them moved slightly.
Signed-off-by: Heiko Stuebner
---
.../devicetree/bindings/net/rockchip-dwmac.txt | 2 +-
drivers/net/ethernet/stmicro
In a first version the driver did want to do some gpio wiggling, which
of course never made it into the kernel, but somehow these register
defines where forgotten. Remove them, as they shouldn't be here.
Signed-off-by: Heiko Stuebner
---
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 3 -
Apart from small cleanups, this series provides support for the dwmac
on the new rk3368 ARM64 soc.
Tested on a R88 board using a RMII phy.
Heiko Stuebner (4):
net: stmmac: dwmac-rk: remove unused gpio register defines
net: stmmac: dwmac-rk: Fix clk rate when provided by soc
net: stmmac
kchip SoCs.
Signed-off-by: Heiko Stuebner
---
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 116 -
1 file changed, 75 insertions(+), 41 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
ind
external source provides the phy clock for RMII phys.
So set the rate of the correct clock and remove the remaining now
completely unused definition.
Fixes: 436f5ae08f9d ("GMAC: add driver for Rockchip RK3288 SoCs integrated
GMAC")
Cc: sta...@vger.kernel.org
Signed-off-by: Heik
In a first version the driver did want to do some gpio wiggling, which
of course never made it into the kernel, but somehow these register
defines where forgotten. Remove them, as they shouldn't be here.
Signed-off-by: Heiko Stuebner
---
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 3 -
kchip SoCs.
Signed-off-by: Heiko Stuebner
---
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 116 -
1 file changed, 75 insertions(+), 41 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
ind
Add constants and callback functions for the dwmac on rk3368 socs.
As can be seen, the base structure is the same, only registers and
the bits in them moved slightly.
Signed-off-by: Heiko Stuebner
---
.../devicetree/bindings/net/rockchip-dwmac.txt | 2 +-
drivers/net/ethernet/stmicro
Apart from small cleanups, this series provides support for the dwmac
on the new rk3368 ARM64 soc.
Tested on a R88 board using a RMII phy.
Changes since v1:
- Adapt to changes resulting from patch d42202dce002 ("net: stmmac:
dwmac-rk: Don't add function name in info or err messages
Am Freitag, 2. September 2016, 01:50:03 CEST schrieb Caesar Wang:
> From: Roger Chen
>
> The RK3399 GMAC Ethernet Controller provides a complete Ethernet interface
> from processor to a Reduced Media Independent Interface (RMII) and Reduced
> Gigabit Media Independent Interface (RGMII) compliant
Am Freitag, 2. September 2016, 01:50:04 CEST schrieb Caesar Wang:
> From: Roger Chen
>
> We add the required and optional properties for evb board.
> See the [0] to get the detail information.
>
> [0]:
> Documentation/devicetree/bindings/net/rockchip-dwmac.txt
>
> Signed-off-by: Roger Chen
> S
specifically, I at least can confirm that
regular probing + usage still works :-)
Dave already applied the series, but anyway
Tested-by: Heiko Stuebner
Heiko
works on all of them.
Signed-off-by: Heiko Stuebner
---
This should probably be a fix for 4.10-rc, as right now
my rk3399evb hangs on boot with the arm64 defconfig due to this.
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --
Hi Andrew, Heiner,
Am Montag, 4. März 2019, 21:06:30 CET schrieb Andrew Lunn:
> On Mon, Mar 04, 2019 at 11:30:25AM -0800, David Miller wrote:
> > From: Heiner Kallweit
> > Date: Sun, 3 Mar 2019 19:58:57 +0100
> >
> > > Currently the Phy driver's link_change_notify callback is called
> > > whenev
Am Freitag, 19. Juni 2020, 07:01:58 CEST schrieb Florian Fainelli:
>
> On 6/18/2020 5:11 AM, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > Some mscc ethernet phys have a configurable clock output, so describe the
> > generic properties to access them in de
From: Heiko Stuebner
At least VSC8530/8531/8540/8541 contain a clock output that can emit
a predefined rate of 25, 50 or 125MHz.
This may then feed back into the network interface as source clock.
So follow the example the at803x already set and introduce a
vsc8531,clk-out-frequency property to
From: Heiko Stuebner
At least VSC8530/8531/8540/8541 contain a clock output that can emit
a predefined rate of 25, 50 or 125MHz.
This may then feed back into the network interface as source clock.
So follow the example the at803x already set and introduce a
vsc8531,clk-out-frequency property to
From: Heiko Stuebner
The different probe functions share a lot of code, so move the
common parts into a helper to reduce duplication.
Signed-off-by: Heiko Stuebner
---
changes in v2:
- new patch as suggested by Andrew
drivers/net/phy/mscc/mscc_main.c | 97 +---
1
From: Heiko Stuebner
At least VSC8530/8531/8540/8541 contain a clock output that can emit
a predefined rate of 25, 50 or 125MHz.
This may then feed back into the network interface as source clock.
So follow the example the at803x already set and introduce a
vsc8531,clk-out-frequency property to
From: Heiko Stuebner
The different probe functions share a lot of code, so move the
common parts into a helper to reduce duplication.
This moves the devm_phy_package_join below the general allocation
but as all components just allocate things, this should be ok.
Suggested-by: Andrew Lunn
From: Heiko Stuebner
Some ethernet phys have a configurable clock output, so add a generic
property to describe its target rate.
Suggested-by: Andrew Lunn
Signed-off-by: Heiko Stuebner
---
changes in v3:
- new patch
Documentation/devicetree/bindings/net/ethernet-phy.yaml | 5 +
1 file
From: Heiko Stuebner
At least VSC8530/8531/8540/8541 contain a clock output that can emit
a predefined rate of 25, 50 or 125MHz.
This may then feed back into the network interface as source clock.
So follow the example the at803x already set and introduce a
vsc8531,clk-out-frequency property to
changes in v3:
- adapt to 5.8 merge-window results
- introduce a more generic enet-phy-property instead of
using a vsc8531,* one - suggested by Andrew
changes in v2:
- new probe factoring patch as suggested by Andrew
Heiko Stuebner (3):
net: phy: mscc: move shared probe code into a helper
dt
From: Heiko Stuebner
Some ethernet phys have a configurable clock output, so add a generic
property to describe its target rate.
Suggested-by: Andrew Lunn
Signed-off-by: Heiko Stuebner
---
Documentation/devicetree/bindings/net/ethernet-phy.yaml | 5 +
1 file changed, 5 insertions
From: Heiko Stuebner
The different probe functions share a lot of code, so move the
common parts into a helper to reduce duplication.
This moves the devm_phy_package_join below the general allocation
but as all components just allocate things, this should be ok.
Suggested-by: Andrew Lunn
uce a more generic enet-phy-property instead of
using a vsc8531,* one - suggested by Andrew
changes in v2:
- new probe factoring patch as suggested by Andrew
Heiko Stuebner (3):
net: phy: mscc: move shared probe code into a helper
dt-bindings: net: mscc-vsc8531: add optional clock propertie
From: Heiko Stuebner
At least VSC8530/8531/8540/8541 contain a clock output that can emit
a predefined rate of 25, 50 or 125MHz.
This may then feed back into the network interface as source clock.
So expose a clock-provider from the phy using the common clock framework
to allow setting the rate
From: Heiko Stuebner
The different probe functions share a lot of code, so move the
common parts into a helper to reduce duplication.
This moves the devm_phy_package_join below the general allocation
but as all components just allocate things, this should be ok.
Suggested-by: Andrew Lunn
From: Heiko Stuebner
Some mscc ethernet phys have a configurable clock output, so describe the
generic properties to access them in devicetrees.
Signed-off-by: Heiko Stuebner
---
Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a
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