On 30/10/18 15:10, Thomas Petazzoni wrote:
> Hello,
>
> On Tue, 30 Oct 2018 14:55:01 +0000, Marc Zyngier wrote:
>
>>> I.e, isn't the firmware fix papering over a bug that should be fixed in
>>> Linux mvpp2 driver anyway ?
>>
>> Absolutely. Leavin
On 30/10/18 13:00, Thomas Petazzoni wrote:
> Hello Marcin,
>
> Thanks for the feedback.
>
> On Tue, 30 Oct 2018 13:37:37 +0100, Marcin Wojtas wrote:
>
>> You use _really_ archaic firmware, the bug you see is 99% caused by a
>> bug already fixed long time ago (cleanup all PP2 BM pools correctly
Marcin,
On 30/10/18 12:37, Marcin Wojtas wrote:
> [Resend in UTF-8]
>
> Hi Marc,
>
> You use _really_ archaic firmware, the bug you see is 99% caused by a
Please let me fix this for you:
s/_really_ archaic/released/
> bug already fixed long time ago (cleanup all PP2 BM pools correctly
>
Antoine,
On 30/10/18 10:50, Antoine Tenart wrote:
> Marc,
>
> On Mon, Oct 29, 2018 at 03:05:53PM +0000, Marc Zyngier wrote:
>>
>> This is a follow-up on the conversation Thomas and I had last week at
>> ELC, with me ranting at the sorry state of the MVPP2 driver.
&g
On Mon, 2 Apr 2018 07:43:49 +
Alexander Kurz wrote:
> Remove the duplicated code for asix88179_178a bind and reset methods.
>
> Signed-off-by: Alexander Kurz
> ---
> drivers/net/usb/ax88179_178a.c | 137
> ++---
> 1 file
[dropping Freddy as I'm getting bounces from asix.com.tw]
On Mon, 2 Apr 2018 15:21:08 + Alexander Kurz wrote:
Alexander,
> Hi Marc, David,
> with the v2 patch ("net: usb: asix88179_178a: de-duplicate code")
> I made an embarrasly stupid mistake of removing the wrong
On Mon, 02 Apr 2018 08:43:49 +0100,
Alexander Kurz wrote:
Alexander,
>
> Remove the duplicated code for asix88179_178a bind and reset methods.
>
> Signed-off-by: Alexander Kurz
> ---
> drivers/net/usb/ax88179_178a.c | 137
> ++---
> 1 file
Alexander, David,
On 2018-03-08 11:19, Alexander Kurz wrote:
Remove the duplicated code for asix88179_178a bind and reset methods.
Signed-off-by: Alexander Kurz
---
drivers/net/usb/ax88179_178a.c | 117
+++--
1 file changed, 31
;
> Signed-off-by: Rick Chen <r...@andestech.com>
> Signed-off-by: Greentime Hu <greent...@andestech.com>
Reviewed-by: Marc Zyngier <marc.zyng...@arm.com>
Once there is an agreement on this series being fit for mainline, let me
know how you want to get this merged (eit
On 08/12/17 11:54, Greentime Hu wrote:
> Hi, Mark:
>
> 2017-12-08 18:21 GMT+08:00 Mark Rutland :
>> On Fri, Dec 08, 2017 at 05:12:00PM +0800, Greentime Hu wrote:
>>> From: Greentime Hu
>>>
>>> This patch adds VDSO support. The VDSO code is currently
On Wed, Nov 29 2017 at 11:23:34 pm GMT, Greentime Hu wrote:
Hi Greentime,
>>> +}
>>> +
>>> +static void ativic32_mask_ack_irq(struct irq_data *data)
>>> +{
>>> + unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
>>> + __nds32__mtsr_dsb(int_mask2 & (~(1 <<
On 27/11/17 12:28, Greentime Hu wrote:
> From: Greentime Hu
>
> This patch adds the Andestech Internal Vector Interrupt Controller
> driver. You can find the spec here. Ch4.9 of AndeStar SPA V3 Manual.
> http://www.andestech.com/product.php?cls=9
>
> Signed-off-by: Rick
On 08/11/17 05:55, Greentime Hu wrote:
> From: Greentime Hu
>
Please add a commit message, indicating what this does, and potentially
a pointer to some documentation (if publicly available).
> Signed-off-by: Rick Chen
> Signed-off-by: Greentime Hu
interacting
with these interrupts altogether.
Cc: sta...@vger.kernel.org
Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c
b/drivers/net/ethernet/marvell/mvpp2.c
fat warning when CONFIG_DEBUG_PREEMPT=y.
>
> Therefore, this commit replaces the smp_processor_id() in
> migration-enabled contexts by the appropriate get_cpu/put_cpu sections.
>
> Reported-by: Marc Zyngier <marc.zyng...@arm.com>
> Fixes: a786841df72e ("net:
Hi Geert,
On 08/11/16 19:35, Geert Uytterhoeven wrote:
> Currently the renesas-irqc driver uses postcore_initcall().
>
> However, the new CPG/MSSR driver uses subsys_initcall(). Hence the
> IRQC's probe will be deferred, which causes the Micrel Ethernet PHY to
> not find its interrupt on R-Car
On 02/09/16 11:06, Zubair Lutfullah Kakakhel wrote:
> Hi,
>
> On 09/02/2016 07:25 AM, Michal Simek wrote:
>> On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
>>> The Xilinx AXI Interrupt Controller IP block is used by the MIPS
>>> based xilfpga platform.
>>>
>>> Move the interrupt controller
On 01/09/16 17:50, Zubair Lutfullah Kakakhel wrote:
> The drivers read/write function handling is a bit quirky.
> And the irqmask is passed directly to the handler.
>
> Add a new irqchip struct to pass to the handler and
> cleanup read/write handling.
>
> Signed-off-by: Zubair Lutfullah Kakakhel
On 01/09/16 17:50, Zubair Lutfullah Kakakhel wrote:
> The MIPS based xilfpga platform has the following IRQ structure
>
> Peripherals --> xilinx_intcontroller -> mips_cpu_int controller
>
> Add support for the driver to chain the irq handler
>
> Signed-off-by: Zubair Lutfullah Kakakhel
On 01/09/16 14:52, Zubair Lutfullah Kakakhel wrote:
> Hi,
[...]
>> But that still doesn't address the case I had in mind, which is when you
>> have *two* AXI-intc, one cascaded into the other. Is that something that
>> could be built? You should at least make sure that there is a big fat
>>
On 01/09/16 12:01, Zubair Lutfullah Kakakhel wrote:
> Hi,
>
> Thanks for the review
> Comments inline.
>
> On 08/31/2016 05:57 PM, Marc Zyngier wrote:
>> On 31/08/16 17:35, Zubair Lutfullah Kakakhel wrote:
>>> The MIPS based xilfpga platform has the following
On 31/08/16 17:35, Zubair Lutfullah Kakakhel wrote:
> The MIPS based xilfpga platform has the following IRQ structure
>
> Peripherals --> xilinx_intcontroller -> mips_cpu_int controller
>
> Add support for the driver to chain the irq handler
>
> Signed-off-by: Zubair Lutfullah Kakakhel
On 31/08/16 17:35, Zubair Lutfullah Kakakhel wrote:
> The drivers read/write function handling is a bit quirky.
> And the irqmask is passed directly to the handler.
>
> Add a new irqchip struct to pass to the handler and
> cleanup read/write handling.
>
> Signed-off-by: Zubair Lutfullah Kakakhel
On Thu, 18 Aug 2016 14:43:16 +0100
Zubair Lutfullah Kakakhel wrote:
> The MIPS based xilfpga platform has the following IRQ structure
>
> Peripherals --> xilinx_intcontroller -> mips_cpu_int controller
>
> Add support for the driver to chain the irq handler
>
>
On Thu, 18 Aug 2016 14:43:15 +0100
Zubair Lutfullah Kakakhel wrote:
Hi Zubair,
Thanks for the heads up, comments below.
> The Xilinx AXI Interrupt Controller IP block is used by the MIPS
> based xilfpga platform.
>
> Move the interrupt controller code out of
On Sat, 21 May 2016 17:47:05 +0200
Bert Lindner <b...@a20.net> wrote:
> Hi,
>
> On 2016-05-20 12:36, Marc Zyngier wrote:
> > On 20/05/16 11:30, Andre Heider wrote:
> >> Hi,
> >>
> >> On Fri, May 20, 2016 at 10:14 AM, Giuseppe CAVALLARO
> >>
On 20/05/16 11:30, Andre Heider wrote:
> Hi,
>
> On Fri, May 20, 2016 at 10:14 AM, Giuseppe CAVALLARO
> <peppe.cavall...@st.com> wrote:
>> On 5/20/2016 9:56 AM, Marc Zyngier wrote:
>>>
>>> On 20/05/16 06:44, Andre Heider wrote:
>>>>
>>&g
On 20/05/16 06:44, Andre Heider wrote:
> Giuseppe, Alexandre, et al.,
>
> On Thu, Mar 17, 2016 at 8:52 AM, Marc Zyngier <marc.zyng...@arm.com> wrote:
>> On Thu, 17 Mar 2016 00:56:40 +0100
>> Bert Lindner <b...@a20.net> wrote:
>>> On 2016-03-16 18:42,
On 16/03/16 15:10, Bert Lindner wrote:
> On 2016-03-16 14:10, Andreas Färber wrote:
>> Am 16.03.2016 um 13:09 schrieb Robin Murphy:
>>> On 16/03/16 11:39, Marc Zyngier wrote:
>>>> On 16/03/16 11:19, Bert Lindner wrote:
>>>>> Hopefull
On Thu, 17 Mar 2016 00:56:40 +0100
Bert Lindner <b...@a20.net> wrote:
> On 2016-03-16 18:42, Marc Zyngier wrote:
> > On 16/03/16 15:10, Bert Lindner wrote:
> >> On 2016-03-16 14:10, Andreas Färber wrote:
> >>> Am 16.03.2016 um 13:09 schrieb Robin Murphy:
&g
On Wed, 23 Sep 2015 17:22:49 +
Jeremy Linton wrote:
Hi Jeremy,
> Marc,
>
> |FWIW, mainline booting with this patch on Juno r1 with ACPI enabled dies a
> |horrible death:
>
> Sorry about the delay, I didn't see this message.
>
>
>
> |How did you get this to work?
Jeremy,
On 12/08/15 23:06, Jeremy Linton wrote:
> Add ACPI bindings for the smsc911x driver. Convert the DT specific calls
> to nonspecific device* calls, This allows the driver to work
> with both ACPI and DT configurations. Ethernet should now work when using
> ACPI on ARM Juno.
>
>
Ondrej == Ondrej Zary [EMAIL PROTECTED] writes:
Ondrej Tested using 3 ISA cards in various combinations of PnP and non-PnP
modes.
Ondrej #ifdef CONFIG_EISA
Ondrej ret = eisa_driver_register(el3_eisa_driver);
Ondrej + if (!ret)
Ondrej + eisa_registeted = 1;
Ondrej
Folks,
This patch (against 2.6.17-rc1) converts the cassini driver to the
pci_iomap API that will do the right thing, so architectures like
PARISC can stop screaming about illegal usage of ioremap() on
non-cacheable regions.
Tested on 64bit PARISC kernel.
Signed-off-by: Marc Zyngier [EMAIL
like PARISC stop screaming about
illegal usage of ioremap() on non-cacheable regions.
Signed-off-by: Marc Zyngier [EMAIL PROTECTED]
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index ac48f75..39f36aa 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -4877,7 +4877,7
People,
On PARISC, kernel screams if a driver uses ioremap on an io-port
region. It now strongly insists on using ioremap_nocache, which sounds
sensible enough since, in this case, cassini wants to map the card
registers.
The included one-line patch fixes it.
Please consider applying.
Jeff == Jeff Garzik [EMAIL PROTECTED] writes:
Jeff BTW, pci_iomap() will automatically select the right thing...
Fair enough. Here's an updated patch.
M.
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index ac48f75..2f5ea75 100644
--- a/drivers/net/cassini.c
+++
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