From: Roy Zang <[EMAIL PROTECTED]>
Clean up redundant PHY write line for ULi526x Ethernet
Driver.
Signed-off-by: Roy Zang <[EMAIL PROTECTED]>
---
drivers/net/tulip/uli526x.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/net/tulip/uli526x.c b/drivers/net/tulip/u
> On Wed, 21 Jun 2006 12:00:40 +0800
> Zang Roy-r61911 <[EMAIL PROTECTED]> wrote:
>
> > This patch adds a net device driver and configuration options for
> > Tundra Semiconductor Tsi108 integrated dual port Gigabit Ethernet
> > controller
>
Update the Kconfig and Makefile
Signed-off-by: Alexandre Bounine <[EMAIL PROTECTED]>
Signed-off-by: Roy Zang <[EMAIL PROTECTED]>
---
drivers/net/Kconfig |8
drivers/net/Makefile |1
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/n
It seems that my previous patch was blocked because of the size :-).
This serial of patches add tsi108/9 on chip Ethernet controller support.
1/3 : Config and Makefile modification.
2/3 : Header file
3/3 : C file
Roy
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The driver for tsi108/9 on chip Ethernet port
Signed-off-by: Alexandre Bounine<[EMAIL PROTECTED]>
Signed-off-by: Roy Zang <[EMAIL PROTECTED]>
---
drivers/net/tsi108_eth.c | 1752 ++
1 files changed, 1752 insertions(+), 0 deletions(-)
diff --git a/dr
On Tue, 2006-09-12 at 22:43, Jeff Garzik wrote:
> Roland Dreier wrote:
> > > +struct tsi108_prv_data {
> > > + volatile u32 regs; /* Base of normal regs */
> > > + volatile u32 phyregs; /* Base of register bank used for PHY
> access */
> >
> > Why volatile? This looks really wrong her
>
> I have some review comments about your driver; please
> consider them for
> fixing
>
Thanks.
>
> > + spin_unlock_irq(&phy_lock);
> > + msleep(10);
> > + spin_lock_irq(&phy_lock);
> > + }
>
> hmm some places take phy_lock with disabling interrupts, while
Hi,
Does anyone can tell me why some of my patches were blocked in the
mailing list.
I do not use attachment. The body of the mail is not exceed 40KB in
size.
Roy
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More
On Tue, 2006-09-19 at 16:50, Matti Aarnio wrote:
> On Tue, Sep 19, 2006 at 04:33:17PM +0800, Zang Roy-r61911 wrote:
> > Hi,
> > Does anyone can tell me why some of my patches were blocked in
> the
> > mailing list.
> > I do not use attachment. The body of
The Tundra Semiconductor Corporation (Tundra) Tsi108/9 is a host bridge
for PowerPC processors that offers numerous system interconnect options
for embedded application designers . The Tsi108/9 can interconnect 60x
or MPX processors to PCI/X peripherals, DDR2-400 memory, Gigabit
Ethernet, and Flash
The Tundra Semiconductor Corporation (Tundra) Tsi108/9 is a host bridge
for PowerPC processors that offers numerous system interconnect options
for embedded application designers . The Tsi108/9 can interconnect 60x
or MPX processors to PCI/X peripherals, DDR2-400 memory, Gigabit
Ethernet, and Flash
The Tundra Semiconductor Corporation (Tundra) Tsi108/9 is a host bridge
for PowerPC processors that offers numerous system interconnect options
for embedded application designers . The Tsi108/9 can interconnect 60x
or MPX processors to PCI/X peripherals, DDR2-400 memory, Gigabit
Ethernet, and Flash
On Thu, 2006-09-21 at 12:26, Jeff Garzik wrote:
> Zang Roy-r61911 wrote:
> > +#define TSI108_ETH_WRITE_REG(offset, val) \
> > + writel(le32_to_cpu(val),data->regs + (offset))
> > +
> > +#define TSI108_ETH_READ_REG(offset) \
> > + le32_to_cpu(readl(data-&
On Thu, 2006-09-21 at 12:46, Jeff Garzik wrote:
> Zang Roy-r61911 wrote:
> > +struct tsi108_prv_data {
> > + void __iomem *regs;/* Base of normal regs */
> > + void __iomem *phyregs; /* Base of register bank used for PHY
> access */
>
On Thu, 2006-09-21 at 12:46, Jeff Garzik wrote:
> > +
> > +/* Synchronization is needed between the thread and up/down events.
> > + * Note that the PHY is accessed through the same registers for
> both
> > + * interfaces, so this can't be made interface-specific.
> > + */
> > +
> > +static DEFINE_
On Thu, 2006-09-21 at 12:46, Jeff Garzik wrote:
> you should have a chip structure, that contains two structs (one for
> each interface/port)
>
Jeff,
I updated the code according to all your feedback and post it here
http://www.spinics.net/lists/netdev/msg17120.html
Any comment?
Roy
-
To un
On Mon, 2006-10-23 at 10:09, Zang Roy-r61911 wrote:
> On Thu, 2006-09-21 at 12:46, Jeff Garzik wrote:
>
> > you should have a chip structure, that contains two structs (one for
> > each interface/port)
> >
> Jeff,
>
> I updated the code according to all your fe
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